SN74ABT162245DLG4 [TI]
16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS; 16位总线收发器具有三态输出
| 型号： | SN74ABT162245DLG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| 文件： | 总13页 (文件大小：244K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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SCBS239F − MARCH 1993 − REVISED JUNE 2004
SN54ABT162245 . . . WD PACKAGE
SN74ABT162245 . . . DGG OR DL PACKAGE
(TOP VIEW)
D
D
Members of the Texas Instruments
Widebus Family
A-Port Outputs Have Equivalent 25-Ω
Series Resistors, So No External Resistors
Are Required
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1DIR
1B1
1B2
GND
1B3
1B4
1OE
1A1
1A2
GND
1A3
1A4
2
D
D
D
D
D
Typical V
(Output Ground Bounce)
= 5 V, T = 25°C
A
OLP
3
<1 V at V
CC
4
Distributed V
High-Speed Switching Noise
and GND Pins Minimize
5
CC
6
7
V
V
I
Supports Partial-Power-Down Mode
CC
CC
off
8
Operation
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
9
Flow-Through Architecture Optimizes PCB
Layout
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Latch-Up Performance Exceeds 500 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
description/ordering information
V
V
CC
CC
2B5
2B6
GND
2B7
2B8
2A5
2A6
GND
2A7
2A8
2OE
The ’ABT162245 devices are 16-bit noninverting
3-state transceivers designed for synchronous
two-way communication between data buses.
The control-function implementation minimizes
external timing requirements.
2DIR
These devices can be used as two 8-bit
transceivers or one 16-bit transceiver. They allow
data transmission from the A bus to the B bus or
from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable
(OE) input can be used to disable the device so that the buses effectively are isolated.
The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 25-Ω series resistors
to reduce overshoot and undershoot.
These devices are fully specified for partial-power-down applications using I . The I circuitry disables the
off
off
outputs, preventing damaging current backflow through the devices when they are powered down.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
Tube
SN74ABT162245DL
SN74ABT162245DLR
SN74ABT162245DGGR
SNJ54ABT162245WD
SSOP − DL
ABT162245
Tape and reel
−40°C to 85°C
−55°C to 125°C
TSSOP − DGG Tape and reel
CFP − WD Tube
ABT162245
SNJ54ABT162245WD
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
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Copyright 2004, Texas Instruments Incorporated
ꢖ ꢚ ꢥ ꢝ ꢜꢨ ꢣꢢ ꢠꢡ ꢢꢜ ꢞꢥ ꢧꢙ ꢟꢚ ꢠ ꢠꢜ ꢯꢍ ꢰꢌ ꢗꢏ ꢱ ꢌꢕꢲꢂ ꢕꢂꢊ ꢟꢧꢧ ꢥꢟ ꢝ ꢟ ꢞꢤ ꢠꢤꢝ ꢡ ꢟ ꢝ ꢤ ꢠꢤ ꢡꢠꢤ ꢨ
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1
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ꢇꢈ ꢌꢅꢍ ꢆ ꢅ ꢎꢀ ꢆ ꢏ ꢄꢁ ꢀꢐ ꢑꢍ ꢒ ꢑ ꢏꢀ
ꢓꢍ ꢆ ꢔ ꢕ ꢌꢀꢆꢄꢆ ꢑ ꢖꢎꢆ ꢗꢎ ꢆꢀ
SCBS239F − MARCH 1993 − REVISED JUNE 2004
description/ordering information (continued)
To ensure the high-impedance state during power up or power down, OE should be tied to V
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
through a pullup
CC
FUNCTION TABLE
(each 8-bit section)
INPUTS
OPERATION
OE
L
DIR
L
B data to A bus
A data to B bus
Isolation
L
H
H
X
logic diagram (positive logic)
24
1
2DIR
1DIR
48
25
13
1OE
2OE
2B1
36
47
1A1
2A1
2
1B1
To Seven Other Channels
To Seven Other Channels
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Voltage range applied to any output in the high or power-off state, V
. . . . . . . . . . . . . . . . . . . −0.5 V to 5.5 V
O
Current into any output in the low state, I : SN54ABT162245 (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
O
SN74ABT162245 (B port) . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
SN54/74ABT162245 (A port) . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −18 mA
IK
OK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
O
Package thermal impedance, θ (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
JA
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Storage temperature range, T
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51−7.
2
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SCBS239F − MARCH 1993 − REVISED JUNE 2004
recommended operating conditions (see Note 3)
SN54ABT162245 SN74ABT162245
UNIT
MIN
4.5
2
MAX
MIN
4.5
2
MAX
V
CC
V
IH
V
IL
V
I
Supply voltage
5.5
5.5
V
V
V
V
High-level input voltage
Low-level input voltage
Input voltage
0.8
0.8
0
V
CC
0
V
CC
B port
−24
−3
−32
−12
64
I
High-level output current
Low-level output current
mA
mA
OH
A port
B port
48
I
OL
A port
12
12
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
Outputs enabled
10
10
ns/V
T
A
−55
125
−40
85
°C
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
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ꢇꢈ ꢌꢅꢍ ꢆ ꢅ ꢎꢀ ꢆ ꢏ ꢄꢁ ꢀꢐ ꢑꢍ ꢒ ꢑ ꢏꢀ
ꢓꢍ ꢆ ꢔ ꢕ ꢌꢀꢆꢄꢆ ꢑ ꢖꢎꢆ ꢗꢎ ꢆꢀ
SCBS239F − MARCH 1993 − REVISED JUNE 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
SN54ABT162245 SN74ABT162245
A
PARAMETER
TEST CONDITIONS
UNIT
†
MIN TYP
MAX
MIN
MAX
MIN
MAX
V
V
V
= 4.5 V,
I = −18 mA
−1.2
−1.2
−1.2
V
IK
CC
I
= 5 V,
I
I
I
I
I
I
I
I
I
I
I
= −1 mA
= −1 mA
= −3 mA
= −12 mA
= −3 mA
= −3 mA
= −24 mA
= −32 mA
= 12 mA
= 48 mA
= 64 mA
3.8
3.3
3.1
2.6*
3
2.5
3
2.5
3
CC
OH
OH
OH
OH
OH
OH
OH
OH
OL
OL
OL
A port
B port
3
3.1
2.6
3
V
V
= 4.5 V
= 5 V,
CC
V
OH
V
3
2.5
2
CC
2.5
2.5
V
= 4.5 V
= 4.5 V
CC
CC
2*
2
A port
B port
0.8
0.45
0.8
0.8
0.45
0.55
0.45
V
V
V
V
OL
0.55*
100
mV
µA
hys
Control
inputs
1
1
1
I
I
V
CC
= 5.5 V, V = V
or GND
CC
I
A or B ports
20
10
20
10
20
10
§
I
I
I
V
V
V
= 5.5 V,
= 5.5 V,
= 0,
V
V
= 2.7 V
= 0.5 V
µA
µA
µA
OZH
CC
CC
CC
CC
O
§
−10
100
−10
−10
100
OZL
off
O
V or V ≤ 4.5 V
I
O
V
V
= 5.5 V,
= 5.5 V
I
Outputs high
50
50
50
µA
CEX
O
‡
A port
B port
−25
−50 −100
−25
−50
−90
−180
2
−25
−50
−100
−180
2
¶
V
= 5.5 V,
V
= 2.5 V
mA
I
CC
O
O
−50 −100
−180
2
Outputs high
Outputs low
V
I
= 5.5 V,
= 0,
CC
O
32
2
32
32
I
A or B ports
Data inputs
mA
mA
CC
V = V
I
or GND
CC
Outputs disabled
2
2
V
CC
= 5.5 V,
Outputs enabled
Outputs disabled
1
0.05
1.5
2
1
2
0.05
1.5
One input at 3.4 V,
Other inputs at
#
∆I
CC
V
CC
or GND
Control
inputs
V
CC
= 5.5 V, One input at 3.4 V,
or GND
1.5
Other inputs at V
CC
C
C
V = 2.5 V or 0.5 V
3
6
pF
pF
i
I
V
O
= 2.5 V or 0.5 V
io
* On products compliant to MIL-PRF-38535, this parameter does not apply.
†
‡
§
¶
#
All typical values are at V
= 5 V.
CC
This limit applies only to the SN74ABT162245.
The parameters I and I include the input leakage current.
OZH OZL
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V
or GND.
CC
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢓ ꢍꢆ ꢔ ꢕ ꢌꢀꢆꢄꢆ ꢑ ꢖ ꢎꢆ ꢗꢎ ꢆ
SCBS239F − MARCH 1993 − REVISED JUNE 2004
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C = 50 pF (unless otherwise noted) (see Figure 1)
L
V
T
= 5 V,
= 25°C
CC
A
SN54ABT162245 SN74ABT162245
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
1
TYP
2.2
2.3
2.7
3.1
3.6
3.7
4.4
3.3
4.1
4.3
4.5
3.7
MAX
3.4
3.7
4.1
4.6
5.2
5.4
5.8
4.7
6
MIN
1
MAX
4.1
4.4
4.9
5.2
6.4
6.5
6.4
5.6
7.2
7.3
6.8
6.1
MIN
1
MAX
3.9
4.2
4.6
5.1
6.3
6.4
6.3
5.2
7.1
7
t
t
t
t
t
t
t
t
t
t
t
t
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
PZH
PZL
PHZ
PLZ
A
B
B
A
B
B
ns
ns
ns
ns
1
1
1
1
1
1
1.5
1
1.5
1
1.5
1
OE
OE
1
1
1
2
2
2
1.5
1.5
1.5
2
1.5
1.5
1.5
2
1.5
1.5
1.5
2
A
A
ns
ns
OE
OE
6.1
6.1
5.1
6.6
5.7
1.5
1.5
1.5
5
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ꢇꢈ ꢌꢅꢍ ꢆ ꢅ ꢎꢀ ꢆ ꢏ ꢄꢁ ꢀꢐ ꢑꢍ ꢒ ꢑ ꢏꢀ
ꢓꢍ ꢆ ꢔ ꢕ ꢌꢀꢆꢄꢆ ꢑ ꢖꢎꢆ ꢗꢎ ꢆꢀ
SCBS239F − MARCH 1993 − REVISED JUNE 2004
PARAMETER MEASUREMENT INFORMATION
7 V
S1
500 Ω
Open
GND
From Output
Under Test
TEST
S1
t
t
/t
Open
7 V
PLH PHL
/t
C
= 50 pF
L
t
500 Ω
PLZ PZL
/t
(see Note A)
Open
PHZ PZH
LOAD CIRCUIT
3 V
0 V
Timing Input
Data Input
1.5 V
t
w
t
t
h
su
3 V
0 V
3 V
0 V
Input
1.5 V
1.5 V
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3 V
0 V
3 V
0 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
Input
t
t
t
t
t
PLZ
PLH
PHL
PHL
PZL
Output
Waveform 1
S1 at 7 V
V
V
3.5 V
OH
1.5 V
1.5 V
1.5 V
1.5 V
Output
V
V
+ 0.3 V
OL
V
OL
OL
(see Note B)
t
t
t
PLH
PZH
PHZ
Output
Waveform 2
S1 at Open
(see Note B)
V
OH
V
V
OH
− 0.3 V
OH
1.5 V
1.5 V
Output
≈0 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time, with one transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
29-Jun-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
5962-9677401QXA
ACTIVE
ACTIVE
CFP
WD
48
48
1
TBD
A42 SNPB
N / A for Pkg Type
74ABT162245DGGRE4
TSSOP
DGG
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
74ABT162245DLRG4
SN74ABT162245DGGR
SN74ABT162245DL
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
TSSOP
SSOP
SSOP
SSOP
CFP
DL
DGG
DL
48
48
48
48
48
48
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ABT162245DLG4
SN74ABT162245DLR
SNJ54ABT162245WD
DL
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
DL
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
WD
1
TBD
A42 SNPB
N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Apr-2007
TAPE AND REEL INFORMATION
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Apr-2007
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
(mm)
24
SN74ABT162245DGGR
SN74ABT162245DLR
DGG
DL
48
48
MLA
MLA
8.6
15.8
16.2
1.8
3.1
12
16
24
32
Q1
Q1
330
32
11.35
TAPE AND REEL BOX INFORMATION
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
SN74ABT162245DGGR
SN74ABT162245DLR
DGG
DL
48
48
MLA
MLA
333.2
336.6
333.2
342.9
31.75
41.3
Pack Materials-Page 2
MECHANICAL DATA
MCFP010B – JANUARY 1995 – REVISED NOVEMBER 1997
WD (R-GDFP-F**)
CERAMIC DUAL FLATPACK
48 LEADS SHOWN
0.120 (3,05)
0.075 (1,91)
0.009 (0,23)
0.004 (0,10)
1.130 (28,70)
0.870 (22,10)
0.370 (9,40)
0.250 (6,35)
0.390 (9,91)
0.370 (9,40)
0.370 (9,40)
0.250 (6,35)
1
48
0.025 (0,635)
A
0.014 (0,36)
0.008 (0,20)
24
25
NO. OF
LEADS**
48
56
0.740
0.640
(16,26) (18,80)
A MAX
A MIN
0.610 0.710
(15,49) (18,03)
4040176/D 10/97
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only
E. Falls within MIL STD 1835: GDFP1-F48 and JEDEC MO-146AA
GDFP1-F56 and JEDEC MO-146AB
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
48
0.0135 (0,343)
0.008 (0,203)
0.005 (0,13)
M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
0°–ā8°
1
24
0.040 (1,02)
0.020 (0,51)
A
Seating Plane
0.004 (0,10)
0.008 (0,20) MIN
PINS **
0.110 (2,79) MAX
28
48
0.630
56
DIM
0.380
(9,65)
0.730
A MAX
A MIN
(16,00) (18,54)
0.370
(9,40)
0.620
0.720
(15,75) (18,29)
4040048/E 12/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MO-118
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
M
0,08
0,50
48
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
0,25
1
24
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
48
56
64
DIM
A MAX
12,60
12,40
14,10
13,90
17,10
16,90
A MIN
4040078/F 12/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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