SN74ABTH25245DW [TI]

25-W OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS; 具有三态输出25 -W八路总线收发器
SN74ABTH25245DW
型号: SN74ABTH25245DW
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

25-W OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
具有三态输出25 -W八路总线收发器

总线收发器 输出元件
文件: 总8页 (文件大小:133K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN54ABTH25245, SN74ABTH25245  
25-OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS251F – JUNE 1992 – REVISED MAY 1997  
SN54ABTH25245 . . . JT PACKAGE  
SN74ABTH25245 . . . DW OR NT PACKAGE  
(TOP VIEW)  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
A1  
GND  
A2  
A3  
GND  
A4  
A5  
GND  
A6  
DIR  
B1  
B2  
1
2
3
4
5
6
7
8
9
24  
23  
22  
21  
20  
19  
18  
17  
16  
Latch-Up Performance Exceeds 500 mA Per  
JEDEC Standard JESD-17  
V
CC  
B3  
B4  
B5  
B6  
Typical V  
(Output Ground Bounce) < 1 V  
OLP  
at V  
= 5 V, T = 25°C  
CC  
A
High-Impedance State During Power Up  
and Power Down  
V
CC  
Designed to Facilitate Incident-Wave  
Switching for Line Impedances of 25 or  
Greater  
A7 10  
15 B7  
GND  
A8  
B8  
OE  
11  
12  
14  
13  
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
SN54ABTH25245 . . . FK PACKAGE  
(TOP VIEW)  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
Package Options Include Plastic  
Small-Outline (DW) Package, Ceramic Chip  
Carriers (FK), and Standard Plastic (NT)  
and Ceramic (JT) DIPs  
4
3
2 1 28 27 26  
B3  
5
25 OE  
V
24 A8  
23  
6
CC  
B2  
7
GND  
NC  
A7  
A6  
GND  
22  
21  
20  
19  
NC  
B1  
DIR  
A1  
8
description  
9
The ’ABTH25245 are 25-octal bus transceivers  
designed for asynchronous communication  
between data buses. They improve both the  
performance and density of 3-state memory  
address drivers, clock drivers, and bus-oriented  
transceivers.  
10  
11  
12 13 14 15 16 17 18  
NC – No internal connection  
These devices allow noninverted data  
transmission from the A bus to the B bus or from  
theBbustotheAbus, dependingonthelogiclevel  
at the direction-control (DIR) input. The  
output-enable (OE) input can disable the device  
so that both buses are effectively isolated. When  
OE is low, the device is active.  
These transceivers are capable of sinking 188 mA of I current, which facilitates switching 25-transmission  
OL  
linesontheincidentwave. ThedistributedV andGNDpinsminimizeswitchingnoiseformore-reliablesystem  
CC  
operation.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.  
Copyright 1997, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ABTH25245, SN74ABTH25245  
25-OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS251F – JUNE 1992 – REVISED MAY 1997  
description (continued)  
When V  
is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.  
CC  
However, to ensure the high-impedance state above 2.1 V, OE should be tied to V  
the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup resistor;  
CC  
The SN54ABTH25245 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74ABTH25245 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
INPUTS  
OPERATION  
OE  
L
DIR  
L
B data to A bus  
A data to B bus  
Isolation  
L
H
H
X
logic symbol  
13  
24  
G3  
OE  
DIR  
3 EN1 [BA]  
3 EN2 [AB]  
1
23  
A1  
1
B1  
2
3
22  
20  
19  
18  
17  
15  
14  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
4
6
7
9
10  
12  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
Pin numbers shown are for the DW, JT, and NT packages.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ABTH25245, SN74ABTH25245  
25-OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS251F – JUNE 1992 – REVISED MAY 1997  
logic diagram (positive logic)  
24  
DIR  
13  
OE  
1
A1  
23  
B1  
To Seven Other Channels  
Pin numbers shown are for the DW, JT, and NT packages.  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
CC  
Input voltage range, V (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
I
Voltage range applied to any output in the disabled or power-off state, V . . . . . . . . . . . . . . . . –0.5 V to 5.5 V  
O
Voltage range applied to any output in the high state, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V  
O
CC  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA  
IK  
I
Output clamp current, I  
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA  
OK  
O
Current into any output in the low state, I : SN74ABTH25245 (A port) . . . . . . . . . . . . . . . . . . . . . . . . . 376 mA  
O
SN74ABTH25245 (B port) . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA  
Package thermal impedance, θ (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W  
JA  
NT package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.  
2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages,  
which use a trace length of zero.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ABTH25245, SN74ABTH25245  
25-OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS251F – JUNE 1992 – REVISED MAY 1997  
recommended operating conditions (see Note 3)  
SN54ABTH25245 SN74ABTH25245  
UNIT  
MIN  
4.5  
2
MAX  
MIN  
4.5  
2
MAX  
V
CC  
V
IH  
V
IL  
V
I
Supply voltage  
5.5  
5.5  
V
V
High-level input voltage  
Low-level input voltage  
Input voltage  
0.8  
0.8  
V
0
V
0
V
V
CC  
CC  
I
Input clamp current  
–18  
–80  
–32  
188  
64  
–18  
–80  
–32  
188  
64  
mA  
IK  
A port  
I
High-level output current  
Low-level output current  
Input transition rise or fall rate  
mA  
mA  
OH  
OL  
B port  
A port  
I
B port  
Control inputs  
A or B ports  
4
4
t/v  
t/V  
Outputs enabled  
ns/V  
10  
10  
Power-up ramp rate  
200  
–55  
200  
–40  
µs/V  
°C  
CC  
T
Operating free-air temperature  
125  
85  
A
NOTE 3: Unused control pins must be held high or low to prevent them from floating.  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ABTH25245, SN74ABTH25245  
25-OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS251F – JUNE 1992 – REVISED MAY 1997  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
SN54ABTH25245  
SN74ABTH25245  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN TYP  
MAX  
MIN TYP  
MAX  
V
V
V
V
V
V
V
= 4.5 V,  
= 4.75 V,  
= 4.5 V,  
= 4.5 V,  
= 5 V,  
I = –18 mA  
–1.2  
–1.2  
V
IK  
CC  
CC  
CC  
CC  
CC  
CC  
I
I
I
I
I
I
I
I
I
= –3 mA  
= –80 mA  
= –3 mA  
= –3 mA  
= –32 mA  
= 94 mA  
= 188 mA  
= 64 mA  
2.7  
2.4  
2.5  
3
2.7  
2.4  
2.5  
3
OH  
OH  
OH  
OH  
OH  
OL  
OL  
OL  
A port  
V
OH  
V
V
B port  
= 4.5 V,  
2*  
2
0.55  
0.7  
0.55  
0.7  
A port  
B port  
V
= 4.5 V  
= 4.5 V,  
CC  
CC  
V
V
OL  
V
0.55*  
0.55  
100  
100  
mV  
hys  
Control inputs  
A or B ports  
V
V
= 0 to 5.5 V,  
V = V  
or GND  
or GND  
±1  
±1  
CC  
I
CC  
CC  
I
I
µA  
I
= 2.1 V to 5.5 V,  
V = V  
I
±20  
±20  
CC  
V = 0.8 V  
I
100  
100  
A or B ports  
V
CC  
= 4.5 V  
µA  
I(hold)  
V = 2 V  
I
–100  
–100  
V
V
V
V
V
= 0 to 2.1 V, V = 0.5 V to 2.7 V, OE = X  
O
±50  
±50  
±100  
50  
±50  
±50  
±100  
50  
µA  
µA  
µA  
µA  
mA  
µA  
mA  
µA  
I
I
I
I
I
CC  
CC  
CC  
CC  
CC  
OZPU  
OZPD  
off  
= 2.1 V to 0, V = 0.5 V to 2.7 V, OE = X  
O
= 0,  
V or V 4.5 V  
I
O
= 5.5 V,  
= 5.5 V,  
V
O
V
O
= 5.5 V  
CEX  
§
B port  
= 2.5 V  
–50  
–210  
500  
20  
–50  
–210  
500  
20  
O
Outputs high  
Outputs low  
V
CC  
= 5.5 V,  
I
Outputs open,  
CC  
V = V  
I
or GND  
CC  
Outputs disabled  
500  
500  
V
= 5.5 V, One input at 3.4 V,  
CC  
Other inputs at V  
1
1
mA  
I  
CC  
or GND  
CC  
C
C
Control inputs  
A or B ports  
V
V
= 5 V,  
= 5 V,  
V = V  
or GND  
4
4
pF  
pF  
i
CC  
I
CC  
= V or GND  
CC  
V
O
11.5  
11.5  
io  
CC  
* On products compliant to MIL-PRF-38535, this parameter does not apply.  
§
All typical values are at V  
= 5 V, T = 25°C.  
A
CC  
This parameter is characterized, but not production tested.  
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.  
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V or GND.  
CC  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ABTH25245, SN74ABTH25245  
25-OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS251F – JUNE 1992 – REVISED MAY 1997  
switching characteristics over recommended ranges of supply voltage and operating free-air  
temperature, C = 50 pF (unless otherwise noted) (see Figure 1)  
L
V
T
= 5 V,  
= 25°C  
CC  
A
SN54ABTH25245 SN74ABTH25245  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
1
TYP  
2.3  
2.4  
3.7  
4
MAX  
3.5  
3.5  
5.4  
5.8  
6.1  
5.8  
MIN  
1
MAX  
MIN  
1
MAX  
3.9  
4.3  
6.5  
6.8  
7.2  
6.4  
t
t
t
t
t
t
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
A or B  
B or A  
A or B  
A or B  
ns  
ns  
ns  
1
1
1
1.5  
1.4  
2
1.5  
1.4  
2
1.5  
1.4  
2
OE  
OE  
4.3  
3.9  
2
2
2
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ABTH25245, SN74ABTH25245  
25-OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS251F – JUNE 1992 – REVISED MAY 1997  
PARAMETER MEASUREMENT INFORMATION  
7 V  
S1  
500 Ω  
Open  
GND  
From Output  
Under Test  
TEST  
S1  
t
t
/t  
Open  
7 V  
PLH PHL  
/t  
C
= 50 pF  
L
t
500 Ω  
PLZ PZL  
/t  
(see Note A)  
Open  
PHZ PZH  
LOAD CIRCUIT  
3 V  
0 V  
Timing Input  
Data Input  
1.5 V  
t
w
t
t
h
su  
3 V  
3 V  
0 V  
Input  
Input  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
0 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
3 V  
0 V  
3 V  
0 V  
Output  
Control  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
t
PZL  
t
t
PHL  
PLH  
t
PLZ  
Output  
Waveform 1  
S1 at 7 V  
V
V
3.5 V  
OH  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
Output  
V
V
+ 0.3 V  
– 0.3 V  
OL  
V
OL  
OL  
(see Note B)  
t
PHZ  
t
PLH  
t
t
PZH  
PHL  
Output  
Waveform 2  
S1 at Open  
(see Note B)  
V
OH  
V
V
OH  
OH  
1.5 V  
1.5 V  
Output  
0 V  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A.  
C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time with one transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
BE FULLY AT THE CUSTOMER’S RISK.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 1998, Texas Instruments Incorporated  

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