SN74AC245IDWREP [TI]
OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS; 八路缓冲器/驱动器，具有三态输出
| 型号： | SN74AC245IDWREP |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS |
| 文件： | 总10页 (文件大小：244K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢃ ꢇꢈ ꢉꢊ
ꢋ ꢅꢌꢄꢍ ꢎꢏꢀ ꢌ ꢐꢄꢁ ꢀꢅ ꢉ ꢑꢒ ꢉ ꢐ
ꢓ ꢑꢌ ꢔ ꢕ ꢈꢀꢌꢄꢌ ꢉ ꢋ ꢏꢌ ꢊ ꢏꢌꢀ
SCAS780 − OCTOBER 2004
DW PACKAGE
(TOP VIEW)
D
D
Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
DIR
A1
A2
A3
A4
A5
A6
A7
V
1
2
3
4
5
6
7
8
9
10
20
CC
Enhanced Diminishing Manufacturing
Sources (DMS) Support
19 OE
18
17
16
15
14
13
12
11
B1
B2
B3
B4
B5
B6
B7
B8
D
D
D
D
D
Enhanced Product-Change Notification
†
Qualification Pedigree
2-V to 6-V V
Operation
CC
Inputs Accept Voltages to 6 V
Max t of 7 ns at 5 V
pd
A8
GND
†
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
description/ordering information
The SN74AC245 octal bus transceiver is designed for asynchronous two-way communication between data
buses. The control-function implementation minimizes external timing requirements.
When the output-enable (OE) is low, the device passes noninverted data from the A bus to the B bus or from
the B bus to the A bus, depending on the logic level at the direction control (DIR) input. A high on OE disables
the device so that the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE should be tied to V
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
through a pullup
CC
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
‡
PACKAGE
T
A
−40°C to 85°C
SOIC − DW
Tape and reel SN74AC245IDWREP
SAC245IEP
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
OPERATION
DIR
OE
L
L
H
L
H
X
B data to A bus
A data to B bus
Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2004, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢃ ꢇꢈꢉ ꢊ
ꢋꢅ ꢌꢄ ꢍ ꢎ ꢏꢀ ꢌ ꢐ ꢄꢁ ꢀꢅ ꢉꢑ ꢒ ꢉ ꢐ
ꢓꢑ ꢌ ꢔ ꢕ ꢈꢀꢌꢄꢌ ꢉ ꢋꢏꢌ ꢊ ꢏꢌꢀ
SCAS780 − OCTOBER 2004
logic diagram (positive logic)
1
2
DIR
A1
19
18
OE
B1
To Seven Other Channels
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA
Package thermal impedance, θ (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
JA
Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢅꢌꢄꢍ ꢎꢏꢀ ꢌ ꢐꢄꢁꢀ ꢅꢉ ꢑ ꢒꢉ ꢐ
ꢓ ꢑꢌ ꢔ ꢕ ꢈꢀꢌꢄꢌ ꢉ ꢋ ꢏꢌ ꢊ ꢏꢌꢀ
ꢋ
SCAS780 − OCTOBER 2004
recommended operating conditions (see Note 3)
MIN
2
MAX
UNIT
V
Supply voltage
6
V
CC
IH
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 3 V
2.1
= 4.5 V
= 5.5 V
= 3 V
3.15
3.85
V
High-level input voltage
V
V
0.9
1.35
1.65
= 4.5 V
= 5.5 V
V
Low-level input voltage
IL
V
V
Input voltage
0
0
V
V
V
V
I
CC
Output voltage
O
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 3 V
−12
−24
−24
12
= 4.5 V
= 5.5 V
= 3 V
I
High-level output current
Low-level output current
mA
mA
OH
= 4.5 V
= 5.5 V
24
I
OL
24
Dt/Dv
Input transition rise or fall rate
Operating free-air temperature
8
ns/V
T
A
−40
85
°C
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢃ ꢇꢈꢉ ꢊ
ꢋꢅ ꢌꢄ ꢍ ꢎ ꢏꢀ ꢌ ꢐ ꢄꢁ ꢀꢅ ꢉꢑ ꢒ ꢉ ꢐ
ꢓꢑ ꢌ ꢔ ꢕ ꢈꢀꢌꢄꢌ ꢉ ꢋꢏꢌ ꢊ ꢏꢌꢀ
SCAS780 − OCTOBER 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
PARAMETER
TEST CONDITIONS
V
MIN
MAX
UNIT
CC
MIN
2.9
TYP
MAX
3 V
2.9
4.4
4.5 V
5.5 V
3 V
4.4
I
I
= −50 mA
OH
5.4
5.4
= −12 mA
2.56
3.86
4.86
2.46
3.76
4.76
3.85
V
OH
V
OH
4.5 V
5.5 V
5.5 V
3 V
I
I
= −24 mA
= −75 mA
OH
†
OH
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.44
0.44
0.44
1.65
1
4.5 V
5.5 V
3 V
I
I
= 50 mA
OL
0.1
= 12 mA
= 24 mA
0.36
0.36
0.36
V
OL
V
OL
4.5 V
5.5 V
5.5 V
I
I
OL
†
= 75 mA
OL
‡
A or B ports
0.1
0.1
0.5
4
I
V = V
or GND
5.5 V
mA
I
I
CC
OE or DIR
1
I
I
V
= V
CC
or GND,
V (OE) = V or V
I IL IH
5.5 V
5.5 V
5 V
5
mA
mA
pF
pF
OZ
O
V = V
or GND,
or GND
I = 0
O
40
CC
I
CC
C
C
V = V
4.5
15
i
I
CC
V
= V
O CC
or GND
5 V
io
†
‡
Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.
For I/O ports, the parameter I includes the input leakage current.
OZ
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V " 0.3 V (unless otherwise noted) (see Figure 1)
CC
T = 25°C
A
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
ns
MIN
1.5
1.5
2.5
2.5
2
TYP
5
MAX
8.5
t
t
1
1
9
9
PLH
PHL
PZH
A or B
OE
B or A
A or B
A or B
5
8.5
t
7
11.5
12
2
12.5
13.5
12.5
13
ns
t
7.5
6.5
7
2
PZL
t
12
1
PHZ
ns
OE
t
2
11.5
1.5
PLZ
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢓ ꢑꢌ ꢔ ꢕ ꢈꢀꢌꢄꢌ ꢉ ꢋ ꢏꢌ ꢊ ꢏꢌꢀ
SCAS780 − OCTOBER 2004
switching characteristics over recommended operating free-air temperature range,
= 5 V " 5 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
TYP
3.5
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
ns
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
6.5
6
t
t
1
1
1
1
1
1
7
7
PLH
PHL
PZH
A or B
OE
B or A
A or B
A or B
3.5
t
5
8.5
9
9
ns
t
5.5
9.5
10
10
PZL
t
5.5
9
PHZ
ns
OE
t
5.5
9
PLZ
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
Power dissipation capacitance per transceiver
TEST CONDITIONS
TYP
UNIT
C
C
= 50 pF,
L
f = 1 MHz
45
pF
pd
PARAMETER MEASUREMENT INFORMATION
2 × V
CC
TEST
S1
S1
t
/t
Open
500 Ω
Open
PLH PHL
From Output
Under Test
t
/t
2 × V
CC
PLZ PZL
t
/t
Open
PHZ PZH
C
= 50 pF
L
500 Ω
(see Note A)
LOAD CIRCUIT
50%
Output
Control
(low-level
enabling)
V
CC
V
50% V
CC
50% V
CC
CC
Input
50%
0 V
0 V
PHL
t
t
PLZ
PZL
t
t
PLH
Output
Waveform 1
≈V
CC
V
OH
50% V
CC
In-Phase
Output
V
OL
+ 0.3 V
S1 at 2 × V
(see Note B)
50% V
CC
50% V
CC
CC
V
OL
V
OL
t
t
PZH
PHZ
− 0.3 V
t
t
PLH
PHL
Output
Waveform 2
S1 at Open
(see Note B)
V
OH
V
OH
V
OH
Out-of-Phase
Output
50% V
CC
50% V
CC
50% V
CC
≈0 V
V
OL
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
C includes probe and jig capacitance.
L
NOTES: A.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t v 2.5 ns, t v 2.5 ns.
O
r
f
D. The outputs are measured one at a time, with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
SN74AC245IDWREP
V62/04760-01XE
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
DW
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
DW
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74AC245-EP :
Catalog: SN74AC245
Military: SN54AC245
•
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Military - QML certified for Military and Defense Applications
•
•
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
SN74AC245IDWREP
V62/04760-01XE
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
DW
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
DW
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74AC245-EP :
Catalog: SN74AC245
Military: SN54AC245
•
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Military - QML certified for Military and Defense Applications
•
•
Addendum-Page 1
IMPORTANT NOTICE
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and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
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