SN74ACT1071_14 [TI]
10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION;
| 型号： | SN74ACT1071_14 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION |
| 文件： | 总5页 (文件大小：61K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74ACT1071
10-BIT BUS-TERMINATION ARRAY
WITH BUS-HOLD FUNCTION
SCAS192 – D3994, MARCH 1992 – REVISED APRIL 1993
D PACKAGE
(TOP VIEW)
• Designed to Ensure Defined Voltage Levels
on Floating Bus Lines in CMOS Systems
• Reduces Undershoot and Overshoot
D1
D2
GND
GND
D3
1
2
3
4
5
6
7
14 D10
13 D9
Caused By Line Reflections
• Repetitive Peak Forward
12
11
10
9
D8
Current . . . I
= 100 mA
FRM
V
V
CC
CC
• Inputs Are TTL-Voltage Compatible
• Low Power Consumption (Like CMOS)
• ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model
D4
D5
D7
D6
8
(C = 200 pF, R = 0)
• Center-Pin V
and GND Configuration
Minimizes High-Speed Switching Noise
CC
description
This device is designed to terminate bus lines in CMOS systems. The integrated low-impedance diodes clamp
the voltage of undershoots and overshoots caused by line reflections and ensure signal integrity. The device
also contains a bus-hold function that consists of a CMOS-buffer stage with a high-resistance feedback path
between its output and its input. The SN74ACT1071 prevents bus lines from floating without using pullup or
pulldown resistors.
The high-impedance inputs of these internal buffers are connected to the input terminals of the device. The
feedback path on each internal buffer stage keeps a bus line tied to the bus holder at the last valid logic state
generated by an active driver before the bus switches to the high-impedance state.
The SN74ACT1071 is characterized for operation from –40°C to 85°C.
logic diagram, one of ten channels (positive logic)
1
D1
11
V
V
CC
10
CC
TG
3
4
GND
GND
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
4–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ACT1071
10-BIT BUS-TERMINATION ARRAY
WITH BUS-HOLD FUNCTION
SCAS192 – D3994, MARCH 1992 – REVISED APRIL 1993
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
I
CC
Continuous input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
I
CC
Positive-peak input clamp current, I (V > V ) (t < 1 µs, duty cycle < 20%) . . . . . . . . . . . . . . . . . 100 mA
Negative-peak input clamp current, I (V < 0) (t < 1 µs, duty cycle < 20%) . . . . . . . . . . . . . . . . . . –100 mA
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
IK
I
CC
w
IK
I
w
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input negative-voltage rating may be exceeded if the input clamp-current rating is observed.
recommended operating conditions
MIN
4.5
MAX
UNIT
V
V
V
V
V
Supply voltage
5.5
CC
IH
IL
I
High-level input voltage
Low-level input voltage
Input voltage
2.5
V
0.8
V
0
V
CC
85
V
T
A
Operating free-air temperature
–40
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
TA = 25°C
PARAMETER
TEST CONDITIONS
V = 0.8 V
MIN
MAX
UNIT
†
MIN TYP
MAX
I
I
V
V
= 4.5 to 5.5 V,
= 4.5 to 5.5 V,
0.15
–0.2
0.3
0.9
0.1
1
–1.5
–1.5
mA
mA
V
IL
CC
I
V = 2.5 V
I
–0.5
–1.4 –0.15
–1.5
IH
CC
V
IKL
I
I
= –18 mA
= 18 mA
IN
V
V
+2
4
V
CC
+2
40
1
V
IKH
‡
IN
CC
I
V
= 5.5 V,
Inputs open
µA
mA
pF
CC
CC
One input at 3.4 V,
V = V or GND
§
∆I
CC
Other inputs at V
or GND
0.9
CC
C
3
i
I
CC
†
‡
§
All typical values are at V
= 5 V.
CC
Inputs may be set high or low prior to the I
CC
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or V
measurement.
.
CC
4–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ACT1071
10-BIT BUS-TERMINATION ARRAY
WITH BUS-HOLD FUNCTION
SCAS192 – D3994, MARCH 1992 – REVISED APRIL 1993
TYPICAL CHARACTERISTICS
FORWARD CURRENT
vs
FORWARD CURRENT
vs
INPUT VOLTAGE
(UPPER CLAMPING DIODE)
INPUT VOLTAGE
(LOWER CLAMPING DIODE)
60
55
50
45
5
0
– 5
– 10
– 15
– 20
– 25
40
35
30
25
– 30
– 35
20
– 40
– 45
15
10
5
– 50
– 55
– 60
0
5.5
6
6.5
7
7.5
8
8.5
9
–2 –1.75 –1.5 –1.25 –1 – 0.75 – 0.5 – 0.25
0
V – Input Voltage – V
I
V – Input Voltage – V
I
Figure 1
Figure 2
INPUT CURRENT
vs
SUPPLY CURRENT
vs
INPUT VOLTAGE
INPUT VOLTAGE
1
0.8
0.6
0.4
0.2
0
5
4.5
4
3.5
3
2.5
2
– 0.2
– 0.4
1.5
– 0.6
– 0.8
–1
1
0.5
0
0
1
2
3
4
5
6
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
V – Input Voltage – V
I
V – Input Voltage – V
I
Figure 3
Figure 4
4–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ACT1071
10-BIT BUS-TERMINATION ARRAY
WITH BUS-HOLD FUNCTION
SCAS192 – D3994, MARCH 1992 – REVISED APRIL 1993
APPLICATION INFORMATION
The SN74ACT1071 terminates the output of a driving device and holds the input of the driven device at the logic level
of the driver output prior to establishment of the high-impedance state on that output (see Figure 5).
Bus
Typical Output
CMOS Input
Input
Output
D1 (external connection point)
V
CC
10 11
1
SN74ACT1071
3
4
GND
Figure 5. Bus-Hold Application
4–4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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Copyright 1998, Texas Instruments Incorporated
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