SN74ACT1284PWE4 [TI]
7-BIT BUS INTERFACES WITH 3-STATE OUTPUTS; 具有三态输出的7位总线接口
| 型号： | SN74ACT1284PWE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 7-BIT BUS INTERFACES WITH 3-STATE OUTPUTS |
| 文件： | 总12页 (文件大小：287K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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SCAS459D − NOVEMBER 1994 − REVISED OCTOBER 2003
SN54ACT1284 . . . J OR W PACKAGE
SN74ACT1284 . . . DB, DW, NS, OR PW PACKAGE
(TOP VIEW)
D
D
D
D
D
D
D
4.5-V to 5.5-V V
Operation
CC
Inputs Accept Voltages to 5.5 V
Max t of 20 ns at 5 V
pd
3-State Outputs Directly Drive Bus Lines
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
A1
A2
A3
B1
B2
B3
B4
Flow-Through Architecture Optimizes PCB
Layout
A4
Center-Pin V
and GND Configurations
CC
GND
GND
A5
A6
A7
V
V
CC
CC
Minimize High-Speed Switching Noise
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
B5
B6
B7
HD
D
Designed for the IEEE 1284-I (Level-1 Type)
and IEEE 1284-II (Level-2 Type) Electrical
Specifications
DIR
SN54ACT1284 . . . FK PACKAGE
(TOP VIEW)
description/ordering information
The ’ACT1284 devices are designed for
asynchronous two-way communication between
data buses. The control function minimizes
external timing requirements.
3
2
1 20 19
18
B3
B4
V
A4
GND
GND
A5
4
5
6
7
8
17
16
15
14
CC
The devices allow data transmission in either the
A-to-B or the B-to-A direction for bits 1, 2, 3, and
4, depending on the logic level at the
direction-control (DIR) input. Bits 5, 6, and 7,
however, always transmit in the A-to-B direction.
V
CC
B5
A6
9 10 11 12 13
The output drive for each mode is determined by the high-drive (HD) control pin. When HD is high, the high drive
is delivered by the totem-pole configuration, and when HD is low, the outputs are open drain. This meets the
drive requirements as specified in the IEEE 1284-I (level-1 type) and the IEEE 1284-II (level-2 type) parallel
peripheral-interface specification.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
Tube
SN74ACT1284DW
SN74ACT1284DWR
SN74ACT1284NSR
SN74ACT1284DBR
SN74ACT1284PW
SN74ACT1284PWR
SNJ54ACT1284J
SOIC − DW
ACT1284
Tape and reel
Tape and reel
Tape and reel
Tube
SOP − NS
ACT1284
AU284
0°C to 70°C
SSOP − DB
TSSOP − PW
AU284
Tape and reel
Tube
CDIP − J
CFP − W
LCCC − FK
SNJ54ACT1284J
SNJ54ACT1284W
SNJ54ACT1284FK
Tube
SNJ54ACT1284W
SNJ54ACT1284FK
−55°C to 125°C
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SCAS459D − NOVEMBER 1994 − REVISED OCTOBER 2003
FUNCTION TABLE
INPUTS
OUTPUT
MODE
DIR
HD
Open drain
Totem pole
Totem pole
Open drain
Totem pole
A to B: Bits 5, 6, 7
B to A: Bits 1, 2, 3, 4
L
L
L
H
H
H
L
B to A: Bits 1, 2, 3, 4 and A to B: Bits 5, 6, 7
A to B: Bits 1, 2, 3, 4, 5, 6, 7
A to B: Bits 1, 2, 3, 4, 5, 6, 7
H
logic diagram (positive logic)
HD
DIR
A1, A2, A3, A4
B1, B2, B3, B4
A5, A6, A7
B5, B6, B7
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SCAS459D − NOVEMBER 1994 − REVISED OCTOBER 2003
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
B-port input and output voltage range, V and V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . −2 V to 7 V
A-port input and output voltage range, V and V (see Note 1) . . . . . . . . . . . . . . . . . . . . −0.5 V to V + 0.5 V
I
O
I
O
CC
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
200 mA
Package thermal impedance, θ (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
JA
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The ac input voltage pulse duration is limited to 20 ns if the input voltage goes more negative than −0.5 V.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 4)
SN54ACT1284 SN74ACT1284
UNIT
MIN
4.7
2
MAX
MIN
4.7
2
MAX
V
V
V
V
V
Supply voltage
5.5
5.5
V
V
V
V
V
CC
IH
IL
I
High-level input voltage
Low-level input voltage
Input voltage
0.8
0.8
0
0
V
CC
5.5
0
0
V
CC
5.5
Open-drain output voltage
HD low
O
B port, HD high
A port
−14
−4
14
−14
−4
14
4
I
High-level output current
mA
OH
OL
B port
I
Low-level output current
mA
A port
4
T
A
Operating free-air temperature
−55
125
0
70
°C
NOTE 4: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
CC
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3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SCAS459D − NOVEMBER 1994 − REVISED OCTOBER 2003
electrical characteristics over recommended ranges of operating free-air temperature and supply
voltage (unless otherwise noted)
SN54ACT1284
SN74ACT1284
†
PARAMETER
TEST CONDITIONS
UNIT
V
CC
MIN
0.4
0.2
2.4
TYP
MAX
MIN
0.4
0.2
2.4
TYP
MAX
5 V
Input
hysteresis
V
V
V
− V
IT+ IT−
for all inputs
V
hys
4.7 V
4.7 V
B port
I
I
= −14 mA
OH
MIN
to MAX
= −50 µA
V
CC
−0.2
3.7
V
CC
−0.2
3.7
V
OH
OH
A port
I
I
I
I
= −4 mA
=14 mA
= 50 µA
= 4 mA
4.7 V
4.7 V
OH
OL
OL
OL
B port
A port
0.4
0.2
0.4
1
0.4
0.2
0.4
1
V
V
OL
4.7 V
I
I
I
I
V = V
CC
or GND
or GND
5.5 V
5.5 V
0 V
µA
µA
µA
mA
pF
pF
Ω
I
I
‡
A or B ports
V
= V
20
20
OZ
off
O CC
B port
V or V ≤ 7 V
100
1.5
100
1.5
I
O
V = V
I
or GND,
or GND
I = 0
O
5.5 V
5 V
CC
CC
C
C
Control inputs V = V
4
4
i
I
CC
A or B ports
B port
V
O
= V
or GND
= −20 mA,
5 V
12
12
io
O
CC
Z
I
I = −50 mA
OH
5 V
8
30
8
30
OH
†
‡
For I/O ports, the parameter I
OZ
includes the input leakage current I .
I
For conditions shown as MIN or MAX, use the appropriate values under recommended operating conditions.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
SN54ACT1284 SN74ACT1284
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
1
MAX
20
MIN
1
MAX
20
t
t
PLH
Totem pole
A or B
B or A
ns
1
20
1
20
PHL
SR
Totem pole
B output
0.05
1
0.4
20
0.05
1
0.4
20
V/ns
t
t
(EN)
pd
Totem pole
Open drain
HD
A
B
B
ns
ns
(DIS)
pd
1
20
1
20
t , t
r f
120
120
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4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SCAS459D − NOVEMBER 1994 − REVISED OCTOBER 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
From B Output
Under Test
3 V
0 V
Input
(see Note C)
62 Ω
C
= 50 pF
1.5 V
t
1.5 V
t
L
(see Note A)
TP1
Output
(see Note D)
t
PHL
Sink Load
PLH
PHL
33 Ω
V
OH
V
OH
V
OL
+ 1.4 V
V
OH
− 1.4 V
V
OL
V
OL
Source Load
C
t
PLH
62 Ω
VOLTAGE WAVEFORMS MEASURED AT TP1
PROPAGATION DELAY TIMES (A to B)
= 50 pF
L
(see Note A)
A-TO-B LOAD (totem pole)
3 V
0 V
Input
(see Note F)
V
CC
1.5 V
1.5 V
V
OH
OL
2 V
0.8 V
2 V
0.8 V
TP1
V
OL
V
500 Ω
(see Note E)
t
t
f
r
From B Output
VOLTAGE WAVEFORMS MEASURED AT TP1 (B SIDE)
C
= 50 pF
L
(see Note A)
A-TO-B LOAD (open drain)
3 V
0 V
Input
(see Note F)
1.5 V
1.5 V
From A Output
Under Test
t
t
PHL
PLH
V
V
OH
C
= 50 pF
L
500 Ω
Output
50% V
CC
50% V
CC
(see Note A)
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (B to A)
B-TO-A LOAD (totem pole)
NOTES: A. CL includes probe and jig capacitance.
B. The outputs are measured one at a time with one transition per measurement.
C. Input rise and fall times are 3 ns, 150 ns < pulse duration <10 µs for both low-to-high and high-to-low transitions.
D. Slew rate is defined as 10% and 90% of the transition times.
E. Rise and fall times, open drain, are <120 ns.
F. Input rise and fall times are 3 ns.
Figure 1. Load Circuits and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
SSOP
SSOP
Drawing
SN74ACT1284DBLE
SN74ACT1284DBR
OBSOLETE
ACTIVE
DB
20
20
TBD
Call TI
Call TI
DB
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ACT1284DBRE4
SN74ACT1284DW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SOIC
SOIC
SOIC
SOIC
SO
DB
DW
DW
DW
DW
NS
20
20
20
20
20
20
20
20
20
20
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ACT1284DWE4
SN74ACT1284DWR
SN74ACT1284DWRE4
SN74ACT1284NSR
SN74ACT1284NSRE4
SN74ACT1284PW
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
NS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
PW
PW
PW
PW
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ACT1284PWE4
SN74ACT1284PWR
SN74ACT1284PWRE4
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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