SN74ACT14DRE4 [TI]
HEX SCHMITT-TRIGGER INVERTER;
| 型号： | SN74ACT14DRE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | HEX SCHMITT-TRIGGER INVERTER |
| 文件： | 总20页 (文件大小：1138K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢃ ꢈ ꢀꢁꢉ ꢃꢄ ꢅꢆ ꢇꢃ
ꢊꢋꢌ ꢀꢅꢊ ꢍꢎ ꢆꢆꢏꢆ ꢐꢎꢑ ꢑ ꢋꢐ ꢎ ꢁꢒ ꢋ ꢐꢆ ꢋꢐ
SCAS557H − DECEMBER 1995 − REVISED NOVEMBER 2004
D
D
4.5-V to 5.5-V V
Operation
D
D
Max t of 11 ns at 5 V
pd
Inputs Are TTL-Voltage Compatible
CC
Inputs Accept Voltages to 5.5 V
SN54ACT14 . . . J OR W PACKAGE
SN74ACT14 . . . D, DB, N, NS. OR PW PACKAGE
(TOP VIEW)
SN54ACT14 . . . FK PACKAGE
(TOP VIEW)
1A
1Y
V
CC
1
2
3
4
5
6
7
14
3
2
1 20 19
18
13 6A
12 6Y
11 5A
6Y
NC
5A
NC
5Y
2A
NC
2Y
4
5
6
7
8
2A
17
16
15
14
2Y
10
9
3A
5Y
4A
4Y
NC
3A
3Y
8
GND
9 10 11 12 13
NC − No internal connection
description/ordering information
These Schmitt-trigger devices contain six independent inverters. They perform the Boolean function Y = A.
Because of the Schmitt action, they have different input threshold levels for positive-going (V ) and for
T+
negative-going (V ) signals.
T−
These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give
clean, jitter-free output signals. They also have a greater noise margin than conventional inverters.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
SOIC − D
Tube
SN74ACT14N
SN74ACT14N
Tube
SN74ACT14D
ACT14
Tape and reel
Tape and reel
Tape and reel
Tube
SN74ACT14DR
SN74ACT14NSR
SN74ACT14DBR
SN74ACT14PW
SN74ACT14PWR
SNJ54ACT14J
SNJ54ACT14W
SNJ54ACT14FK
SOP − NS
ACT14
AD14
−40°C to 85°C
SSOP − DB
TSSOP − PW
AD14
Tape and reel
Tube
CDIP − J
CFP − W
LCCC − FK
SNJ54ACT14J
SNJ54ACT14W
SNJ54ACT14FK
Tube
−55°C to 125°C
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H
L
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2004, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢇꢃ ꢈ ꢀꢁꢉ ꢃ ꢄꢅ ꢆꢇ ꢃ
ꢊ ꢋꢌ ꢀꢅ ꢊ ꢍꢎ ꢆ ꢆꢏꢆ ꢐꢎ ꢑꢑ ꢋ ꢐ ꢎ ꢁꢒ ꢋ ꢐꢆ ꢋꢐ
SCAS557H − DECEMBER 1995 − REVISED NOVEMBER 2004
logic diagram, each inverter (positive logic)
A
Y
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
JA
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54ACT14
SN74ACT14
UNIT
MIN
4.5
0
MAX
MIN
4.5
0
MAX
V
V
V
Supply voltage
5.5
5.5
V
V
CC
Input voltage
V
V
V
V
I
CC
CC
Output voltage
0
0
V
O
CC
CC
I
I
High-level output current
Low-level output current
Operating free-air temperature
−24
24
−24
24
mA
mA
°C
OH
OL
T
−55
125
−40
85
A
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢃ ꢈ ꢀꢁ ꢉꢃ ꢄꢅ ꢆꢇ ꢃ
ꢊꢋꢌ ꢀꢅꢊ ꢍꢎ ꢆꢆꢏꢆ ꢐꢎꢑ ꢑ ꢋꢐ ꢎ ꢁꢒ ꢋ ꢐꢆ ꢋꢐ
SCAS557H − DECEMBER 1995 − REVISED NOVEMBER 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
TYP
1.5
SN54ACT14
SN74ACT14
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
1.2
MAX
1.9
2.1
1.2
1.4
1.4
1.5
MIN
1.2
1.4
0.5
0.6
0.4
0.4
4.4
5.4
3.7
4.7
3.85
MAX
1.9
2.1
1.2
1.4
1.4
1.5
MIN
1.2
MAX
1.9
2.1
1.2
1.4
1.4
1.5
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
V
T+
Positive-going threshold
V
V
V
1.4
1.7
1.4
0.5
0.9
0.5
V
T−
Negative-going threshold
0.6
1
0.6
0.4
0.6
0.4
∆V
T
Hysteresis (V − V
)
0.4
0.6
0.4
T+ T−
4.4
4.49
5.49
4.4
I
I
= −50 µA
OH
5.4
5.4
3.86
4.86
3.76
4.76
V
OH
= −24 mA
V
OH
†
†
I
I
= −50 mA
OH
= −75 mA
3.85
OH
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
I
= 50 µA
OL
OL
0.36
0.36
0.5
0.44
0.44
V
OL
I
= 24 mA
V
0.5
†
†
I
I
= 50 mA
1.65
OL
= 75 mA
1.65
1
OL
I
I
V = V
or GND
or GND,
0.1
2
1
µA
µA
I
I
CC
V = V
I
O
= 0
CC
40
20
CC
I
CC
One input at 3.4 V,
Other inputs at GND or V
‡
∆I
CC
5.5 V
5 V
0.6
4.5
1.6
1.5
mA
pF
C
V = V or GND
i
I
CC
†
‡
Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or V
.
CC
switching characteristics over recommended operating free-air temperature range,
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
T = 25°C
A
SN54ACT14
SN74ACT14
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
1.5
MAX
11.5
10
MIN
1
MAX
14
MIN
1
MAX
12.5
11
t
t
PLH
A
ns
Y
1.5
1
13
1
PHL
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= 50 pF, f = 1 MHz
TYP
UNIT
C
Power dissipation capacitance
C
20
pF
pd
L
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢇꢃ ꢈ ꢀꢁꢉ ꢃ ꢄꢅ ꢆꢇ ꢃ
ꢊ ꢋꢌ ꢀꢅ ꢊ ꢍꢎ ꢆ ꢆꢏꢆ ꢐꢎ ꢑꢑ ꢋ ꢐ ꢎ ꢁꢒ ꢋ ꢐꢆ ꢋꢐ
SCAS557H − DECEMBER 1995 − REVISED NOVEMBER 2004
PARAMETER MEASUREMENT INFORMATION
3 V
0 V
Input
(see Note B)
TEST
/t
S1
1.5 V
1.5 V
t
Open
PLH PHL
t
t
PHL
PLH
PHL
2 × V
CC
V
OH
In-Phase
Output
S1
50% V
CC
50% V
Open
500 Ω
CC
V
From Output
Under Test
OL
t
t
C
= 50 pF
PLH
L
500 Ω
(see Note A)
V
OH
50% V
CC
Out-of-Phase
Output
50% V
CC
V
OL
LOAD CIRCUIT
C includes probe and jig capacitance.
L
VOLTAGE WAVEFORMS
NOTES: A.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
C. The outputs are measured one at a time, with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
5962-9218301M2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
5962-
9218301M2A
SNJ54ACT
14FK
5962-9218301MCA
5962-9218301MDA
SN74ACT14D
ACTIVE
ACTIVE
ACTIVE
CDIP
CFP
J
14
14
14
1
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
-55 to 125
-55 to 125
-40 to 85
5962-9218301MC
A
SNJ54ACT14J
W
D
5962-9218301MD
A
SNJ54ACT14W
SOIC
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
ACT14
SN74ACT14DBLE
SN74ACT14DBR
OBSOLETE
ACTIVE
SSOP
SSOP
DB
DB
14
14
TBD
Call TI
Call TI
-40 to 85
-40 to 85
2000
2000
2000
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AD14
SN74ACT14DBRE4
SN74ACT14DBRG4
SN74ACT14DE4
SN74ACT14DG4
SN74ACT14DR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SO
DB
DB
D
14
14
14
14
14
14
14
14
14
14
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
AD14
Green (RoHS
& no Sb/Br)
AD14
Green (RoHS
& no Sb/Br)
ACT14
D
50
Green (RoHS
& no Sb/Br)
ACT14
D
2500
2500
2500
25
Green (RoHS
& no Sb/Br)
ACT14
SN74ACT14DRE4
SN74ACT14DRG4
SN74ACT14N
D
Green (RoHS
& no Sb/Br)
ACT14
D
Green (RoHS
& no Sb/Br)
ACT14
N
Pb-Free
(RoHS)
SN74ACT14N
SN74ACT14N
ACT14
SN74ACT14NE4
SN74ACT14NSR
N
25
Pb-Free
(RoHS)
N / A for Pkg Type
NS
2000
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
SN74ACT14NSRE4
SN74ACT14NSRG4
SN74ACT14PW
ACTIVE
SO
NS
14
14
14
14
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
ACT14
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
NS
PW
PW
PW
2000
90
Green (RoHS
& no Sb/Br)
-40 to 85
ACT14
AD14
AD14
AD14
TSSOP
TSSOP
TSSOP
Green (RoHS
& no Sb/Br)
-40 to 85
SN74ACT14PWE4
SN74ACT14PWG4
90
Green (RoHS
& no Sb/Br)
-40 to 85
90
Green (RoHS
& no Sb/Br)
-40 to 85
SN74ACT14PWLE
SN74ACT14PWR
OBSOLETE
ACTIVE
TSSOP
TSSOP
PW
PW
14
14
TBD
Call TI
Call TI
-40 to 85
-40 to 85
2000
2000
2000
1
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
AD14
AD14
AD14
SN74ACT14PWRE4
SN74ACT14PWRG4
SNJ54ACT14FK
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
LCCC
PW
PW
FK
14
14
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
POST-PLATE
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-40 to 85
-40 to 85
-55 to 125
Green (RoHS
& no Sb/Br)
TBD
5962-
9218301M2A
SNJ54ACT
14FK
SNJ54ACT14J
SNJ54ACT14W
ACTIVE
ACTIVE
CDIP
CFP
J
14
14
1
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
5962-9218301MC
A
SNJ54ACT14J
W
5962-9218301MD
A
SNJ54ACT14W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54ACT14, SN74ACT14 :
Catalog: SN74ACT14
•
Military: SN54ACT14
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Jul-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74ACT14DBR
SN74ACT14DR
SN74ACT14PWR
SSOP
SOIC
DB
D
14
14
14
2000
2500
2000
330.0
330.0
330.0
16.4
16.4
12.4
8.2
6.5
6.9
6.6
9.0
5.6
2.5
2.1
1.6
12.0
8.0
16.0
16.0
12.0
Q1
Q1
Q1
TSSOP
PW
8.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Jul-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74ACT14DBR
SN74ACT14DR
SN74ACT14PWR
SSOP
SOIC
DB
D
14
14
14
2000
2500
2000
367.0
333.2
367.0
367.0
345.9
367.0
38.0
28.6
35.0
TSSOP
PW
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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