SN74ACT241NE4 [TI]

OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS; 八路缓冲器/驱动器,具有三态输出
SN74ACT241NE4
型号: SN74ACT241NE4
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
八路缓冲器/驱动器,具有三态输出

驱动器 输出元件
文件: 总16页 (文件大小:645K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN54ACT241, SN74ACT241  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCAS516C – JUNE 1995 – REVISED OCTOBER 2002  
4.5-V to 5.5-V V  
Operation  
Max t of 8.5 ns at 5 V  
pd  
CC  
Inputs Accept Voltages to 5.5 V  
Inputs Are TTL Compatible  
SN54ACT241 . . . FK PACKAGE  
(TOP VIEW)  
SN54ACT241 . . . J OR W PACKAGE  
SN74ACT241 . . . DB, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
3
2
1
20 19  
18  
4
5
6
7
8
1Y1  
2A4  
1Y2  
2A3  
1Y3  
1A2  
2Y3  
1A3  
2Y2  
1A4  
17  
16  
15  
14  
9 10 11 12 13  
13 2A2  
12  
11  
1Y4  
2A1  
description/ordering information  
These octal buffers and line drivers are designed specifically to improve the performance and density of 3-state  
memory address drivers, clock drivers, and bus-oriented receivers and transmitters.  
The ’ACT241 devices are organized as two 4-bit buffers/drivers with separate complementary output-enable  
(1OE and 2OE) inputs. When 1OE is low or 2OE is high, the device passes noninverted data from the A inputs  
to the Y outputs. When 1OE is high or 2OE is low, the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is  
determined by the current-sinking or the current-sourcing capability of the driver.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP – N  
Tube  
SN74ACT241N  
SN74ACT241N  
Tube  
SN74ACT241DW  
SN74ACT241DWR  
SN74ACT241NSR  
SN74ACT241DBR  
SN74ACT241PWR  
SNJ54ACT241J  
SOIC – DW  
ACT241  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
–40°C to 85°C  
SOP – NS  
SSOP – DB  
TSSOP – PW  
CDIP – J  
ACT241  
AD241  
AD241  
SNJ54ACT241J  
SNJ54ACT241W  
SNJ54ACT241FK  
–55°C to 125°C  
CFP – W  
Tube  
SNJ54ACT241W  
SNJ54ACT241FK  
LCCC – FK  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2002, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ACT241, SN74ACT241  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCAS516C JUNE 1995 REVISED OCTOBER 2002  
FUNCTION TABLES  
INPUTS  
OUTPUT  
1Y  
1OE  
1A  
H
L
L
H
L
L
H
X
Z
INPUTS  
OUTPUT  
2Y  
2OE  
H
2A  
H
H
L
H
L
L
X
Z
logic diagram (positive logic)  
1
19  
1OE  
2OE  
9
7
18  
16  
11  
13  
15  
2
1Y1  
1Y2  
2Y1  
2Y2  
1A1  
2A1  
2A2  
4
1A2  
5
3
14  
12  
6
1Y3  
1Y4  
1A3  
2Y3  
2Y4  
2A3  
2A4  
17  
8
1A4  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to V  
+ 0.5 V  
+ 0.5 V  
I
CC  
CC  
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to V  
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA  
IK  
I
I
CC  
Output clamp current, I  
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA  
Continuous current through V  
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA  
JA  
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W  
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W  
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
stg  
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ACT241, SN74ACT241  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCAS516C JUNE 1995 REVISED OCTOBER 2002  
recommended operating conditions (see Note 3)  
SN54ACT241 SN74ACT241  
UNIT  
MIN  
4.5  
2
MAX  
MIN  
4.5  
2
MAX  
V
V
V
V
V
Supply voltage  
5.5  
5.5  
V
V
CC  
IH  
IL  
High-level input voltage  
Low-level input voltage  
Input voltage  
0.8  
0.8  
V
0
0
V
V
0
0
V
V
V
I
CC  
CC  
Output voltage  
V
O
CC  
CC  
I
High-level output current  
Low-level output current  
Input transition rise or fall rate  
Operating free-air temperature  
24  
24  
24  
24  
8
mA  
mA  
ns/V  
°C  
OH  
OL  
I
t/v  
8
T
55  
125  
40  
85  
A
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
A
= 25°C  
TYP  
SN54ACT241 SN74ACT241  
PARAMETER  
TEST CONDITIONS  
V
UNIT  
CC  
MIN  
4.4  
MAX  
MIN  
4.4  
MAX  
MIN  
4.4  
MAX  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
5.5 V  
5.5 V  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
5.5 V  
4.49  
I
I
= 50 µA  
OH  
5.4  
5.49  
5.4  
5.4  
3.86  
4.86  
3.7  
3.76  
4.76  
V
OH  
V
= 24 mA  
OH  
4.7  
I
I
= 50 mA  
= 75 mA  
3.85  
OH  
3.85  
OH  
0.001  
0.001  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
I
= 50 µA  
OL  
OL  
0.36  
0.36  
0.5  
0.44  
0.44  
V
I
I
= 24 mA  
V
OL  
0.5  
I
I
= 50 mA  
1.65  
OL  
= 75 mA  
1.65  
±2.5  
±1  
OL  
V
= V  
or GND  
CC  
±0.25  
±0.1  
4
±5  
±1  
80  
µA  
µA  
µA  
O
OZ  
I
I
V = V  
or GND  
or GND,  
I
CC  
CC  
I
V = V  
I = 0  
O
40  
CC  
I
One input at 3.4 V,  
Other inputs at GND or V  
I  
CC  
5.5 V  
0.6  
1.6  
1.5  
mA  
CC  
C
C
V = V  
or GND  
or GND  
5 V  
5 V  
2.5  
8
pF  
pF  
i
I
CC  
CC  
V = V  
I
o
Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.  
This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or V  
.
CC  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ACT241, SN74ACT241  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCAS516C JUNE 1995 REVISED OCTOBER 2002  
switching characteristics over recommended operating free-air temperature range,  
V
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)  
CC  
T = 25°C  
A
SN54ACT241 SN74ACT241  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
ns  
MIN  
1.5  
1.5  
1.5  
2
TYP  
6
MAX  
8.5  
7.5  
8.5  
9.5  
9.5  
10  
MIN  
1
MAX  
9.5  
9
MIN  
1.5  
1.5  
1
MAX  
9.5  
t
t
t
t
t
t
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
A
Y
Y
Y
5.5  
7
1
8.5  
1
10  
9.5  
ns  
OE or OE  
OE or OE  
7
1
11.5  
11  
1.5  
2
10.5  
10.5  
10.5  
2
8
1
ns  
2.5  
6.5  
1
11.5  
2
operating characteristics, V  
= 5 V, T = 25°C  
A
CC  
PARAMETER  
TEST CONDITIONS  
TYP  
UNIT  
C
Power dissipation capacitance per buffer/driver  
C
= 50 pF,  
L
f = 1 MHz  
45  
pF  
pd  
PARAMETER MEASUREMENT INFORMATION  
2 × V  
CC  
Open  
S1  
TEST  
/t  
S1  
500 Ω  
From Output  
Under Test  
t
Open  
PLH PHL  
t
/t  
2 × V  
CC  
Open  
PLZ PZL  
C
= 50 pF  
L
t
/t  
500 Ω  
PHZ PZH  
(see Note A)  
LOAD CIRCUIT  
Output  
Control  
(low-level  
enabling)  
3 V  
0 V  
1.5 V  
1.5 V  
t
t
PZL  
PLZ  
3 V  
0 V  
Output  
Waveform 1  
V  
CC  
Input  
1.5 V  
1.5 V  
50% V  
CC  
V
V
+ 0.3 V  
S1 at 2 × V  
(see Note B)  
OL  
CC  
V
OL  
t
t
PHL  
PLH  
t
t
PZH  
PHZ  
Output  
Waveform 2  
S1 at Open  
(see Note B)  
V
OH  
V
OH  
0.3 V  
OH  
50% V  
50% V  
Output  
50% V  
CC  
CC  
CC  
V
0 V  
OL  
VOLTAGE WAVEFORMS  
VOLTAGE WAVEFORMS  
NOTES: A.  
C
includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
9-Oct-2007  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
LCCC  
CDIP  
CFP  
Drawing  
5962-89847012A  
5962-8984701RA  
5962-8984701SA  
SN74ACT241DBLE  
SN74ACT241DBR  
ACTIVE  
ACTIVE  
FK  
J
20  
20  
20  
20  
20  
1
1
1
TBD  
TBD  
TBD  
TBD  
POST-PLATE N / A for Pkg Type  
A42 SNPB  
A42  
N / A for Pkg Type  
N / A for Pkg Type  
Call TI  
ACTIVE  
W
OBSOLETE  
ACTIVE  
SSOP  
SSOP  
DB  
DB  
Call TI  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74ACT241DBRE4  
SN74ACT241DBRG4  
SN74ACT241DW  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SSOP  
SSOP  
SOIC  
SOIC  
SOIC  
SOIC  
PDIP  
PDIP  
SO  
DB  
DB  
DW  
DW  
DW  
DW  
N
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74ACT241DWG4  
SN74ACT241DWR  
SN74ACT241DWRG4  
SN74ACT241N  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
20  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
SN74ACT241NE4  
SN74ACT241NSR  
SN74ACT241NSRE4  
SN74ACT241NSRG4  
SN74ACT241PW  
N
20  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
NS  
NS  
NS  
PW  
PW  
PW  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SO  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SO  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TSSOP  
TSSOP  
TSSOP  
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74ACT241PWE4  
SN74ACT241PWG4  
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74ACT241PWLE  
SN74ACT241PWR  
OBSOLETE TSSOP  
PW  
PW  
20  
20  
TBD  
Call TI  
Call TI  
ACTIVE  
ACTIVE  
ACTIVE  
TSSOP  
TSSOP  
TSSOP  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74ACT241PWRE4  
SN74ACT241PWRG4  
PW  
PW  
20  
20  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SNJ54ACT241FK  
SNJ54ACT241J  
SNJ54ACT241W  
ACTIVE  
ACTIVE  
ACTIVE  
LCCC  
CDIP  
CFP  
FK  
J
20  
20  
20  
1
1
1
TBD  
TBD  
TBD  
POST-PLATE N / A for Pkg Type  
A42 SNPB  
A42  
N / A for Pkg Type  
N / A for Pkg Type  
W
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
9-Oct-2007  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
4-Jan-2008  
TAPE AND REEL BOX INFORMATION  
Device  
Package Pins  
Site  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) (mm) Quadrant  
(mm)  
330  
(mm)  
16  
SN74ACT241DBR  
SN74ACT241DWR  
SN74ACT241PWR  
DB  
DW  
PW  
20  
20  
20  
SITE 41  
SITE 41  
SITE 41  
8.2  
7.5  
13.0  
7.1  
2.5  
2.7  
1.6  
12  
12  
8
16  
24  
16  
Q1  
Q1  
Q1  
330  
24  
10.8  
6.95  
330  
16  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
4-Jan-2008  
Device  
Package  
Pins  
Site  
Length (mm) Width (mm) Height (mm)  
SN74ACT241DBR  
SN74ACT241DWR  
SN74ACT241PWR  
DB  
DW  
PW  
20  
20  
20  
SITE 41  
SITE 41  
SITE 41  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
33.0  
41.0  
33.0  
Pack Materials-Page 2  
MECHANICAL DATA  
MLCC006B – OCTOBER 1996  
FK (S-CQCC-N**)  
LEADLESS CERAMIC CHIP CARRIER  
28 TERMINAL SHOWN  
A
B
NO. OF  
TERMINALS  
**  
18 17 16 15 14 13 12  
MIN  
MAX  
MIN  
MAX  
0.342  
(8,69)  
0.358  
(9,09)  
0.307  
(7,80)  
0.358  
(9,09)  
19  
20  
11  
10  
9
20  
28  
44  
52  
68  
84  
0.442  
(11,23)  
0.458  
(11,63)  
0.406  
(10,31)  
0.458  
(11,63)  
21  
B SQ  
22  
0.640  
(16,26)  
0.660  
(16,76)  
0.495  
(12,58)  
0.560  
(14,22)  
8
A SQ  
23  
0.739  
(18,78)  
0.761  
(19,32)  
0.495  
(12,58)  
0.560  
(14,22)  
7
24  
25  
6
0.938  
(23,83)  
0.962  
(24,43)  
0.850  
(21,6)  
0.858  
(21,8)  
5
1.141  
(28,99)  
1.165  
(29,59)  
1.047  
(26,6)  
1.063  
(27,0)  
26 27 28  
1
2
3
4
0.080 (2,03)  
0.064 (1,63)  
0.020 (0,51)  
0.010 (0,25)  
0.020 (0,51)  
0.010 (0,25)  
0.055 (1,40)  
0.045 (1,14)  
0.045 (1,14)  
0.035 (0,89)  
0.045 (1,14)  
0.035 (0,89)  
0.028 (0,71)  
0.022 (0,54)  
0.050 (1,27)  
4040140/D 10/96  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. This package can be hermetically sealed with a metal lid.  
D. The terminals are gold plated.  
E. Falls within JEDEC MS-004  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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