SN74AHC1G08_07 [TI]
SINGLE 2-INPUT POSITIVE-AND GATE; 单路2输入正与门
| 型号： | SN74AHC1G08_07 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | SINGLE 2-INPUT POSITIVE-AND GATE |
| 文件： | 总12页 (文件大小：442K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢊ
ꢀꢋ ꢁꢈ ꢌ ꢍ ꢎ ꢏꢋꢁ ꢐꢑꢒ ꢐꢓ ꢀꢋ ꢒ ꢋꢔꢍ ꢏꢄꢁ ꢕ ꢈ ꢄꢒꢍ
SCLS314M − MARCH 1996 − REVISED JUNE 2005
D
D
D
D
D
Operating Range of 2 V to 5.5 V
D
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Max t of 7 ns at 5 V
pd
Low Power Consumption, 10-µA Max I
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
CC
8-mA Output Drive at 5 V
Schmitt-Trigger Action at All Inputs Makes
the Circuit Tolerant for Slower Input Rise
and Fall Time
− 1000-V Charged-Device Model (C101)
DCK PACKAGE
(TOP VIEW)
DBV PACKAGE
(TOP VIEW)
DRL PACKAGE
(TOP VIEW)
A
V
Y
1
2
3
5
1
2
3
5
A
B
V
Y
CC
CC
1
2
3
5
4
A
B
V
Y
CC
B
4
GND
4
GND
GND
See mechanical drawings for dimensions.
description/ordering information
The SN74AHC1G08 is a single 2-input positive-AND gate. The device performs the Boolean function
Y + A • B or Y + A ) B in positive logic.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
‡
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
Reel of 4000
SN74AHC1G08DBVR
SN74AHC1G08DBVT
SN74AHC1G08DCKR
SN74AHC1G08DCKT
SN74AHC1G08DRLR
SOT (SOT-23) – DBV
A08_
−40°C to 85°C
SOT (SC-70) – DCK
AE_
AE_
SOT (SOT-553) – DRL
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION TABLE
INPUTS
OUTPUT
Y
A
B
H
X
L
H
L
H
L
L
X
logic diagram (positive logic)
1
2
A
B
4
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2005, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢇ ꢈꢉ ꢊ
ꢀ ꢋꢁ ꢈꢌ ꢍ ꢎ ꢏꢋ ꢁꢐ ꢑꢒ ꢐ ꢓꢀ ꢋ ꢒꢋ ꢔ ꢍꢏ ꢄꢁꢕ ꢈ ꢄꢒꢍ
SCLS314M − MARCH 1996 − REVISED JUNE 2005
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
O
CC
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
IK
I
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package thermal impedance, θ (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W
JA
DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W
DRL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Storage temperature range, T
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN
MAX
UNIT
V
Supply voltage
2
1.5
5.5
V
CC
IH
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
= 3 V
2.1
V
High-level input voltage
V
V
= 5.5 V
= 2 V
3.85
0.5
0.9
= 3 V
V
IL
Low-level input voltage
= 5.5 V
1.65
5.5
V
V
Input voltage
0
0
V
V
I
Output voltage
V
CC
O
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
−50
−4
−8
50
4
mA
= 3.3 V 0.3 V
= 5 V 0.5 V
= 2 V
I
High-level output current
Low-level output current
OH
mA
mA
= 3.3 V 0.3 V
= 5 V 0.5 V
= 3.3 V 0.3 V
= 5 V 0.5 V
I
OL
mA
8
100
20
85
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
ns/V
T
−40
°C
A
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢈ ꢉꢊ
ꢀꢋ ꢁꢈ ꢌ ꢍ ꢎ ꢏꢋꢁ ꢐꢑꢒ ꢐꢓ ꢀꢋ ꢒ ꢋꢔꢍ ꢏꢄ ꢁꢕ ꢈ ꢄꢒꢍ
SCLS314M − MARCH 1996 − REVISED JUNE 2005
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
TYP
2
PARAMETER
TEST CONDITIONS
V
MIN
MAX
UNIT
CC
MIN
1.9
MAX
2 V
3 V
1.9
2.9
2.9
3
I
= −50 mA
OH
4.5 V
3 V
4.4
4.5
4.4
V
V
V
OH
OL
2.58
2.48
I
I
= −4 mA
= −8 mA
OH
4.5 V
2 V
3.94
3.8
OH
0.1
0.1
0.1
0.1
3 V
I
= 50 mA
OL
4.5 V
3 V
0.1
0.1
V
0.36
0.44
I
I
= 4 mA
= 8 mA
OL
4.5 V
0 V to 5.5 V
5.5 V
0.36
0.1
1
0.44
1
OL
I
I
V = 5.5 V or GND
mA
mA
pF
I
I
V = V
or GND,
or GND
I = 0
O
10
10
CC
I
CC
C
V = V
5 V
4
10
i
I
CC
switching characteristics over recommended operating free-air temperature range,
= 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
TYP
6.2
FROM
(INPUT)
TO
(OUTPUT)
OUTPUT
CAPACITANCE
PARAMETER
MIN
MAX
UNIT
ns
MIN
MAX
8.8
t
t
t
t
1
1
1
1
10.5
10.5
14
PLH
PHL
PLH
PHL
A or B
A or B
Y
Y
C
C
= 15 pF
= 50 pF
L
L
6.2
8.8
8.7
12.3
12.3
ns
8.7
14
switching characteristics over recommended operating free-air temperature range,
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
TYP
4.3
FROM
(INPUT)
TO
(OUTPUT)
OUTPUT
CAPACITANCE
PARAMETER
MIN
MAX
UNIT
ns
MIN
MAX
5.9
t
t
t
t
1
1
1
1
7
7
9
9
PLH
PHL
PLH
PHL
A or B
A or B
Y
Y
C
C
= 15 pF
= 50 pF
L
L
4.3
5.9
5.8
7.9
ns
5.8
7.9
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
Power dissipation capacitance
TEST CONDITIONS
No load, f = 1 MHz
TYP
UNIT
C
18
pF
pd
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢇ ꢈꢉ ꢊ
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SCLS314M − MARCH 1996 − REVISED JUNE 2005
PARAMETER MEASUREMENT INFORMATION
V
CC
Open
GND
S1
R
= 1 kΩ
L
TEST
S1
From Output
Under Test
Test
Point
From Output
Under Test
t
t
/t
Open
PLH PHL
/t
C
C
L
t
V
CC
L
PLZ PZL
/t
(see Note A)
(see Note A)
GND
PHZ PZH
Open Drain
V
CC
LOAD CIRCUIT FOR
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3-STATE AND OPEN-DRAIN OUTPUTS
V
CC
50% V
CC
Timing Input
0 V
t
w
t
h
t
su
V
CC
V
CC
50% V
CC
50% V
CC
Input
50% V
CC
50% V
CC
Data Input
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
V
CC
CC
Output
Control
50% V
CC
50% V
CC
50% V
CC
50% V
t
Input
CC
0 V
0 V
t
t
t
t
PZL
PLZ
PLH
PHL
Output
Waveform 1
V
OH
≈V
CC
In-Phase
Output
50% V
50% V
CC
50% V
CC
CC
V
S1 at V
(see Note B)
V
OL
+ 0.3 V
CC
V
OL
OL
t
t
t
PHL
PLH
PZH
PHZ
Output
Waveform 2
S1 at GND
V
V
OH
OH
Out-of-Phase
Output
V
OH
− 0.3 V
50% V
CC
50% V
50% V
CC
CC
V
≈0 V
(see Note B)
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
D. The outputs are measured one at a time, with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
22-Oct-2007
PACKAGING INFORMATION
Orderable Device
SN74AHC1G08DBVR
SN74AHC1G08DBVRE4
SN74AHC1G08DBVRG4
SN74AHC1G08DBVT
SN74AHC1G08DBVTE4
SN74AHC1G08DBVTG4
SN74AHC1G08DCKR
SN74AHC1G08DCKRE4
SN74AHC1G08DCKRG4
SN74AHC1G08DCKT
SN74AHC1G08DCKTE4
SN74AHC1G08DCKTG4
SN74AHC1G08DRLR
SN74AHC1G08DRLRG4
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT-23
DBV
5
5
5
5
5
5
5
5
5
5
5
5
5
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SC70
DBV
DBV
DBV
DBV
DBV
DCK
DCK
DCK
DCK
DCK
DCK
DRL
DRL
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT
4000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT
4000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
22-Oct-2007
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Nov-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
180
0
(mm)
SN74AHC1G08DBVR
SN74AHC1G08DBVR
SN74AHC1G08DBVT
SN74AHC1G08DBVT
SN74AHC1G08DCKR
SN74AHC1G08DCKR
SN74AHC1G08DCKT
SN74AHC1G08DCKT
SN74AHC1G08DRLR
DBV
DBV
DBV
DBV
DCK
DCK
DCK
DCK
DRL
5
5
5
5
5
5
5
5
5
SITE 34
SITE 45
SITE 34
SITE 45
SITE 34
SITE 45
SITE 34
SITE 45
SITE 35
9
0
3.23
3.23
3.23
10.6
2.24
2.4
3.17
3.17
3.17
15.8
2.34
2.5
1.37
1.37
1.37
4.9
4
4
8
8
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
180
330
180
0
9
4
8
16
9
16
4
24
8
1.22
1.2
0
4
8
180
0
9
2.24
2.4
2.34
2.5
1.22
1.2
4
8
0
4
8
180
9
1.78
1.78
0.69
4
8
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Nov-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
SN74AHC1G08DBVR
SN74AHC1G08DBVR
SN74AHC1G08DBVT
SN74AHC1G08DBVT
SN74AHC1G08DCKR
SN74AHC1G08DCKR
SN74AHC1G08DCKT
SN74AHC1G08DCKT
SN74AHC1G08DRLR
DBV
DBV
DBV
DBV
DCK
DCK
DCK
DCK
DRL
5
5
5
5
5
5
5
5
5
SITE 34
SITE 45
SITE 34
SITE 45
SITE 34
SITE 45
SITE 34
SITE 45
SITE 35
205.0
0.0
200.0
185.0
192.0
0.0
33.0
220.0
26.0
0.0
201.0
0.0
205.0
0.0
200.0
185.0
192.0
185.0
201.0
33.0
220.0
26.0
220.0
28.0
201.0
0.0
202.0
Pack Materials-Page 2
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