SN74AHC1G126DCKR [TI]

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT; 具有三态输出单总线缓冲器门
SN74AHC1G126DCKR
型号: SN74AHC1G126DCKR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT
具有三态输出单总线缓冲器门

总线驱动器 总线收发器 逻辑集成电路 光电二极管 输出元件
文件: 总9页 (文件大小:158K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN74AHC1G126  
SINGLE BUS BUFFER GATE  
WITH 3-STATE OUTPUT  
SCLS379G – AUGUST 1997 – REVISED FEBRUARY 2003  
DBV OR DCK PACKAGE  
(TOP VIEW)  
Operating Range of 2 V to 5.5 V  
Max t of 6 ns at 5 V  
pd  
Low Power Consumption, 10-µA Max I  
±8-mA Output Drive at 5 V  
1
2
3
5
4
CC  
OE  
A
GND  
V
Y
CC  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
description/ordering information  
The SN74AHC1G126 is a single bus buffer gate/line driver with 3-state output. The output is disabled when the  
output-enable (OE) input is low. When OE is high, true data is passed from the A input to the Y output.  
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a  
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the  
driver.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
Reel of 3000  
Reel of 250  
Reel of 3000  
SN74AHC1G126DBVR  
SN74AHC1G126DBVT  
SN74AHC1G126DCKR  
SOT (SOT-23) – DBV  
A26_  
–40°C to 85°C  
SOT (SC-70) – DCK  
AN_  
Reel of 250  
SN74AHC1G126DCKT  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
The actual top-side marking has one additional character that designates the assembly/test site.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
H
H
L
H
L
X
Z
logic diagram (positive logic)  
1
2
OE  
A
4
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74AHC1G126  
SINGLE BUS BUFFER GATE  
WITH 3-STATE OUTPUT  
SCLS379G AUGUST 1997 REVISED FEBRUARY 2003  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
I
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to V  
+ 0.5 V  
O
CC  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
IK  
I
Output clamp current, I  
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA  
Continuous current through V  
Package thermal impedance, θ (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA  
JA  
DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
stg  
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
recommended operating conditions (see Note 3)  
MIN  
MAX  
UNIT  
V
Supply voltage  
2
1.5  
5.5  
V
CC  
IH  
V
V
V
V
V
V
= 2 V  
CC  
CC  
CC  
CC  
CC  
CC  
V
High-level input voltage  
= 3 V  
2.1  
V
V
= 5.5 V  
= 2 V  
3.85  
0.5  
0.9  
V
IL  
Low-level input voltage  
= 3 V  
= 5.5 V  
1.65  
5.5  
V
V
Input voltage  
0
0
V
V
A
I
Output voltage  
V
CC  
O
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
50  
4  
8  
50  
4
I
High-level output current  
Low-level output current  
= 3.3 V ± 0.3 V  
= 5 V ± 0.5 V  
= 2 V  
OH  
OL  
mA  
A
I
= 3.3 V ± 0.3 V  
= 5 V ± 0.5 V  
= 3.3 V ± 0.3 V  
= 5 V ± 0.5 V  
mA  
8
100  
20  
85  
t/v  
Input transition rise or fall rate  
Operating free-air temperature  
ns/V  
T
A
40  
°C  
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74AHC1G126  
SINGLE BUS BUFFER GATE  
WITH 3-STATE OUTPUT  
SCLS379G AUGUST 1997 REVISED FEBRUARY 2003  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
A
= 25°C  
TYP  
2
PARAMETER  
TEST CONDITIONS  
V
MIN  
MAX  
UNIT  
CC  
MIN  
1.9  
MAX  
2 V  
3 V  
1.9  
2.9  
I
= 50  
A
2.9  
3
OH  
V
4.5 V  
3 V  
4.4  
4.5  
4.4  
V
OH  
OL  
I
I
= 4 mA  
= 8 mA  
2.58  
3.94  
2.48  
3.8  
OH  
4.5 V  
2 V  
OH  
0.1  
0.1  
0.1  
0.1  
I
= 50  
A
3 V  
OL  
V
4.5 V  
3 V  
0.1  
0.1  
V
I
I
= 4 mA  
= 8 mA  
0.36  
0.36  
±0.1  
±0.25  
1
0.44  
0.44  
±1  
OL  
4.5 V  
0 V to 5.5 V  
5.5 V  
5.5 V  
5 V  
OL  
I
I
I
V = 5.5 V or GND  
A
A
I
I
V = V  
or GND  
or GND,  
or GND  
±2.5  
10  
OZ  
CC  
I
CC  
CC  
CC  
V = V  
I
O
= 0  
A
I
C
C
V = V  
4
10  
10  
pF  
pF  
i
I
V
= V or GND  
CC  
5 V  
10  
o
O
switching characteristics over recommended operating free-air temperature range,  
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)  
V
CC  
T
A
= 25°C  
TYP  
5.6  
5.6  
5.4  
5.4  
7
FROM  
(INPUT)  
TO  
(OUTPUT)  
LOAD  
CAPACITANCE  
PARAMETER  
MIN  
MAX  
UNIT  
ns  
MIN  
MAX  
8
t
t
t
t
t
t
1
1
1
1
1
1
1
1
1
1
1
1
9.5  
9.5  
9.5  
9.5  
11.5  
11.5  
13  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
A
Y
Y
Y
Y
Y
Y
C
C
C
C
C
C
= 15 pF  
= 15 pF  
= 15 pF  
= 50 pF  
= 50 pF  
= 50 pF  
L
L
L
L
L
L
8
8
ns  
OE  
OE  
8
9.7  
9.7  
11.5  
11.5  
11.5  
11.5  
13.2  
13.2  
ns  
7
t
t
t
t
t
t
8.1  
8.1  
7.9  
7.9  
9.5  
9.5  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
A
ns  
13  
13  
ns  
OE  
OE  
13  
15  
ns  
15  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74AHC1G126  
SINGLE BUS BUFFER GATE  
WITH 3-STATE OUTPUT  
SCLS379G AUGUST 1997 REVISED FEBRUARY 2003  
switching characteristics over recommended operating free-air temperature range,  
V
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)  
CC  
T
A
= 25°C  
TYP  
3.8  
FROM  
(INPUT)  
TO  
(OUTPUT)  
LOAD  
CAPACITANCE  
PARAMETER  
MIN  
MAX  
UNIT  
ns  
MIN  
MAX  
5.5  
5.5  
5.1  
5.1  
6.8  
6.8  
t
t
t
t
t
t
1
1
1
1
1
1
6.5  
6.5  
6
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
A
Y
Y
Y
Y
Y
Y
C
C
C
C
C
C
= 15 pF  
= 15 pF  
= 15 pF  
= 50 pF  
= 50 pF  
= 50 pF  
L
L
L
L
L
L
3.8  
3.6  
ns  
OE  
OE  
3.6  
6
4.6  
8
ns  
4.6  
8
t
t
t
t
t
t
5.3  
5.3  
5.1  
5.1  
6.1  
6.1  
7.5  
7.5  
7.1  
7.1  
8.8  
8.8  
1
1
1
1
1
1
8.5  
8.5  
8
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
A
ns  
ns  
OE  
OE  
8
10  
10  
ns  
operating characteristics, V  
= 5 V, T = 25°C  
A
CC  
PARAMETER  
TEST CONDITIONS  
No load, f = 1 MHz  
TYP  
UNIT  
C
Power dissipation capacitance  
14  
pF  
pd  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74AHC1G126  
SINGLE BUS BUFFER GATE  
WITH 3-STATE OUTPUT  
SCLS379G AUGUST 1997 REVISED FEBRUARY 2003  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
Open  
GND  
S1  
R
= 1 kΩ  
L
TEST  
S1  
From Output  
Under Test  
Test  
Point  
From Output  
Under Test  
t
t
/t  
Open  
PLH PHL  
/t  
C
C
L
t
V
CC  
L
PLZ PZL  
/t  
(see Note A)  
(see Note A)  
GND  
PHZ PZH  
Open Drain  
V
CC  
LOAD CIRCUIT FOR  
LOAD CIRCUIT FOR  
TOTEM-POLE OUTPUTS  
3-STATE AND OPEN-DRAIN OUTPUTS  
V
CC  
50% V  
CC  
Timing Input  
0 V  
t
w
t
h
t
su  
V
CC  
V
CC  
50% V  
50% V  
CC  
Input  
CC  
50% V  
50% V  
CC  
Data Input  
CC  
0 V  
0 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
V
V
CC  
CC  
Output  
Control  
50% V  
50% V  
50% V  
50% V  
t
Input  
CC  
CC  
CC  
CC  
0 V  
0 V  
t
t
t
t
PZL  
PLZ  
PLH  
PHL  
Output  
Waveform 1  
V
OH  
V  
CC  
In-Phase  
Output  
50% V  
50% V  
CC  
50% V  
CC  
CC  
V
S1 at V  
(see Note B)  
V
OL  
+ 0.3 V  
CC  
V
OL  
OL  
t
t
t
PHL  
PLH  
PZH  
PHZ  
Output  
Waveform 2  
S1 at GND  
V
V
OH  
OH  
Out-of-Phase  
Output  
V
OH  
0.3 V  
50% V  
50% V  
50% V  
CC  
CC  
CC  
V
0 V  
(see Note B)  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. includes probe and jig capacitance.  
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z = 50 , t 3 ns, t 3 ns.  
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.  
E. All parameters and waveforms are not applicable to all devices.  
Figure 1. Load Circuit and Voltage Waveforms  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Feb-2005  
PACKAGING INFORMATION  
Orderable Device  
SN74AHC1G126DBVR  
SN74AHC1G126DBVT  
SN74AHC1G126DCKR  
SN74AHC1G126DCKT  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
SOT-23  
DBV  
5
5
5
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SOT-23  
SC70  
DBV  
DCK  
DCK  
250  
Pb-Free  
(RoHS)  
CU NIPDAU Level-1-260C-UNLIM  
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SC70  
250  
Pb-Free  
(RoHS)  
CU NIPDAU Level-1-260C-UNLIM  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional  
product content details.  
None: Not yet available Lead (Pb-Free).  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,  
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
MECHANICAL DATA  
MPDS025C – FEBRUARY 1997 – REVISED FEBRUARY 2002  
DCK (R-PDSO-G5)  
PLASTIC SMALL-OUTLINE PACKAGE  
0,30  
0,15  
M
0,10  
0,65  
5
4
0,13 NOM  
1,40 2,40  
1,10 1,80  
1
3
Gage Plane  
2,15  
1,85  
0,15  
0°–8°  
0,46  
0,26  
Seating Plane  
0,10  
1,10  
0,80  
0,10  
0,00  
4093553-2/D 01/02  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion.  
D. Falls within JEDEC MO-203  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
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