SN74AHC245QWRKSRQ1 [TI]

汽车类具有三态输出的八路总线收发器 | RKS | 20 | -40 to 125;
SN74AHC245QWRKSRQ1
型号: SN74AHC245QWRKSRQ1
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

汽车类具有三态输出的八路总线收发器 | RKS | 20 | -40 to 125

总线收发器
文件: 总11页 (文件大小:236K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢀꢁꢂ ꢃ ꢄ ꢅꢆ ꢇꢃ ꢈꢉ ꢊ ꢋ  
ꢌ ꢆꢍꢄꢎ ꢏꢐꢀ ꢍ ꢑꢄꢁ ꢀꢆ ꢒ ꢓꢔ ꢒ ꢑ  
ꢕ ꢓꢍ ꢅ ꢖ ꢉꢀꢍꢄꢍ ꢒ ꢌ ꢐꢍ ꢗꢐ ꢍꢀ  
SCLS527A − AUGUST 2003 − REVISED APRIL 2008  
DW OR PW PACKAGE  
(TOP VIEW)  
D
D
Qualified for Automotive Applications  
ESD Protection Exceeds 1000 V Per  
MIL-STD-883, Method 3015; Exceeds 100 V  
Using Machine Model (C = 200 pF, R = 0)  
DIR  
A1  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
V
CC  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
D
Operating Range 2-V to 5.5-V V  
CC  
A2  
A3  
description/ordering information  
A4  
A5  
The SN74AHC245 octal bus transceiver is designed  
for asynchronous two-way communication between  
data buses. The control-function implementation  
minimizes external timing requirements.  
A6  
A7  
A8  
GND  
This device allows data transmission from the A bus  
to the B bus or from the B bus to the A bus, depending  
on the logic level at the direction-control (DIR) input.  
The output-enable (OE) input can be used to disable  
the device so that the buses effectively are isolated.  
To ensure the high-impedance state during power up or power down, OE should be tied to V  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup  
CC  
{
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
SOIC − DW  
Tape and reel  
SN74AHC245QDWRQ1  
SN74AHC245QPWRQ1  
AHC245Q1  
AHC245Q1  
−40°C to 125°C  
TSSOP − PW Tape and reel  
For the most current package and ordering information, see the Package Option Addendum at the end of  
this document, or see the TI web site at http://www.ti.com.  
Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.  
FUNCTION TABLE  
(each transceiver)  
INPUTS  
OPERATION  
OE  
L
DIR  
L
B data to A bus  
A data to B bus  
Isolation  
L
H
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢍꢤ  
Copyright 2008, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢇ ꢃ ꢈꢉꢊ ꢋ  
ꢌꢆ ꢍꢄ ꢎ ꢏ ꢐꢀ ꢍ ꢑ ꢄꢁ ꢀꢆ ꢒꢓ ꢔ ꢒ ꢑ  
ꢕꢓ ꢍ ꢅ ꢖ ꢉꢀꢍꢄꢍ ꢒ ꢌꢐꢍ ꢗ ꢐꢍꢀ  
SCLS527A − AUGUST 2003 − REVISED APRIL 2008  
logic diagram (positive logic)  
1
DIR  
19  
18  
OE  
B1  
2
A1  
To Seven Other Channels  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1): Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
I
I/O, output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V  
+ 0.5 V  
O
CC  
Input clamp current, I (V < 0): Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA  
IK  
I
I/O, output clamp current, I  
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA  
Continuous current through V  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 mA  
Package thermal impedance, θ (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W  
JA  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
Storage temperature range, T  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
2
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ꢀꢁꢂ ꢃ ꢄ ꢅꢆ ꢇꢃ ꢈꢉ ꢊ ꢋ  
ꢌ ꢆꢍꢄꢎ ꢏꢐꢀ ꢍ ꢑꢄꢁꢀ ꢆꢒ ꢓ ꢔꢒ ꢑ  
ꢕ ꢓꢍ ꢅ ꢖ ꢉꢀꢍꢄꢍ ꢒ ꢌ ꢐꢍ ꢗꢐ ꢍꢀ  
SCLS527A − AUGUST 2003 − REVISED APRIL 2008  
recommended operating conditions (see Note 3)  
MIN  
2
MAX  
UNIT  
V
Supply voltage  
5.5  
V
CC  
IH  
V
V
V
V
V
V
= 2 V  
1.5  
2.1  
3.85  
CC  
CC  
CC  
CC  
CC  
CC  
= 3 V  
V
High-level input voltage  
V
V
= 5.5 V  
= 2 V  
0.5  
0.9  
= 3 V  
V
Low-level input voltage  
IL  
= 5.5 V  
1.65  
5.5  
V
V
Input voltage  
OE or DIR  
A or B  
0
0
V
V
I
Output voltage  
V
CC  
O
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
−50  
−4  
−8  
50  
4
mA  
= 3.3 V 0.3 V  
= 5 V 0.5 V  
= 2 V  
I
High-level output current  
Low-level output current  
OH  
mA  
mA  
= 3.3 V 0.3 V  
= 5 V 0.5 V  
= 3.3 V 0.3 V  
= 5 V 0.5 V  
I
OL  
mA  
8
100  
20  
125  
t/∆v Input transition rise or fall rate  
ns/V  
T
Operating free-air temperature  
−40  
°C  
A
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
A
= 25°C  
TYP  
2
PARAMETER  
TEST CONDITIONS  
V
MIN  
MAX  
UNIT  
CC  
MIN  
1.9  
MAX  
2 V  
3 V  
1.9  
2.9  
2.9  
3
I
= −50 mA  
OH  
4.5 V  
3 V  
4.4  
4.5  
4.4  
V
V
OH  
OL  
I
I
= −4 mA  
= −8 mA  
2.58  
3.94  
2.48  
3.8  
OH  
4.5 V  
2 V  
OH  
0.1  
0.1  
0.1  
0.1  
0.1  
0.5  
0.5  
1
3 V  
I
= 50 mA  
OL  
4.5 V  
3 V  
0.1  
V
V
I
I
= 4 mA  
= 8 mA  
0.36  
0.36  
0.1  
OL  
4.5 V  
5.5 V  
0 V to 5.5 V  
OL  
A or B inputs  
OE or DIR  
I
I
V = 5.5 V or GND  
mA  
mA  
I
0.1  
1
V
= V or GND,  
CC  
O
I
5.5 V  
0.25  
2.5  
40  
I
I
OZ  
V (OE) = V or V  
IL IH  
V = V  
I
or GND,  
or GND  
or GND  
I
O
= 0  
5.5 V  
5 V  
4
mA  
pF  
pF  
CC  
CC  
CC  
CC  
C
C
V = V  
I
2.5  
4
10  
OE or DIR  
i
A or B inputs  
V = V  
5 V  
io  
I
The parameter I  
OZ  
includes the input leakage current.  
3
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ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢇ ꢃ ꢈꢉꢊ ꢋ  
ꢌꢆ ꢍꢄ ꢎ ꢏ ꢐꢀ ꢍ ꢑ ꢄꢁ ꢀꢆ ꢒꢓ ꢔ ꢒ ꢑ  
ꢕꢓ ꢍ ꢅ ꢖ ꢉꢀꢍꢄꢍ ꢒ ꢌꢐꢍ ꢗ ꢐꢍꢀ  
SCLS527A − AUGUST 2003 − REVISED APRIL 2008  
switching characteristics over recommended operating free-air temperature range,  
V
= 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)  
CC  
T
A
= 25°C  
TYP  
5.8  
FROM  
(INPUT)  
TO  
(OUTPUT)  
LOAD  
CAPACITANCE  
PARAMETER  
MIN  
MAX  
UNIT  
ns  
MIN  
MAX  
8.4  
t
t
t
t
t
t
t
t
t
t
t
t
1
1
1
1
1
1
1
1
1
1
1
1
10  
10  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
A or B  
OE  
B or A  
A or B  
A or B  
B or A  
A or B  
A or B  
C
C
C
C
C
C
= 15 pF  
= 15 pF  
= 15 pF  
= 50 pF  
= 50 pF  
= 50 pF  
L
L
L
L
L
L
5.8  
8.4  
8.5  
13.2  
13.2  
12.5  
12.5  
11.9  
11.9  
16.7  
16.7  
15.8  
15.8  
15.5  
15.5  
15.5  
15.5  
13.5  
13.5  
19  
ns  
8.5  
8.9  
ns  
OE  
8.9  
8.3  
A or B  
ns  
8.3  
11  
ns  
OE  
OE  
11  
19  
11.5  
11.5  
18  
ns  
18  
switching characteristics over recommended operating free-air temperature range,  
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)  
V
CC  
T
A
= 25°C  
TYP  
4
FROM  
(INPUT)  
TO  
(OUTPUT)  
LOAD  
CAPACITANCE  
PARAMETER  
MIN  
MAX  
UNIT  
ns  
MIN  
MAX  
5.5  
t
t
t
t
t
t
t
t
t
t
t
t
1
1
1
1
1
1
1
1
1
1
1
1
6.5  
6.5  
10  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
A or B  
B or A  
A or B  
A or B  
B or A  
A or B  
A or B  
C
C
C
C
C
C
= 15 pF  
= 15 pF  
= 15 pF  
= 50 pF  
= 50 pF  
= 50 pF  
L
L
L
L
L
L
4
5.5  
5.8  
5.8  
5.6  
5.6  
5.5  
5.5  
7.3  
7.3  
7
8.5  
ns  
OE  
OE  
8.5  
10  
7.8  
9.2  
9.2  
8.5  
8.5  
12  
ns  
7.8  
7.5  
A or B  
OE  
ns  
7.5  
10.6  
10.6  
9.7  
ns  
12  
11  
ns  
OE  
7
9.7  
11  
noise characteristics, V  
= 5 V, C = 50 pF, T = 25°C (see Note 4)  
CC  
L
A
PARAMETER  
MIN  
TYP  
0.9  
MAX  
UNIT  
V
V
V
V
V
Quiet output, maximum dynamic V  
V
V
V
V
V
OL(P)  
OL(V)  
OH(V)  
IH(D)  
IL(D)  
OL  
Quiet output, minimum dynamic V  
Quiet output, minimum dynamic V  
High-level dynamic input voltage  
Low-level dynamic input voltage  
−0.9  
4.3  
OL  
OH  
3.5  
1.5  
NOTE 4: Characteristics are for surface-mount packages only.  
operating characteristics, V  
= 5 V, T = 25°C  
A
CC  
PARAMETER  
TEST CONDITIONS  
No load, f = 1 MHz  
TYP  
UNIT  
C
Power dissipation capacitance  
14  
pF  
pd  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁꢂ ꢃ ꢄ ꢅꢆ ꢇꢃ ꢈꢉ ꢊ ꢋ  
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ꢕ ꢓꢍ ꢅ ꢖ ꢉꢀꢍꢄꢍ ꢒ ꢌ ꢐꢍ ꢗꢐ ꢍꢀ  
SCLS527A − AUGUST 2003 − REVISED APRIL 2008  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
Open  
GND  
S1  
R
= 1 kΩ  
L
TEST  
S1  
From Output  
Under Test  
Test  
Point  
From Output  
Under Test  
t
t
/t  
Open  
PLH PHL  
/t  
C
C
L
t
V
CC  
L
PLZ PZL  
/t  
(see Note A)  
(see Note A)  
GND  
PHZ PZH  
Open Drain  
V
CC  
LOAD CIRCUIT FOR  
LOAD CIRCUIT FOR  
TOTEM-POLE OUTPUTS  
3-STATE AND OPEN-DRAIN OUTPUTS  
V
CC  
50% V  
CC  
Timing Input  
0 V  
t
w
t
h
t
su  
V
CC  
V
CC  
50% V  
CC  
50% V  
CC  
Input  
50% V  
CC  
50% V  
CC  
Data Input  
0 V  
0 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
V
V
CC  
CC  
Output  
Control  
50% V  
CC  
50% V  
CC  
50% V  
CC  
50% V  
t
Input  
CC  
0 V  
0 V  
t
PZL  
t
t
t
PLZ  
PLH  
PHL  
Output  
Waveform 1  
V
OH  
V  
CC  
In-Phase  
Output  
50% V  
50% V  
CC  
50% V  
CC  
CC  
V
S1 at V  
(see Note B)  
V
OL  
+ 0.3 V  
CC  
V
OL  
OL  
t
t
t
PHL  
PLH  
PZH  
PHZ  
Output  
Waveform 2  
S1 at GND  
V
V
OH  
OH  
Out-of-Phase  
Output  
V
OH  
− 0.3 V  
50% V  
CC  
50% V  
50% V  
CC  
CC  
V
0 V  
(see Note B)  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. includes probe and jig capacitance.  
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z = 50 , t 3 ns, t 3 ns.  
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
5
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PACKAGE OPTION ADDENDUM  
www.ti.com  
17-Aug-2012  
PACKAGING INFORMATION  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
SN74AHC245QDWRQ1  
ACTIVE  
ACTIVE  
SOIC  
DW  
PW  
20  
20  
TBD  
Call TI  
Call TI  
SN74AHC245QPWRG4Q1  
TSSOP  
2000  
2000  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
SN74AHC245QPWRQ1  
ACTIVE  
TSSOP  
PW  
20  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF SN74AHC245-Q1 :  
Catalog: SN74AHC245  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
17-Aug-2012  
Enhanced Product: SN74AHC245-EP  
Military: SN54AHC245  
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
Enhanced Product - Supports Defense, Aerospace and Medical Applications  
Military - QML certified for Military and Defense Applications  
Addendum-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other  
changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should  
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All  
semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time  
of order acknowledgment.  
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary  
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