SN74AHC4066DRG4 [TI]
QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO14, GREEN, PLASTIC, MS-012AB, SOIC-14;
| 型号： | SN74AHC4066DRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO14, GREEN, PLASTIC, MS-012AB, SOIC-14 光电二极管 输出元件 |
| 文件： | 总27页 (文件大小：1042K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 − JUNE 2003
D, DB, DGV, N, NS, OR PW PACKAGE
(TOP VIEW)
D
D
2-V to 5.5-V V Operation
CC
Supports Mixed-Mode Voltage Operation on
All Ports
1
2
3
4
5
6
7
14
13
12
11
10
9
1A
1B
2B
2A
2C
VCC
1C
4C
4A
4B
3B
3A
D
D
D
D
D
High On-Off Output-Voltage Ratio
Low Crosstalk Between Switches
Individual Switch Controls
Extremely Low Input Current
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
3C
GND
8
− 1000-V Charged-Device Model (C101)
RGY PACKAGE
(TOP VIEW)
description/ordering information
This quadruple silicon-gate CMOS analog switch
1
14
is designed for 2-V to 5.5-V V operation.
CC
1B
2B
2A
2C
3C
13 1C
12 4C
2
3
4
5
6
This switch is designed to handle both analog and
digital signals. Each switch permits signals with
amplitudes up to 5.5 V (peak) to be transmitted in
either direction.
11
10
9
4A
4B
3B
7
8
Each switch section has its own enable-input
control (C). A high-level voltage applied to C turns
on the associated switch section.
NC − No internal connection
Applications include signal gating, chopping,
modulation or demodulation (modem), and signal
multiplexing
for
analog-to-digital
and
digital-to-analog conversion systems.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
PDIP − N
Tube
SN74AHC4066N
SN74AHC4066N
HA4066
QFN − RGY
Tape and reel
Tube
SN74AHC4066RGYR
SN74AHC4066D
SOIC − D
AHC4066
AHC4066
HA4066
Tape and reel
Tube
SN74AHC4066DR
SN74AHC4066NS
SN74AHC4066NSR
SN74AHC4066DB
SN74AHC4066DBR
SN74AHC4066PW
SN74AHC4066PWR
SN74AHC4066DGVR
SOP − NS
−40°C to 85°C
Tape and reel
Tube
SSOP − DB
Tape and reel
Tube
TSSOP − PW
TVSOP − DGV
HA4066
HA4066
Tape and reel
Tape and reel
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 − JUNE 2003
FUNCTION TABLE
(each switch)
INPUT
CONTROL
(C)
SWITCH
L
OFF
ON
H
logic diagram (positive logic)
A
V
CC
V
CC
B
C
One of Four Switches
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Switch I/O voltage range, V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V + 0.5 V
IO
CC
Control-input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
IK
I
I/O diode current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
IO IO CC
IOK
On-state switch current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
T
IO
CC
Continuous current through V or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
CC
Package thermal impedance, θ (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
JA
(see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
(see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
(see Note 3): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
(see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
(see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
(see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. The package thermal impedance is calculated in accordance with JESD 51-5.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 − JUNE 2003
recommended operating conditions (see Note 5)
MIN
MAX
UNIT
†
V
Supply voltage
2
5.5
V
CC
IH
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
1.5
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
= 2 V
V
CC
V
CC
V
CC
× 0.7
V
High-level input voltage, control inputs
V
V
× 0.7
× 0.7
0.5
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
V
V
V
× 0.3
CC
CC
CC
V
IL
Low-level input voltage, control inputs
× 0.3
× 0.3
5.5
V
V
Control input voltage
Input/output voltage
0
0
V
V
I
V
CC
IO
V
CC
V
CC
V
CC
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
200
100
20
Δt/Δv Input transition rise or fall rate
Operating free-air temperature
ns/V
T
A
−40
85
°C
†
With supply voltages at or near 2 V, the analog switch on-state resistance becomes very nonlinear. Only digital signals should be transmitted
at these low supply voltages.
NOTE 5: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 − JUNE 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
TYP
38
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
V
CC
MIN
MAX
180
150
75
2.3 V
3 V
225
190
100
600
225
125
40
I = −1 mA,
V = V or GND,
T
On-state
switch resistance
I
CC
29
r
r
Ω
on
V
C
= V
IH
4.5 V
2.3 V
3 V
21
(see Figure 1)
143
57
500
180
100
30
I = −1 mA,
V = V to GND,
T
Peak
on-state resistance
Ω
I
CC
on(p)
V
C
= V
IH
4.5 V
2.3 V
3 V
31
6
Difference in
on-state resistance
between switches
I = −1 mA,
V = V to GND,
T
3
20
30
Δr
Ω
I
CC
on
V
C
= V
IH
4.5 V
0 to 5.5 V
2
15
20
I
I
Control input current V = 5.5 V or GND
0.1
1
μA
I
V = V and
I
CC
V
= GND, or
O
Off-state
switch leakage
current
V = GND and
I
I
5.5 V
0.1
0.1
1
μA
μA
S(off)
V
V
= V
= V
,
O
CC
C
IL
(see Figure 2)
On-state
switch leakage
current
V = V or GND,
I
CC
I
I
V
C
= V
5.5 V
5.5 V
1
S(on)
IH
(see Figure 3)
Supply current
V = V or GND
20
μA
CC
I
CC
Control input
capacitance
C
C
C
1.5
5.5
0.5
pF
ic
io
F
Switch input/output
capacitance
pF
pF
Feed-through
capacitance
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 − JUNE 2003
switching characteristics over recommended operating free-air temperature range,
CC = 2.5 V 0.2 V (unless otherwise noted)
V
T = 25°C
A
FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
PARAMETER
MIN
MAX
UNIT
MIN
TYP
MAX
t
t
Propagation
delay time
C = 15 pF,
(see Figure 4)
PLH
PHL
L
A or B
C
B or A
A or B
1.2
10
16
ns
C = 15 pF,
L
t
t
Switch
turn-on time
PZH
PZL
3.3
15
20
ns
R = 1 kΩ
L
(see Figure 5)
C = 15 pF,
L
t
t
Switch
turn-off time
PLZ
PHZ
C
A or B
C
A or B
B or A
A or B
6
2.6
4.2
15
12
25
23
18
32
ns
ns
ns
R = 1 kΩ
L
(see Figure 5)
t
t
Propagation
delay time
C = 50 pF,
PLH
PHL
L
(see Figure 4)
C = 50 pF,
L
t
t
Switch
turn-on time
PZH
PZL
R = 1 kΩ
L
(see Figure 5)
C = 50 pF,
L
t
t
Switch
turn-off time
PLZ
PHZ
C
A or B
9.6
25
32
ns
R = 1 kΩ
L
(see Figure 5)
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V 0.3 V (unless otherwise noted)
T = 25°C
A
FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
PARAMETER
MIN
MAX
UNIT
MIN
TYP
MAX
t
t
Propagation
delay time
C = 15 pF,
(see Figure 4)
PLH
PHL
L
A or B
C
B or A
A or B
0.8
6
10
ns
C = 15 pF,
L
t
t
Switch
turn-on time
PZH
PZL
2.3
11
15
ns
R = 1 kΩ
L
(see Figure 5)
C = 15 pF,
L
t
t
Switch
turn-off time
PLZ
PHZ
C
A or B
C
A or B
B or A
A or B
4.5
1.5
3
11
9
15
12
22
ns
ns
ns
R = 1 kΩ
L
(see Figure 5)
t
t
Propagation
delay time
C = 50 pF,
PLH
PHL
L
(see Figure 4)
C = 50 pF,
L
t
t
Switch
turn-on time
PZH
PZL
18
R = 1 kΩ
L
(see Figure 5)
C = 50 pF,
L
t
t
Switch
turn-off time
PLZ
PHZ
C
A or B
7.2
18
22
ns
R = 1 kΩ
L
(see Figure 5)
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 − JUNE 2003
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V 0.5 V (unless otherwise noted)
T = 25°C
A
FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
PARAMETER
MIN
MAX
UNIT
MIN
TYP
MAX
t
t
Propagation
delay time
C = 15 pF,
(see Figure 4)
PLH
PHL
L
A or B
C
B or A
A or B
0.3
4
7
ns
C = 15 pF,
L
t
t
Switch
turn-on time
PZH
PZL
1.6
7
10
ns
R = 1 kΩ
L
(see Figure 5)
C = 15 pF,
L
t
t
Switch
turn-off time
PLZ
PHZ
C
A or B
C
A or B
B or A
A or B
3.2
0.6
2.1
7
6
10
8
ns
ns
ns
R = 1 kΩ
L
(see Figure 5)
t
t
Propagation
delay time
C = 50 pF,
PLH
PHL
L
(see Figure 4)
C = 50 pF,
L
t
t
Switch
turn-on time
PZH
PZL
12
16
R = 1 kΩ
L
(see Figure 5)
C = 50 pF,
L
t
t
Switch
turn-off time
PLZ
PHZ
C
A or B
5.1
12
16
ns
R = 1 kΩ
L
(see Figure 5)
analog switch characteristics over operating free-air temperature range (unless otherwise noted)
TO
(OUTPUT
)
T
A
= 25°C
FROM
(INPUT)
TEST
CONDITIONS
PARAMETER
V
CC
UNIT
MIN
TYP
MAX
2.3 V
3 V
30
35
C = 50 pF, R = 600 Ω,
L
L
Frequency response
(switch on)
f
in
= 1 MHz (sine wave)
A or B
A or B
C
B or A
B or A
A or B
B or A
MHz
20log (V /V ) = −3 dB (see Figure 6)
10
O
I
4.5 V
2.3 V
3 V
50
−45
−45
−45
15
Crosstalk
(between any switches)
C = 50 pF, R = 600 Ω,
L
L
dB
mV
dB
f
in
= 1 MHz (sine wave) (see Figure 7)
4.5 V
2.3 V
3 V
Crosstalk
(control input to
signal output)
C = 50 pF, R = 600 Ω,
L
L
20
f
in
= 1 MHz (square wave) (see Figure 8)
4.5 V
2.3 V
3 V
50
−40
−40
−40
0.1
Feed-through attenuation
(switch off)
C = 50 pF, R = 600 Ω, f = 1 MHz
L
L
in
A or B
(see Figure 9)
4.5 V
2.3 V
V = 2 V
I
p-p
C = 50 pF, R = 10 kΩ,
L
L
Sine-wave distortion
A or B
B or A
3 V
0.1
0.1
%
V = 2.5 V
I
f
in
= 1 kHz (sine wave)
p-p
(see Figure 10)
4.5 V
V = 4 V
I
p-p
operating characteristics, TA = 25°C
PARAMETER
TEST CONDITIONS
C = 50 pF, f = 10 MHz
TYP
UNIT
C
Power dissipation capacitance
4.5
pF
pd
L
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 − JUNE 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
V
C
= V
IH
V
CC
V = V
V
O
I
CC or GND
(ON)
GND
VI – VO
10–3
ron
+
W
1 mA
V
V − V
I
O
Figure 1. On-State Resistance Test Circuit
V
CC
V
C
= V
IL
V
CC
A
V
I
V
O
(OFF)
GND
Condition 1: V = 0, V = V
CC
I
O
Condition 2: V = V , V = 0
I
CC
O
Figure 2. Off-State Switch Leakage-Current Test Circuit
V
CC
V
C
= V
IH
V
CC
A
V
I
Open
(ON)
GND
V = V or GND
I
CC
Figure 3. On-State Leakage-Current Test Circuit
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 − JUNE 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
V
C
= V
IH
V
CC
V
O
V
I
(ON)
GND
50 Ω
C
L
TEST CIRCUIT
t
t
f
r
V
CC
V
I
90%
50%
10%
90%
50%
A or B
10%
0 V
t
t
PHL
PLH
V
V
OH
V
O
50%
50%
B or A
OL
VOLTAGE WAVEFORMS
Figure 4. Propagation Delay Time, Signal Input to Signal Output
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 − JUNE 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
TEST
S1
S2
50 Ω
t
GND
V
CC
GND
PZL
PZH
V
C
t
V
CC
t
t
GND
V
GND
V
CC
PLZ
PHZ
CC
R = 1 kΩ
L
V
CC
V
I
V
O
S1
S2
C
L
GND
TEST CIRCUIT
V
CC
V
CC
V
C
50%
50%
0 V
0 V
t
t
PZH
PZL
≈V
CC
V
OH
V
O
50%
50%
V
OL
≈0 V
(t
, t
)
PZL PZH
V
CC
V
CC
V
C
50%
50%
0 V
0 V
t
t
PHZ
PLZ
≈V
CC
V
OH
V
OH
− 0.3 V
V
O
V
OL
+ 0.3 V
V
OL
≈0 V
(t
, t
)
PLZ PHZ
VOLTAGE WAVEFORMS
Figure 5. Switching Time (t
, t
t
, t
), Control to Signal Output
PZL PLZ, PZH PHZ
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 − JUNE 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
V
CC
0.1 μF
V
CC
V
I
f
V
in
(ON)
GND
O
50 Ω
R = 600 Ω
L
C = 50 pF
L
V
CC
/2
Figure 6. Frequency Response (Switch On)
V
CC
V
C
= V
CC
V
CC
V
I
f
V
in
(ON)
GND
O1
600 Ω
0.1 μF
C = 50 pF
L
R = 600 Ω
L
50 Ω
V
CC
/2
V
I
V
CC
V
C
= GND
V
CC
(OFF)
GND
V
O2
C = 50 pF
R = 600 Ω
L
L
600 Ω
V
CC
/2
Figure 7. Crosstalk Between Any Two Switches
V
CC
V
C
50 Ω
V
CC
V
O
GND
R = 600 Ω
L
C = 50 pF
L
600 Ω
V
CC
/2
V
CC
/2
Figure 8. Crosstalk (Control Input − Switch Output)
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 − JUNE 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
V
C
= GND
0.1 μF
V
CC
V
I
f
in
V
O
(OFF)
GND
50 Ω
600 Ω
C = 50 pF
R = 600 Ω
L
L
V
CC
/2
V
CC
/2
Figure 9. Feed-Through Attenuation (Switch Off)
V
CC
V
C
= V
CC
10 μF
10 μF
V
CC
V
I
f
in
V
O
(ON)
GND
600 Ω
C = 50 pF
L
R = 10 kΩ
L
V
CC
/2
Figure 10. Sine-Wave Distortion
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
8-Dec-2009
PACKAGING INFORMATION
Orderable Device
SN74AHC4066D
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC4066DBR
SN74AHC4066DBRE4
SN74AHC4066DBRG4
SN74AHC4066DE4
SN74AHC4066DG4
SN74AHC4066DGVR
SN74AHC4066DGVRE4
SN74AHC4066DGVRG4
SN74AHC4066DR
SSOP
SSOP
SSOP
SOIC
DB
DB
DB
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TVSOP
TVSOP
TVSOP
SOIC
DGV
DGV
DGV
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC4066DRE4
SN74AHC4066DRG4
SN74AHC4066N
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PDIP
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74AHC4066NE4
SN74AHC4066NSR
SN74AHC4066NSRE4
SN74AHC4066NSRG4
SN74AHC4066PW
PDIP
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SO
NS
NS
NS
PW
PW
PW
PW
PW
PW
RGY
RGY
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
VQFN
VQFN
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHC4066PWE4
SN74AHC4066PWG4
SN74AHC4066PWR
SN74AHC4066PWRE4
SN74AHC4066PWRG4
SN74AHC4066RGYR
SN74AHC4066RGYRG4
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
8-Dec-2009
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74AHC4066DBR
SN74AHC4066DGVR
SN74AHC4066DR
SSOP
TVSOP
SOIC
DB
DGV
D
14
14
14
14
14
14
2000
2000
2500
2000
2000
3000
330.0
330.0
330.0
330.0
330.0
330.0
16.4
12.4
16.4
16.4
12.4
12.4
8.2
6.8
6.5
8.2
6.9
3.75
6.6
4.0
2.5
1.6
2.1
2.5
1.6
1.15
12.0
8.0
16.0
12.0
16.0
16.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
9.0
8.0
SN74AHC4066NSR
SN74AHC4066PWR
SN74AHC4066RGYR
SO
NS
10.5
5.6
12.0
8.0
TSSOP
VQFN
PW
RGY
3.75
8.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74AHC4066DBR
SN74AHC4066DGVR
SN74AHC4066DR
SSOP
TVSOP
SOIC
DB
DGV
D
14
14
14
14
14
14
2000
2000
2500
2000
2000
3000
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
38.0
35.0
38.0
38.0
35.0
35.0
SN74AHC4066NSR
SN74AHC4066PWR
SN74AHC4066RGYR
SO
NS
TSSOP
VQFN
PW
RGY
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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