SN74AHCT138DGVRG4 [TI]
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS; 3线路至8线路解码器/多路解复用器
| 型号： | SN74AHCT138DGVRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS |
| 文件： | 总25页 (文件大小：1043K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54AHCT138, SN74AHCT138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS266M – DECEMBER 1995 – REVISED JULY 2003
Inputs Are TTL-Voltage Compatible
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Designed Specifically for High-Speed
Memory Decoders and Data-Transmission
Systems
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
Incorporate Three Enable Inputs to Simplify
Cascading and/or Data Reception
– 1000-V Charged-Device Model (C101)
SN74AHCT138 . . . RGY PACKAGE
(TOP VIEW)
SN54AHCT138 . . . FK PACKAGE
(TOP VIEW)
SN54AHCT138 . . . J OR W PACKAGE
SN74AHCT138 . . . D, DB, DGV, N, NS,
OR PW PACKAGE
(TOP VIEW)
1
16
A
B
V
CC
15 Y0
1
2
3
4
5
6
7
8
16
3
2
1
20 19
18
Y1
C
G2A
NC
4
5
6
7
8
B
C
G2A
G2B
G1
15
14
13
12
11
10
2
3
4
5
6
7
Y0
Y1
Y2
Y3
Y4
Y5
17 Y2
16
14
13
12
11
10
9
C
Y1
Y2
Y3
Y4
Y5
Y6
NC
G2A
G2B
G1
15
Y3
G2B
G1
14
Y4
9 10 11 12 13
Y7
Y7
8
9
GND
NC – No internal connection
description/ordering information
The ’AHCT138 3-line to 8-line decoders/demultiplexers are designed to be used in high-performance
memory-decoding and data-routing applications that require very short propagation-delay times. In
high-performance memory systems, this decoder can be used to minimize the effects of system decoding.
When employed with high-speed memories utilizing a fast enable circuit, the delay times of this decoder and
the enable time of the memory usually are less than the typical access time of the memory. This means that
the effective system delay introduced by the decoder is negligible.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
QFN – RGY
PDIP – N
Tape and reel
Tube
SN74AHCT138RGYR
SN74AHCT138N
SN74AHCT138D
SN74AHCT138DR
HB138
SN74AHCT138N
Tube
SOIC – D
AHCT138
Tape and reel
–40°C to 85°C
SOP – NS
Tape and reel
Tape and reel
Tube
SN74AHCT138NSR
SN74AHCT138DBR
SN74AHCT138PW
SN74AHCT138PWR
SN74AHCT138DGVR
SNJ54AHCT138J
AHCT138
HB138
SSOP – DB
TSSOP – PW
HB138
Tape and reel
Tape and reel
Tube
TVSOP – DGV
CDIP – J
HB138
SNJ54AHCT138J
SNJ54AHCT138W
SNJ54AHCT138FK
–55°C to 125°C
CFP – W
Tube
SNJ54AHCT138W
SNJ54AHCT138FK
LCCC – FK
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT138, SN74AHCT138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS266M – DECEMBER 1995 – REVISED JULY 2003
description/ordering information (continued)
The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two
active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.
A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one
inverter. An enable input can be used as a data input for demultiplexing applications.
FUNCTION TABLE
ENABLE INPUTS
SELECT INPUTS
OUTPUTS
G1
G2A
H
X
X
L
G2B
C
X
X
X
L
B
X
X
X
L
A
X
X
X
L
Y0
H
H
H
L
Y1
H
H
H
H
L
Y2
H
H
H
H
H
L
Y3
H
H
H
H
H
H
L
Y4
H
H
H
H
H
H
H
L
Y5
H
H
H
H
H
H
H
H
L
Y6
H
H
H
H
H
H
H
H
H
L
Y7
H
H
H
H
H
H
H
H
H
H
L
X
X
L
X
H
X
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
H
L
H
H
H
H
H
H
H
L
L
H
H
L
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
L
H
L
H
H
H
L
H
H
H
H
L
H
H
logic diagram (positive logic)
15
14
Y0
Y1
1
A
13
12
11
10
9
Y2
Y3
Y4
2
Select
B
Inputs
Data
Outputs
3
C
Y5
Y6
Y7
4
7
G2A
5
Enable
Inputs
G2B
6
G1
Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, RGY, and W packages.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT138, SN74AHCT138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS266M – DECEMBER 1995 – REVISED JULY 2003
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
O
CC
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA
IK
I
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through V
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±75 mA
JA
(see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W
(see Note 2): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
(see Note 2): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
(see Note 2): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
(see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
(see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3. The package thermal impedance is calculated in accordance with JESD 51-5.
recommended operating conditions (see Note 4)
SN54AHCT138 SN74AHCT138
UNIT
MIN
4.5
2
MAX
MIN
4.5
2
MAX
V
V
V
V
V
Supply voltage
5.5
5.5
V
V
CC
IH
IL
High-level input voltage
Low-level input voltage
Input voltage
0.8
5.5
0.8
5.5
V
0
0
0
0
V
I
Output voltage
V
V
V
O
CC
CC
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
–8
–8
mA
mA
ns/V
°C
OH
OL
8
8
20
85
∆t/∆v
20
T
–55
125
–40
A
NOTE 4: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT138, SN74AHCT138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS266M – DECEMBER 1995 – REVISED JULY 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
TYP
SN54AHCT138 SN74AHCT138
PARAMETER
TEST CONDITIONS
= –50
V
UNIT
V
CC
MIN
4.4
MAX
MIN
4.4
MAX
MIN
4.4
MAX
I
I
I
I
A
4.5
OH
OH
OL
OL
V
4.5 V
4.5 V
OH
OL
= –8 mA
= 50
= 8 mA
3.94
3.8
3.8
A
0.1
0.36
±0.1
4
0.1
0.5
±1*
40
0.1
0.44
±1
V
V
I
I
V = 5.5 V or GND
0 V to 5.5 V
5.5 V
A
A
I
I
V = V
or GND,
I = 0
O
40
CC
I
CC
One input at 3.4 V,
Other inputs at V
†
5.5 V
5 V
1.35
10
1.5
1.5
10
mA
pF
∆I
CC
or GND
CC
V = V or GND
CC
C
2
i
I
* On products compliant to MIL-PRF-38535, this parameter is not production tested at V
This is the increase in supply current for each input at one of the specified TTL voltage levels rather than 0 V or V
CC
= 0 V.
CC
†
.
switching characteristics over recommended operating free-air temperature range,
V
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
CC
T = 25°C
A
SN54AHCT138 SN74AHCT138
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
ns
MIN
TYP
MAX
MIN
1*
1*
1*
1*
1*
1*
1
MAX
12*
12*
10.5*
10.5*
11*
MIN
1
MAX
12
t
t
t
t
t
t
t
t
t
t
t
t
7.6* 10.4*
7.6* 10.4*
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
A, B, C
G1
Any Y
Any Y
Any Y
Any Y
Any Y
Any Y
C
C
C
C
C
C
= 15 pF
= 15 pF
= 15 pF
= 50 pF
= 50 pF
= 50 pF
L
L
L
L
L
L
1
12
6.6*
6.6*
7*
9.1*
9.1*
9.6*
9.6*
11.4
11.4
10.1
10.1
10.6
10.6
1
10.5
10.5
11
ns
1
1
ns
G2A, G2B
A, B, C
G1
7*
11*
1
11
8.1
8.1
7.1
7.1
7.5
7.5
13
1
13
ns
1
13
1
13
1
11.5
11.5
12
1
11.5
11.5
12
ns
1
1
1
1
ns
G2A, G2B
1
12
1
12
*
On products compliant to MIL-PRF-38535, this parameter is not production tested.
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
No load, f = 1 MHz
TYP
UNIT
C
Power dissipation capacitance
14
pF
pd
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT138, SN74AHCT138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS266M – DECEMBER 1995 – REVISED JULY 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
Open
GND
S1
R
= 1 kΩ
L
TEST
S1
From Output
Under Test
Test
Point
From Output
Under Test
t
t
/t
Open
PLH PHL
/t
C
C
L
t
V
CC
L
PLZ PZL
/t
(see Note A)
(see Note A)
GND
PHZ PZH
Open Drain
V
CC
LOAD CIRCUIT FOR
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3-STATE AND OPEN-DRAIN OUTPUTS
3 V
1.5 V
Timing Input
0 V
t
w
t
h
3 V
t
su
3 V
0 V
1.5 V
1.5 V
Input
Input
1.5 V
1.5 V
Data Input
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3 V
0 V
3 V
0 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
t
t
t
t
t
PZL
PLZ
PLH
PHL
Output
Waveform 1
V
≈V
OH
CC
In-Phase
Output
50% V
50% V
50% V
CC
50% V
CC
CC
V
S1 at V
(see Note B)
CC
V
V
+ 0.3 V
OL
V
OL
OL
t
t
t
PHL
PLH
PZH
PHZ
Output
Waveform 2
S1 at GND
V
OH
V
OH
Out-of-Phase
Output
– 0.3 V
OH
50% V
50% V
CC
CC
CC
V
≈0 V
(see Note B)
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT138, SN74AHCT138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS266M – DECEMBER 1995 – REVISED JULY 2003
APPLICATION INFORMATION
SN74AHCT138
BIN/OCT
15
14
13
12
11
10
9
1
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
1
2
2
3
4
6
4
5
&
V
CC
EN
7
SN74AHCT138
BIN/OCT
15
14
13
12
11
10
9
1
2
0
8
A0
A1
A2
1
2
1
2
3
4
5
6
7
9
10
11
12
13
14
15
3
4
6
4
5
&
A3
A4
EN
7
SN74AHCT138
BIN/OCT
15
14
13
12
11
10
9
1
2
0
16
17
18
19
20
21
22
23
1
2
1
2
3
4
5
6
7
3
4
6
4
5
&
EN
7
Figure 2. 24-Bit Decoding Scheme
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT138, SN74AHCT138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS266M – DECEMBER 1995 – REVISED JULY 2003
APPLICATION INFORMATION
SN74AHCT138
BIN/OCT
15
14
13
12
11
10
9
1
2
0
0
1
2
3
4
5
6
7
A0
A1
A2
1
2
1
2
3
4
5
6
7
3
4
6
4
5
&
V
CC
A3
EN
A4
7
SN74AHCT138
BIN/OCT
15
14
13
12
11
10
9
1
2
0
8
1
2
1
2
3
4
5
6
7
9
10
11
12
13
14
15
3
4
6
4
5
&
EN
7
SN74AHCT138
BIN/OCT
15
14
13
12
11
10
9
1
2
0
16
17
18
19
20
21
22
23
1
2
1
2
3
4
5
6
7
3
4
6
4
5
&
EN
7
SN74AHCT138
BIN/OCT
15
14
13
12
11
10
9
1
2
0
24
25
26
27
28
29
30
31
1
2
1
2
3
4
5
6
7
3
4
6
4
5
&
EN
7
Figure 3. 32-Bit Decoding Scheme
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2007, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
CFP
Drawing
5962-9851701Q2A
5962-9851701QEA
5962-9851701QFA
SN74AHCT138D
ACTIVE
ACTIVE
ACTIVE
ACTIVE
FK
J
20
16
16
16
1
1
1
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB
A42
N / A for Pkg Type
N / A for Pkg Type
W
D
SOIC
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHCT138DBLE
SN74AHCT138DBR
OBSOLETE
ACTIVE
SSOP
SSOP
DB
DB
16
16
TBD
Call TI
Call TI
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHCT138DBRE4
SN74AHCT138DBRG4
SN74AHCT138DE4
SN74AHCT138DG4
SN74AHCT138DGVR
SN74AHCT138DGVRE4
SN74AHCT138DGVRG4
SN74AHCT138DR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
SOIC
SOIC
TVSOP
TVSOP
TVSOP
SOIC
SOIC
SOIC
PDIP
DB
DB
D
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
DGV
DGV
DGV
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHCT138DRE4
SN74AHCT138DRG4
SN74AHCT138N
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74AHCT138NE4
SN74AHCT138NSR
SN74AHCT138NSRE4
SN74AHCT138NSRG4
SN74AHCT138PW
PDIP
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SO
NS
NS
NS
PW
PW
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHCT138PWE4
SN74AHCT138PWG4
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHCT138PWLE
SN74AHCT138PWR
OBSOLETE TSSOP
PW
PW
16
16
TBD
Call TI
Call TI
ACTIVE
TSSOP
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AHCT138PWRE4
ACTIVE
TSSOP
PW
16
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
Orderable Device
SN74AHCT138PWRG4
SN74AHCT138RGYR
SN74AHCT138RGYRG4
Status (1)
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
PW
16
16
16
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
QFN
QFN
RGY
RGY
1000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
1000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SNJ54AHCT138FK
SNJ54AHCT138J
SNJ54AHCT138W
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CFP
FK
J
20
16
16
1
1
1
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB
A42
N / A for Pkg Type
N / A for Pkg Type
W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
22-Sep-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
330
330
330
330
180
(mm)
16
SN74AHCT138DBR
SN74AHCT138DGVR
SN74AHCT138DR
DB
DGV
D
16
16
16
16
16
16
SITE 41
SITE 41
SITE 27
SITE 41
SITE 41
SITE 41
8.2
6.8
6.5
8.2
7.0
3.8
6.6
4.0
2.5
1.6
2.1
2.5
1.6
1.5
12
8
16
16
16
16
12
12
Q1
Q1
Q1
Q1
Q1
Q1
12
16
10.3
10.5
5.6
8
SN74AHCT138NSR
SN74AHCT138PWR
SN74AHCT138RGYR
NS
16
12
8
PW
RGY
12
12
4.3
8
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
22-Sep-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
SN74AHCT138DBR
SN74AHCT138DGVR
SN74AHCT138DR
DB
DGV
D
16
16
16
16
16
16
SITE 41
SITE 41
SITE 27
SITE 41
SITE 41
SITE 41
346.0
346.0
342.9
346.0
346.0
190.0
346.0
346.0
336.6
346.0
346.0
212.7
0.0
0.0
0.0
0.0
0.0
0.0
SN74AHCT138NSR
SN74AHCT138PWR
SN74AHCT138RGYR
NS
PW
RGY
Pack Materials-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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Applications
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Digital Control
Military
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
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interface.ti.com
logic.ti.com
Logic
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power.ti.com
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Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lpw
Telephony
Low Power
Wireless
Video & Imaging
Wireless
www.ti.com/wireless
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Copyright © 2007, Texas Instruments Incorporated
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