SN74ALS1035 [TI]
HEX NONINVERTING BUFFERS WITH OPEN-COLLECTOR OUTPUTS; 与集电极开路输出HEX同相缓冲区
| 型号： | SN74ALS1035 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | HEX NONINVERTING BUFFERS WITH OPEN-COLLECTOR OUTPUTS |
| 文件： | 总5页 (文件大小：76K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54ALS1035, SN74ALS1035
HEX NONINVERTING BUFFERS
WITH OPEN-COLLECTOR OUTPUTS
SDAS243B – APRIL 1982 – REVISED AUGUST 2001
SN54ALS1035 . . . J OR W PACKAGE
SN74ALS1035 . . . D OR N PACKAGE
(TOP VIEW)
Noninverting Buffers With
Open-Collector Outputs
description
1A
1Y
2A
2Y
3A
V
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
6A
6Y
5A
5Y
4A
4Y
These devices contain six independent
noninverting buffers. They perform the Boolean
function Y = A. The open-collector outputs require
pullup resistors to perform correctly. They can be
connected to other open-collector outputs to
implement active-low wired-OR or active-high
wired-AND functions. Open-collector devices are
3Y
GND
8
often used to generate higher V
levels.
OH
SN54ALS1035 . . . FK PACKAGE
(TOP VIEW)
3
2
1
20 19
18
2A
NC
2Y
4
5
6
7
8
6Y
NC
5A
NC
5Y
17
16
15
14
NC
3A
9 10 11 12 13
NC – No internal connection
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
Tube
SN7ALS1035D
SOIC – D
ALS1035
0°C to 70°C
Tape and reel SN7ALS1035DR
PDIP – N
CDIP – J
CFP – W
LCCC - FK
Tube
Tube
Tube
Tube
SN74ALS1035N
SNJ54ALS1035J
SNJ54ALS1035W
SNJ54ALS1035FK
SN74ALS1035N
SNJ54ALS1035J
SNJ54ALS1035W
–55°C to 125°C
SNJ54ALS1035FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each buffer)
INPUT
A
OUTPUT
Y
H
L
H
L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2001, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS1035, SN74ALS1035
HEX NONINVERTING BUFFERS
WITH OPEN-COLLECTOR OUTPUTS
SDAS243B – APRIL 1982 – REVISED AUGUST 2001
logic diagram (positive logic)
1
2
4
1A
1Y
2Y
3Y
4Y
5Y
6Y
3
2A
5
6
3A
9
8
4A
11
10
12
5A
13
6A
Pin numbers shown are for the D, J, N, and W packages.
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Off-state output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Package thermal impedance, θ (see Note 1): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
JA
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
1. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
SN54ALS1035
MIN NOM MAX
SN74ALS1035
MIN NOM MAX
UNIT
V
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output current
Operating free-air temperature
IH
0.7
5.5
12
0.8
5.5
24
V
IL
V
OH
I
mA
°C
OL
T
A
–55
125
0
70
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS1035, SN74ALS1035
HEX NONINVERTING BUFFERS
WITH OPEN-COLLECTOR OUTPUTS
SDAS243B – APRIL 1982 – REVISED AUGUST 2001
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54ALS1035
SN74ALS1035
PARAMETER
TEST CONDITIONS
UNIT
V
†
†
MIN TYP
MAX
–1.5
0.4
MIN TYP
MAX
–1.5
0.4
0.5
0.1
0.1
20
V
V
V
V
= 4.5 V,
= 4.5 V
I = –18 mA
I
IK
CC
I
= 12 mA
= 24 mA
0.25
0.25
0.35
OL
OL
V
OL
CC
I
I
I
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 4.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
V
= 5.5 V
0.1
0.1
20
mA
mA
µA
OH
OH
V = 7 V
I
I
V = 2.7 V
I
IH
V = 0.4 V
I
–0.1
6
–0.1
6
mA
mA
mA
IL
V = 4.5 V
I
3
8
3
8
CCH
CCL
V = 0
I
14
14
†
All typical values are at V
= 5 V, T = 25°C.
A
CC
switching characteristics (see Figure 1)
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
= 680 Ω,
= MIN to MAX
FROM
TO
(OUTPUT)
‡
PARAMETER
(INPUT)
UNIT
T
A
SN54ALS1035 SN74ALS1035
MIN
5
MAX
35
MIN
5
MAX
30
t
t
PLH
A
Y
ns
2
14
2
12
PHL
‡
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS1035, SN74ALS1035
HEX NONINVERTING BUFFERS
WITH OPEN-COLLECTOR OUTPUTS
SDAS243B – APRIL 1982 – REVISED AUGUST 2001
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7 V
R
= R1 = R2
V
CC
L
S1
R1
R
L
Test
Point
From Output
Under Test
From Output
Under Test
Test
Point
Test
Point
From Output
Under Test
C
C
L
R
L
R2
L
C
L
(see Note A)
(see Note A)
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
3.5 V
Timing
Input
High-Level
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
0.3 V
t
t
w
h
t
su
3.5 V
3.5 V
0.3 V
Data
Input
Low-Level
1.3 V
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
0.3 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
3.5 V
t
PZL
Input
1.3 V
1.3 V
t
PLZ
0.3 V
PHL
3.5 V
t
Waveform 1
S1 Closed
(see Note B)
t
PLH
1.3 V
V
OH
In-Phase
Output
1.3 V
1.3 V
1.3 V
V
OL
0.3 V
V
OL
t
PHZ
t
PLH
t
PZH
t
PHL
V
OH
V
Waveform 2
S1 Open
(see Note B)
OH
OL
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
0.3 V
V
0 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, t = t = 2 ns, duty cycle = 50%.
r
f
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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TI’sstandardwarranty. TestingandotherqualitycontroltechniquesareutilizedtotheextentTIdeemsnecessary
to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except
those mandated by government requirements.
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Post Office Box 655303
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Copyright 2001, Texas Instruments Incorporated
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