SN74ALS1640AN [TI]
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS; 八路总线收发器与3态输出
| 型号： | SN74ALS1640AN |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| 文件： | 总5页 (文件大小：92K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74ALS1640A, SN74ALS1645A
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS246B – DECEMBER 1982 – REVISED FEBRUARY 1997
DW OR N PACKAGE
(TOP VIEW)
Bidirectional Bus Transceivers in
High-Density 20-Pin Packages
Lower-Power Versions of SN74ALS640B
and SN74ALS645A
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DIR
A1
A2
A3
A4
A5
A6
A7
A8
V
CC
OE
B1
B2
B3
B4
B5
B6
B7
B8
Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic (N) 300-mil DIPs
description
These octal bus transceivers are designed for
asynchronous two-way communication between
data buses. These devices transmit data from the
A bus to the B bus or from the B bus to the A bus,
depending on the level at the direction-control
GND
(DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively
isolated. The SN74ALS1640A features inverting logic, while the SN74ALS1645A features noninverting logic.
The SN74ALS1640A and SN74ALS1645A are characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
OPERATION
OE
DIR
L
SN74ALS1640A
SN74ALS1645A
B data to A bus
A data to B bus
Isolation
L
L
B data to A bus
A data to B bus
Isolation
H
H
X
†
logic symbols
SN74ALS1640A
G3
SN74ALS1645A
G3
19
19
OE
1
OE
1
DIR
3 EN1 [BA]
3 EN2 [AB]
DIR
3 EN1 [BA]
3 EN2 [AB]
2
18
2
18
A1
B1
1
A1
B1
1
2
2
3
17
16
15
14
13
12
11
3
4
5
6
7
8
9
17
16
15
14
13
12
11
A2
4
B2
B3
B4
B5
B6
B7
B8
A2
A3
A4
A5
A6
A7
A8
B2
B3
B4
B5
B6
B7
B8
A3
5
A4
6
A5
7
A6
8
A7
9
A8
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALS1640A, SN74ALS1645A
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS246B – DECEMBER 1982 – REVISED FEBRUARY 1997
logic diagrams (positive logic)
SN74ALS1640A
SN74ALS1645A
19
19
1
OE
OE
1
DIR
DIR
2
18
2
18
B1
B1
A1
A1
To Seven Other Transceivers
To Seven Other Transceivers
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V : All inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Package thermal impedance, θ (see Note 1): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
JA
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages, which
use a trace length of zero.
recommended operating conditions
SN74ALS1640A
SN74ALS1645A
UNIT
MIN NOM
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Operating free-air temperature
IH
0.8
–15
16
V
IL
I
I
mA
mA
°C
OH
OL
T
A
0
70
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALS1640A, SN74ALS1645A
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS246B – DECEMBER 1982 – REVISED FEBRUARY 1997
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN74ALS1640A
SN74ALS1645A
PARAMETER
TEST CONDITIONS
UNIT
†
MIN TYP
MAX
V
V
V
V
= 4.5 V,
I = –18 mA
–1.5
V
IK
CC
I
= 4.5 V to 5.5 V,
I
I
I
I
I
= –0.4 mA
= –3 mA
= –15 mA
= 8 mA
V
CC
–2
CC
OH
OH
OH
OL
OL
2.4
2
3.2
V
OH
V
CC
V
CC
V
CC
V
CC
V
CC
= 4.5 V
= 4.5 V
= 5.5 V
= 5.5 V,
= 5.5 V,
0.25
0.35
0.4
0.5
0.1
0.1
20
V
OL
V
= 16 mA
Control inputs
A or B ports
V = 7 V
I
I
I
mA
µA
I
V = 5.5 V
I
Control inputs
V = 2.7 V
I
IH
IL
‡
A or B ports
Control inputs
20
–0.1
–0.1
–112
32
I
I
I
V = 0.4 V
I
mA
mA
mA
‡
A or B ports
§
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V
= 5.5 V
V = 2.25 V
O
–30
O
SN74ALS1640A
SN74ALS1645A
18
25
CC
38
†
‡
§
All typical values are at V
For I/O ports, the parameters I and I include the off-state output current.
The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, I
= 5 V, T = 25°C.
A
IH IL
CC
.
OS
switching characteristics (see Figure 1)
V
C
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
R1 = 500 Ω,
R2 = 500 Ω,
T
A
FROM
TO
(OUTPUT)
PARAMETER
(INPUT)
UNIT
¶
= MIN to MAX
SN74ALS1640A SN74ALS1645A
MIN
4
MAX
15
MIN
2
MAX
13
t
t
t
t
t
t
PLH
PHL
PZH
PZL
PHZ
PLZ
A or B
OE
ns
ns
ns
B or A
A or B
A or B
2
10
2
13
5
20
8
25
5
22
8
25
2
10
2
12
OE
5
13
3
18
¶
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALS1640A, SN74ALS1645A
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS246B – DECEMBER 1982 – REVISED FEBRUARY 1997
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7 V
R
= R1 = R2
V
CC
L
S1
R1
R
L
Test
Point
From Output
Under Test
From Output
Under Test
Test
Point
Test
Point
From Output
Under Test
C
C
L
R
L
R2
L
C
L
(see Note A)
(see Note A)
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
3.5 V
Timing
Input
High-Level
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
0.3 V
t
h
t
w
t
su
3.5 V
3.5 V
0.3 V
Data
Input
Low-Level
1.3 V
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
0.3 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
3.5 V
t
PZL
Input
1.3 V
1.3 V
t
PLZ
0.3 V
PHL
3.5 V
t
Waveform 1
S1 Closed
(see Note B)
t
PLH
1.3 V
V
OH
In-Phase
Output
1.3 V
1.3 V
1.3 V
V
OL
0.3 V
V
OL
t
PHZ
t
PLH
t
PZH
t
PHL
V
OH
V
Waveform 2
S1 Open
(see Note B)
OH
OL
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
0.3 V
V
0 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, t = t = 2 ns, duty cycle = 50%.
r
f
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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any product or service without notice, and advise customers to obtain the latest version of relevant information
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
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safeguards must be provided by the customer to minimize inherent or procedural hazards.
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party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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TI
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