SN74ALS243ANSR [TI]

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SN74ALS243ANSR
型号: SN74ALS243ANSR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
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总线收发器 输出元件
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SN54ALS243A, SN74ALS243A  
QUADRUPLE BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SDAS069B – DECEMBER 1982 – REVISED DECEMBER 1994  
SN54ALS243A . . . J PACKAGE  
SN74ALS243A . . . D OR N PACKAGE  
(TOP VIEW)  
Two-Way Asynchronous Communication  
Between Data Buses  
pnp Inputs Reduce dc Loading  
Package Options Include Plastic  
Small-Outline (D) Packages, Ceramic Chip  
Carriers (FK), and Standard Plastic (N) and  
Ceramic (J) 300-mil DIPs  
OEAB  
NC  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
OEBA  
NC  
B1  
B2  
B3  
A1  
A2  
A3  
A4  
description  
GND  
B4  
8
These quadruple bus transceivers are designed  
for asynchronous two-way communication  
between data buses. The control-function  
implementation allows for maximum flexibility in  
timing. These devices allow data transmission  
from the A bus to the B bus or from the B bus to the  
A bus depending upon the logic levels at the  
output-enable (OEBA and OEAB) inputs. The  
output-enable inputs can be used to disable the  
device so that the buses are effectively isolated.  
SN54ALS243A . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
NC  
NC  
B1  
A1  
NC  
A2  
4
5
6
7
8
17  
16  
15  
14  
The dual-enable configuration gives the  
quadruple bus transceivers the capability to store  
data by simultaneously enabling OEBA and  
OEAB. Each output reinforces its input in this  
transceiver configuration. When both control  
inputs are enabled and all other data sources to  
the two sets of bus lines are at high impedance,  
both sets of bus lines (eight in all) retain their  
states. The 4-bit codes appearing on the two sets  
of buses are identical.  
NC  
B2  
NC  
A3  
9 10 11 12 13  
NC – No internal connection  
The SN54ALS243A is characterized for operation over the full military temperature range of 55°C to 125°C.  
The SN74ALS243A is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
INPUTS  
FUNCTION  
OEBA  
OEAB  
L
H
H
L
H
L
A to B  
B to A  
Isolation  
Latch A and B  
(A = B)  
L
H
Copyright 1994, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ALS243A, SN74ALS243A  
QUADRUPLE BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SDAS069B – DECEMBER 1982 – REVISED DECEMBER 1994  
logic symbol  
logic diagram (positive logic)  
13  
1
13  
11  
OEBA  
OEAB  
EN1  
EN2  
OEAB  
OEBA  
B1  
1
3
A1  
3
11  
10  
1
A1  
B1  
B2  
2
4
5
A2  
A3  
4
10  
A2  
B2  
9
8
B3  
B4  
6
5
9
8
A4  
A3  
B3  
B4  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
6
A4  
Pin numbers shown are for the D, J, and N packages.  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
CC  
Input voltage, V : All inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
I
I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V  
Operating free-air temperature range, T : SN54ALS243A . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 125°C  
A
SN74ALS243A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C  
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
recommended operating conditions  
SN54ALS243A  
MIN NOM MAX  
SN74ALS243A  
MIN NOM MAX  
UNIT  
V
V
V
Supply voltage  
4.5  
2
5
5.5  
4.5  
2
5
5.5  
V
V
CC  
High-level input voltage  
Low-level input voltage  
High-level output current  
Low-level output current  
Operating free-air temperature  
IH  
0.7  
12  
12  
0.8  
15  
24  
V
IL  
I
I
mA  
mA  
°C  
OH  
OL  
T
A
55  
125  
0
70  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ALS243A, SN74ALS243A  
QUADRUPLE BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SDAS069B – DECEMBER 1982 – REVISED DECEMBER 1994  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
SN54ALS243A  
SN74ALS243A  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN TYP  
MAX  
MIN TYP  
MAX  
V
V
V
V
= 4.5 V,  
I = 18 mA  
1.2  
1.2  
V
IK  
CC  
I
= 4.5 V to 5.5 V,  
I
I
I
I
I
I
= 0.4 mA  
= 3 mA  
= 12 mA  
= 15 mA  
= 12 mA  
V
–2  
V
–2  
CC  
OH  
OH  
OH  
OH  
OL  
OL  
CC  
2.4  
CC  
2.4  
3.2  
3.2  
V
OH  
V
CC  
= 4.5 V  
2
2
0.25  
0.4  
0.25  
0.35  
0.4  
0.5  
V
OL  
V
CC  
V
CC  
V
CC  
= 4.5 V  
= 5.5 V  
= 5.5 V,  
V
= 24 mA  
Control inputs  
A or B ports  
V = 7 V  
I
0.1  
0.1  
0.1  
I
I
mA  
µA  
I
V = 5.5 V  
I
0.1  
Control inputs  
20  
20  
V = 2.7 V  
I
IH  
A or B ports  
20  
20  
Control inputs  
0.1  
0.1  
112  
30  
0.1  
0.1  
112  
25  
I
I
V
V
= 5.5 V,  
= 5.5 V,  
V = 0.4 V  
mA  
mA  
IL  
CC  
I
A or B ports  
§
V
O
= 2.25 V  
20  
30  
O
CC  
Outputs high  
Outputs low  
15  
20  
21  
15  
20  
21  
I
V
CC  
= 5.5 V  
35  
30  
mA  
CC  
Outputs disabled  
37  
32  
§
All typical values are at V  
For I/O ports, the parameters I and I include the off-state output current.  
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I  
= 5 V, T = 25°C.  
A
IH IL  
CC  
.
OS  
switching characteristics (see Figure 1)  
V
C
= 4.5 V to 5.5 V,  
= 50 pF,  
CC  
L
R1 = 500 ,  
R2 = 500 ,  
T
A
FROM  
TO  
(OUTPUT)  
PARAMETER  
(INPUT)  
UNIT  
= MIN to MAX  
SN54ALS243A SN74ALS243A  
MIN  
4
MAX  
15  
15  
25  
25  
16  
27  
25  
25  
16  
27  
MIN  
4
MAX  
11  
t
t
t
t
t
t
t
t
t
t
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
PZH  
PZL  
PHZ  
PLZ  
A or B  
ns  
ns  
ns  
ns  
ns  
B or A  
4
4
11  
7
7
20  
20  
14  
22  
20  
20  
14  
22  
OEAB  
OEAB  
OEBA  
OEBA  
B
B
A
A
7
7
2
2
3
3
7
7
7
7
2
2
3
3
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ALS243A, SN74ALS243A  
QUADRUPLE BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SDAS069B – DECEMBER 1982 – REVISED DECEMBER 1994  
PARAMETER MEASUREMENT INFORMATION  
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES  
7 V  
R
= R1 = R2  
V
CC  
L
S1  
R1  
R
L
Test  
Point  
From Output  
Under Test  
From Output  
Under Test  
Test  
Point  
Test  
Point  
From Output  
Under Test  
C
C
L
R
L
R2  
L
C
L
(see Note A)  
(see Note A)  
(see Note A)  
LOAD CIRCUIT FOR  
BI-STATE  
TOTEM-POLE OUTPUTS  
LOAD CIRCUIT  
FOR OPEN-COLLECTOR OUTPUTS  
LOAD CIRCUIT  
FOR 3-STATE OUTPUTS  
3.5 V  
3.5 V  
Timing  
Input  
High-Level  
1.3 V  
1.3 V  
1.3 V  
Pulse  
0.3 V  
0.3 V  
t
h
t
w
t
su  
3.5 V  
3.5 V  
0.3 V  
Data  
Input  
Low-Level  
1.3 V  
1.3 V  
1.3 V  
1.3 V  
Pulse  
0.3 V  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
VOLTAGE WAVEFORMS  
PULSE DURATIONS  
3.5 V  
0.3 V  
Output  
Control  
(low-level  
enabling)  
1.3 V  
1.3 V  
3.5 V  
t
PZL  
Input  
1.3 V  
1.3 V  
t
PLZ  
0.3 V  
PHL  
3.5 V  
t
Waveform 1  
S1 Closed  
(see Note B)  
t
PLH  
1.3 V  
V
OH  
In-Phase  
Output  
1.3 V  
1.3 V  
1.3 V  
V
OL  
0.3 V  
V
OL  
t
PHZ  
t
PLH  
t
PZH  
t
PHL  
V
OH  
V
Waveform 2  
S1 Open  
(see Note B)  
OH  
OL  
Out-of-Phase  
Output  
(see Note C)  
1.3 V  
1.3 V  
0.3 V  
V
0 V  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS  
NOTES: A.  
C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.  
D. All input pulses have the following characteristics: PRR 1 MHz, t = t = 2 ns, duty cycle = 50%.  
r
f
E. The outputs are measured one at a time with one transition per measurement.  
Figure 1. Load Circuits and Voltage Waveforms  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
BE FULLY AT THE CUSTOMER’S RISK.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 1998, Texas Instruments Incorporated  

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