SN74ALS245A-1DWRE4 [TI]
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS; 八路总线收发器与3态输出
| 型号： | SN74ALS245A-1DWRE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| 文件： | 总16页 (文件大小：527K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54ALS245A, SN54AS245, SN74ALS245A, SN74AS245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS272A – NOVEMBER 1994 – REVISED JANUARY 2003
4.5-V to 5.5-V V
Operation
3-State Outputs Drive Bus Lines Directly
pnp Inputs Reduce dc Loading
CC
Max t of 5.5 ns at 5 V
pd
SN54ALS245A, SN54AS245 . . . FK PACKAGE
(TOP VIEW)
SN54ALS245A . . . J OR W PACKAGE
SN54AS245 . . . J PACKAGE
SN74ALS245A . . . DB, DW, N, OR NS PACKAGE
SN74AS245 . . . DW, N, OR NS PACKAGE
(TOP VIEW)
3
2
1
20 19
18
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DIR
A1
V
CC
B1
B2
B3
B4
B5
A3
A4
A5
A6
A7
4
5
6
7
8
OE
B1
B2
B3
B4
B5
B6
B7
B8
17
16
15
14
A2
A3
A4
9 10 11 12 13
A5
A6
A7
A8
GND
description/ordering information
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
SN74ALS245A-1N
SN74ALS245AN
SN74AS245N
SN74ALS245A-1N
SN74ALS245AN
SN74AS245N
PDIP – N
Tube
Tube
SN74ALS245ADW
SN74ALS245ADWR
SN74ALS245A-1DW
SN74ALS245A-1DWR
SN74AS245DW
ALS245A
ALS245A-1
AS245
Tape and reel
Tube
SOIC – DW
SOP – NS
0°C to 70°C
Tape and reel
Tube
Tape and reel
Tape and reel
Tape and reel
Tape and reel
Tape and reel
SN74AS245DWR
SN74ALS245ANSR
SN74ALS245A-1NSR
SN74AS245NSR
SN74ALS245ADBR
SNJ54ALS245AJ
SNJ54AS245J
ALS245A
ALS245A-1
74AS245
SSOP – DB
CDIP – J
G245A
SNJ54ALS245AJ
SNJ54AS245J
SNJ54ALS245AW
SNJ54ALS245AFK
SNJ54AS245FK
Tube
Tube
Tube
–55°C to 125°C
CFP – W
SNJ54ALS245AW
SNJ54ALS245AFK
SNJ54AS245FK
LCCC – FK
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS245A, SN54AS245, SN74ALS245A, SN74AS245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS272A – NOVEMBER 1994 – REVISED JANUARY 2003
description/ordering information(continued)
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The
control-function implementation minimizes external timing requirements.
The devices allow data transmission from the Abus to the B bus or from the B bus to the A bus, depending upon
the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the
device so that the buses are effectively isolated.
The -1 version of the SN74ALS245A is identical to the standard version, except that the recommended
maximum I is increased to 48 mA. There is no -1 version of the SN54ALS245A.
OL
FUNCTION TABLE
INPUTS
OPERATION
OE
L
DIR
L
B data to A bus
A data to B bus
Isolation
L
H
H
X
logic diagram, each gate (positive logic)
1
DIR
19
18
OE
B1
2
A1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (SN54ALS245A,
†
SN74ALS245A) (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V : All inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Package thermal impedance, θ (see Note 1): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
JA
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS245A, SN54AS245, SN74ALS245A, SN74AS245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS272A – NOVEMBER 1994 – REVISED JANUARY 2003
recommended operating conditions (see Note 2)
SN54ALS245A
MIN NOM MAX
SN74ALS245A
MIN NOM MAX
UNIT
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
IH
0.7
–12
12
0.8
–15
24
V
IL
I
mA
OH
I
Low-level output current
mA
OL
†
48
70
T
A
Operating free-air temperature
–55
125
0
°C
†
Applies only to the -1 version and only if V
is between 4.75 V and 5.25 V
NOTE 2: All unused inputs of the device must be held at V or GND to ensure proper device operation. Refer to the TI application report,
CC
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54ALS245A
SN74ALS245A
PARAMETER
TEST CONDITIONS
UNIT
‡
‡
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
= 4.5 V,
I = –18 mA
–1.5
–1.5
V
IK
CC
I
= 4.5 V to 5.5 V,
I
I
I
I
I
I
I
= –0.4 mA
= –3 mA
V
–2
V
–2
CC
OH
OH
OH
OH
CC
2.4
CC
2.4
3.2
3.2
V
V
OH
V
V
= 4.5 V
= 4.5 V
= –12 mA
= –15 mA
2
CC
2
= 12 mA
= 24 mA
= 48 mA
0.25
0.4
0.25
0.35
0.35
0.4
0.5
0.5
0.1
0.1
20
OL
OL
OL
V
OL
CC
†
Control inputs
A or B ports
V = 7 V
I
0.1
0.1
I
I
V
V
= 5.5 V
= 5.5 V,
mA
I
CC
V = 5.5 V
I
Control inputs
20
V = 2.7 V
I
µA
IH
IL
CC
§
A or B ports
20
20
Control inputs
–0.1
–0.1
–112
48
–0.1
–0.1
–112
45
I
I
V
V
= 5.5 V,
= 5.5 V,
V = 0.4 V
I
mA
mA
CC
§
A or B ports
¶
V
O
= 2.25 V
–20
–30
O
CC
Outputs high
Outputs low
30
36
38
30
36
38
I
V
CC
= 5.5 V
60
55
mA
CC
Outputs disabled
63
58
†
Applies only to the -1 version and only if V
CC
is between 4.75 V and 5.25 V
‡
§
¶
All typical values are V
= 5 V, T = 25°C.
CC
A
For I/O ports, the parameters I and I include the off-state output current.
IH
IL
The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, I
.
OS
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS245A, SN54AS245, SN74ALS245A, SN74AS245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS272A – NOVEMBER 1994 – REVISED JANUARY 2003
switching characteristics (see Figure 1)
V
C
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
R1 = 500 Ω,
R2 = 500 Ω,
T
A
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
†
= MIN to MAX
SN54ALS245A SN74ALS245A
MIN
1
MAX
19
MIN
3
MAX
10
t
t
t
t
t
t
PLH
PHL
PZH
PZL
PHZ
PLZ
A or B
OE
B or A
A or B
A or B
ns
ns
ns
1
14
3
10
2
30
5
20
2
29
5
20
2
14
2
10
OE
2
30
4
15
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
absolute maximum ratings over operating free-air temperature range (SN54AS245, SN74AS245)
‡
(unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V : All inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Package thermal impedance, θ (see Note 1): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
JA
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 2)
SN54AS245
MIN NOM
SN74AS245
MIN NOM
UNIT
MAX
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Operating free-air temperature
IH
0.8
–12
48
0.8
–15
64
V
IL
I
I
mA
mA
°C
OH
OL
T
A
–55
125
0
70
NOTE 2: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS245A, SN54AS245, SN74ALS245A, SN74AS245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS272A – NOVEMBER 1994 – REVISED JANUARY 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54AS245
SN74AS245
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
= 4.5 V,
I = –18 mA
–1.2
–1.2
V
IK
CC
I
= 4.5 V to 5.5 V,
I
I
I
I
I
I
= –2 mA
= –3 mA
= –12 mA
= –15 mA
= 48 mA
= 64 mA
V
–2
V
–2
CC
OH
OH
OH
OH
OL
OL
CC
2.4
CC
2.4
3.2
0.3
3.2
V
OH
V
CC
= 4.5 V
2
2
0.55
V
OL
V
CC
V
CC
V
CC
= 4.5 V
= 5.5 V
= 5.5 V,
V
0.35
0.55
0.1
Control inputs
A or B ports
V = 7 V
I
0.1
0.1
I
I
mA
µA
V = 5.5 V
I
0.1
Control inputs
50
20
I
V = 2.7 V
I
IH
IL
‡
A or B ports
70
70
Control inputs
–0.5
–0.75
–150
97
–0.5
–0.75
–150
97
I
I
V
V
= 5.5 V,
= 5.5 V,
V = 0.4 V
I
mA
mA
CC
‡
A or B ports
§
V
O
= 2.25 V
–50
–50
O
CC
Outputs high
Outputs low
62
95
79
62
95
79
I
V
CC
= 5.5 V
143
123
143
123
mA
CC
Outputs disabled
†
‡
§
All typical values are V
CC
= 5 V, T = 25°C.
A
For I/O ports, the parameters I and I include the off-state output current.
IH IL
The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, I
.
OS
switching characteristics (see Figure 1)
V
C
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
R1 = 500 Ω,
R2 = 500 Ω,
T
A
FROM
TO
(OUTPUT)
PARAMETER
(INPUT)
UNIT
¶
= MIN to MAX
SN54AS245
SN74AS245
MIN
2
MAX
9.5
9
MIN
2
MAX
7.5
7
t
t
t
t
t
t
PLH
PHL
PZH
PZL
PHZ
PLZ
A or B
B or A
A or B
A or B
ns
ns
ns
2
2
2
11
2
9
OE
OE
2
10.5
7.5
12
2
8.5
5.5
9.5
2
2
2
2
¶
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS245A, SN54AS245, SN74ALS245A, SN74AS245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS272A – NOVEMBER 1994 – REVISED JANUARY 2003
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7 V
R
= R1 = R2
V
CC
L
S1
R1
R
L
Test
Point
From Output
Under Test
From Output
Under Test
Test
Point
Test
Point
From Output
Under Test
C
C
L
R
L
R2
L
C
L
(see Note A)
(see Note A)
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
3.5 V
Timing
Input
High-Level
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
0.3 V
t
t
w
h
t
su
3.5 V
3.5 V
0.3 V
Data
Input
Low-Level
1.3 V
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
0.3 V
3.5 V
t
PZL
Input
1.3 V
1.3 V
t
PLZ
0.3 V
PHL
≈3.5 V
t
Waveform 1
S1 Closed
(see Note B)
t
PLH
1.3 V
V
OH
In-Phase
Output
1.3 V
1.3 V
1.3 V
V
OL
V
OL
0.3 V
t
PHZ
t
PLH
t
PZH
t
PHL
V
OH
0.3 V
≈0 V
V
Waveform 2
S1 Open
(see Note B)
OH
OL
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, t = t = 2 ns, duty cycle = 50%.
r
f
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
CFP
Drawing
84030012A
8403001RA
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
FK
J
20
20
20
20
20
20
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB
A42
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
8403001SA
W
J
SN54ALS245AJ
SN54AS245J
CDIP
CDIP
SOIC
A42 SNPB
A42 SNPB
J
SN74ALS245A-1DW
DW
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ALS245A-1DWE4
SN74ALS245A-1DWR
SN74ALS245A-1DWRE4
SN74ALS245A-1N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
PDIP
SO
DW
DW
DW
N
20
20
20
20
20
20
20
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74ALS245A-1NE4
SN74ALS245A-1NSR
SN74ALS245A-1NSRE4
N
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
NS
NS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ALS245ADBLE
SN74ALS245ADBR
OBSOLETE
ACTIVE
SSOP
SSOP
DB
DB
20
20
TBD
Call TI
Call TI
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ALS245ADBRE4
SN74ALS245ADW
SN74ALS245ADWR
SN74ALS245ADWRE4
SN74ALS245AN
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SOIC
SOIC
SOIC
PDIP
DB
DW
DW
DW
N
20
20
20
20
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
20
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74ALS245AN3
SN74ALS245ANE4
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
20
20
TBD
Call TI
Call TI
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74ALS245ANSR
SN74ALS245ANSRE4
SN74ALS245ANSRG4
SN74AS245DW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
SO
NS
NS
20
20
20
20
20
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
NS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
DW
DW
DW
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AS245DWE4
SN74AS245DWR
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
no Sb/Br)
SN74AS245DWRE4
SN74AS245N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
PDIP
PDIP
SO
DW
N
20
20
20
20
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74AS245NE4
SN74AS245NSR
SN74AS245NSRE4
N
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
NS
NS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SNJ54ALS245AFK
SNJ54ALS245AJ
SNJ54ALS245AW
SNJ54AS245FK
SNJ54AS245J
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CFP
FK
J
20
20
20
20
20
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB
A42
N / A for Pkg Type
N / A for Pkg Type
W
FK
J
LCCC
CDIP
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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