SN74ALS533ANSR [TI]
OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS; 八路D型透明锁存器带3态输出
| 型号： | SN74ALS533ANSR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS |
| 文件： | 总12页 (文件大小：339K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74ALS533A, SN74AS533A
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SDAS270 – DECEMBER 1994
DW OR N PACKAGE
(TOP VIEW)
• Eight Latches in a Single Package
• 3-State Bus-Driving Inverting Outputs
• Full Parallel Access for Loading
• Buffered Control Inputs
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
1D
• pnp Inputs Reduce dc Loading on
2D
Data Lines
2Q
• Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic (N) 300-mil DIPs
3Q
3D
4D
4Q
description
GND
These 8-bit D-type transparent latches feature
3-state outputs designed specifically for driving
highly capacitive or relatively low-impedance
loads. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
While latch-enable (LE) input is high, the Q outputs follow the complements of the data (D) inputs. When LE is
taken low, the Q outputs are latched at the inverses of the levels set up at the D inputs. The SN74ALS533A and
SN74AS533A are functionally equivalent to the SN74ALS373A and SN74AS373, except for having inverted
outputs.
A buffered output-enable (OE) input places the eight outputs in either a normal logic state (high or low logic
levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide the capability to drive bus lines without
interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are off.
The SN74ALS533A and SN74AS533A are characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
Q
OE
L
LE
H
H
L
D
H
L
L
L
H
L
X
X
Q
0
H
X
Z
Copyright 1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALS533A, SN74AS533A
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SDAS270 – DECEMBER 1994
†
logic symbol
logic diagram (positive logic)
1
OE
1
EN
C1
OE
LE
11
11
LE
2
5
C1
1Q
2Q
3
2
5
3
1D
2D
3D
4D
5D
6D
7D
8D
1D
1
1Q
2Q
1D
1D
4
7
6
3Q
4Q
5Q
6Q
C1
1D
8
9
4
7
2D
3D
13
14
17
18
12
15
16
19
6
9
C1
1D
3Q
4Q
5Q
6Q
7Q
8Q
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
C1
1D
8
4D
5D
6D
12
15
16
C1
1D
13
14
C1
1D
C1
1D
7Q
17
18
7D
8D
19
C1
1D
8Q
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, T : SN74ALS533A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALS533A, SN74AS533A
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SDAS270 – DECEMBER 1994
recommended operating conditions
SN74ALS533A
UNIT
MIN NOM
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Pulse duration, LE high
Setup time, data before LE↓
Hold time, data after LE↓
Operating free-air temperature
IH
0.8
–2.6
24
V
IL
I
I
t
t
t
mA
mA
ns
ns
ns
°C
OH
OL
w
15
15
7
su
h
T
A
0
70
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN74ALS533A
PARAMETER
TEST CONDITIONS
UNIT
V
†
MIN TYP
MAX
V
V
V
V
V
= 4.5 V,
I = –18 mA
I
–1.5
IK
CC
CC
CC
= 4.5 V to 5.5 V,
= 4.5 V,
I
I
I
I
= –0.4 mA
= –2.6 mA
= 12 mA
= 24 mA
= 2.7 V
V
–2
OH
OH
OL
OL
CC
2.4
V
OH
3.2
0.25
0.35
0.4
0.5
20
V
OL
V
CC
= 4.5 V
V
I
I
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
V
µA
µA
OZH
OZL
I
O
O
V
= 0.4 V
–20
0.1
20
V = 7 V
mA
µA
I
V = 2.7 V
IH
I
V = 0.4 V
–0.1
–112
17
mA
mA
IL
I
‡
V
= 2.25 V
–30
O
O
Outputs high
Outputs low
10
17
I
V
CC
= 5.5 V
26
mA
CC
Outputs disabled
18.5
28
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
.
OS
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALS533A, SN74AS533A
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SDAS270 – DECEMBER 1994
switching characteristics (see Figure 1)
V
C
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
R1 = 500 Ω,
R2 = 500 Ω,
T
A
FROM
TO
(OUTPUT)
PARAMETER
(INPUT)
UNIT
†
= MIN to MAX
SN74ALS533A
MIN
4
MAX
19
t
t
t
t
t
t
t
t
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
D
ns
ns
ns
ns
Q
4
13
5
23
LE
Any Q
Any Q
Any Q
4
18
1
17
OE
OE
4
18
2
10
2
16
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, T : SN74AS533A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN74AS533A
MIN NOM MAX
UNIT
V
V
V
Supply voltage
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Pulse duration, LE high
Setup time, data before LE↓
Hold time, data after LE↓
Operating free-air temperature
IH
0.8
–15
48
V
IL
I
I
t
t
t
mA
mA
ns
ns
ns
°C
OH
OL
w
2
2
3
0
su
h
T
A
70
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALS533A, SN74AS533A
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SDAS270 – DECEMBER 1994
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN74AS533A
PARAMETER
TEST CONDITIONS
UNIT
V
†
MIN TYP
MAX
V
V
V
V
V
V
V
V
V
V
V
V
V
= 4.5 V,
I = –18 mA
I
–1.5
IK
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 4.5 V to 5.5 V,
= 4.5 V,
I
I
I
= –2 mA
= –15 mA
= 48 mA
= 2.7 V
V
–2
OH
OH
OL
CC
2.4
V
OH
3.3
= 4.5 V,
0.34
0.5
50
V
OL
OZH
OZL
I
I
I
I
I
I
I
= 5.5 V,
V
V
µA
µA
mA
µA
mA
mA
O
O
= 5.5 V,
= 0.4 V
–50
0.1
= 5.5 V,
V = 7 V
I
= 5.5 V,
V = 2.7 V
I
20
IH
= 5.5 V,
V = 0.4 V
I
–0.02
–0.5
–112
100
100
110
IL
‡
= 5.5 V,
V
O
= 2.25 V
–30
O
Outputs high
Outputs low
62
64
71
I
V
CC
= 5.5 V
mA
CC
Outputs disabled
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
.
OS
switching characteristics (see Figure 1)
V
C
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
R1 = 500 Ω,
R2 = 500 Ω,
T
A
FROM
TO
(OUTPUT)
PARAMETER
(INPUT)
UNIT
§
= MIN to MAX
SN74AS533A
MIN
4
MAX
7.5
7
t
t
t
t
t
t
t
t
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
D
ns
ns
ns
ns
Q
4
5
9
LE
Any Q
Any Q
Any Q
4
8
2
6.5
9.5
6.5
7
OE
OE
4
2
3
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74ALS533A, SN74AS533A
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SDAS270 – DECEMBER 1994
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7 V
R
= R1 = R2
V
CC
L
S1
R1
R
L
Test
Point
From Output
Under Test
From Output
Under Test
Test
Point
Test
Point
From Output
Under Test
C
C
L
R
L
R2
L
C
L
(see Note A)
(see Note A)
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
3.5 V
Timing
Input
High-Level
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
0.3 V
t
h
t
w
t
su
3.5 V
3.5 V
0.3 V
Data
Input
Low-Level
1.3 V
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
0.3 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
3.5 V
t
PZL
Input
1.3 V
1.3 V
t
PLZ
0.3 V
PHL
3.5 V
t
Waveform 1
S1 Closed
(see Note B)
t
PLH
1.3 V
V
OH
In-Phase
Output
1.3 V
1.3 V
1.3 V
V
OL
0.3 V
V
OL
t
PHZ
t
PLH
t
PZH
t
PHL
V
OH
V
Waveform 2
S1 Open
(see Note B)
OH
OL
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
0.3 V
V
0 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, t = t = 2 ns, duty cycle = 50%.
r
f
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
5-Sep-2005
PACKAGING INFORMATION
Orderable Device
SN74ALS533ADW
SN74ALS533ADWE4
SN74ALS533ADWR
SN74ALS533ADWRE4
SN74ALS533AN
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
DW
20
20
20
20
20
20
20
20
20
20
20
20
20
20
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
PDIP
PDIP
SO
DW
DW
DW
N
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
20
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN74ALS533ANE4
SN74ALS533ANSR
SN74ALS533ANSRE4
SN74AS533ADW
N
20
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
NS
NS
DW
DW
DW
DW
N
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AS533ADWE4
SN74AS533ADWR
SN74AS533ADWRE4
SN74AS533AN
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
20
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN74AS533ANE4
N
20
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
5-Sep-2005
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
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