SN74AS109ANSR [TI]
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET; 双JK正沿触发触发器具有清零和预设
| 型号： | SN74AS109ANSR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET |
| 文件： | 总9页 (文件大小：137K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54ALS109A, SN54AS109A, SN74ALS109A, SN74AS109A
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS198B – APRIL 1982 – REVISED AUGUST 1995
SN54ALS109A, SN54AS109A . . . J PACKAGE
SN74ALS109A, SN74AS109A . . . D OR N PACKAGE
• Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
(TOP VIEW)
1CLR
1J
V
CC
2CLR
2J
1
2
3
4
5
6
7
8
16
15
14
13
12
TYPICAL MAXIMUM TYPICAL POWER
1K
CLOCK
FREQUENCY
(MHz)
DISSIPATION
PER FLIP-FLOP
(mW)
TYPE
1CLK
1PRE
1Q
2K
2CLK
′ALS109A
′AS109A
50
6
11 2PRE
129
29
10
9
1Q
2Q
2Q
GND
description
These devices contain two independent J-K
positive-edge-triggered flip-flops. A low level at
the preset (PRE) or clear (CLR) inputs sets or
resets the outputs regardless of the levels of the
other inputs. When PRE and CLR are inactive
(high), data at the J and K inputs meeting the
setup-time requirements are transferred to the
outputs on the positive-going edge of the clock
(CLK) pulse. Clock triggering occurs at a voltage
level and is not directly related to the rise time of
the clock pulse. Following the hold-time interval,
data at the J and K inputs can be changed without
affecting the levels at the outputs. These versatile
flip-flops can perform as toggle flip-flops by
grounding K and tying J high. They also can
perform as D-type flip-flops if J and K are tied
together.
SN54ALS109A, SN54AS109A . . . FK PACKAGE
(TOP VIEW)
3
2
1 20 19
18
1K
1CLK
NC
4
5
6
7
8
2J
17
16
15
14
2K
NC
1PRE
1Q
2CLK
2PRE
9 10 11 12 13
NC – No internal connection
The SN54ALS109A and SN54AS109A are characterized for operation over the full military temperature range
of –55°C to 125°C. The SN74ALS109A and SN74AS109A are characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
OUTPUTS
PRE
L
CLR
H
CLK
X
J
X
X
X
L
K
X
X
X
L
Q
H
L
Q
L
H
L
X
H
†
H
†
H
L
L
X
H
H
↑
L
H
H
H
↑
H
L
L
Toggle
H
H
↑
H
H
X
Q0
H
Q0
L
H
H
↑
H
X
H
H
L
Q0
Q0
†
The output levels in this configuration are not specified to
meet the minimum levels for V if the lows at PRE and
OH
maximum. Furthermore, this
CLR are near
V
IL
configuration is nonstable; that is, it does not persist when
either PRE or CLR returns to its inactive (high) level.
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS109A, SN54AS109A, SN74ALS109A, SN74AS109A
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS198B – APRIL 1982 – REVISED AUGUST 1995
†
logic symbol
5
S
1PRE
1J
6
7
2
4
3
1
1Q
1Q
1J
1CLK
C1
1K
R
1K
1CLR
11
14
12
13
15
2PRE
2J
10
9
2Q
2Q
2CLK
2K
2CLR
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Operating free-air temperature range, T : SN54ALS109A . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
SN74ALS109A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS109A
MIN NOM MAX
SN74ALS109A
MIN NOM MAX
UNIT
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Clock frequency
IH
0.7
–0.4
4
0.8
–0.4
8
V
IL
I
I
f
mA
mA
MHz
OH
OL
clock
0
15
30
0
15
34
PRE or CLR low
CLK high
t
w
Pulse duration
16.5
16.5
15
14.5
14.5
15
ns
CLK low
Data
t
t
ns
Setup time before CLK↑
su
PRE or CLR inactive
Data
10
10
Hold time after CLK↑
0
0
ns
h
T
A
Operating free-air temperature
–55
125
0
70
°C
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS109A, SN54AS109A, SN74ALS109A, SN74AS109A
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS198B – APRIL 1982 – REVISED AUGUST 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54ALS109A
SN74ALS109A
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
= 4.5 V,
I = –18 mA
–1.5
–1.5
V
V
IK
CC
I
= 4.5 V to 5.5 V,
I
I
I
= –0.4 mA
= 4 mA
V
CC
–2
V
CC
–2
OH
CC
OH
OL
OL
0.25
0.4
0.25
0.35
0.4
0.5
V
OL
V
CC
V
CC
V
CC
V
CC
= 4.5 V
= 5.5 V,
= 5.5 V,
= 5.5 V,
V
= 8 mA
CLK, J, or K
PRE or CLR
CLK, J, or K
PRE or CLR
CLK, J, or K
PRE or CLR
0.1
0.2
0.1
I
I
I
V = 7 V
I
mA
µA
mA
I
0.2
20
20
V = 2.7 V
I
IH
IL
40
40
–0.2
–0.4
–112
4
–0.2
–0.4
–112
4
V = 0.4 V
I
‡
I
I
V
V
= 5.5 V,
= 5.5 V,
V = 2.25 V
O
–20
–30
mA
mA
O
CC
See Note 1
2.4
2.4
CC
CC
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
.
OS
NOTE 1:
I
is measured with J, K, CLK, and PRE grounded, then with J, K, CLK, and CLR grounded.
CC
switching characteristics (see Figure 1)
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
= 500 Ω,
FROM
TO
(OUTPUT)
§
PARAMETER
(INPUT)
UNIT
T
A
= MIN to MAX
SN54ALS109A SN74ALS109A
MIN
30
3
MAX
MIN
34
3
MAX
f
t
t
t
t
MHz
ns
max
PLH
PHL
PLH
PHL
17
17
21
20
13
15
16
18
PRE or CLR
CLK
Q or Q
Q or Q
5
5
5
5
ns
5
5
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS109A, SN54AS109A, SN74ALS109A, SN74AS109A
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS198B – APRIL 1982 – REVISED AUGUST 1995
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Operating free-air temperature range, T : SN54AS109A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
SN74AS109A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54AS109A
MIN NOM MAX
SN74AS109A
MIN NOM MAX
UNIT
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Clock frequency
IH
0.8
–2
20
90
0.8
–2
V
IL
I
I
f
mA
mA
MHz
OH
OL
clock
20
*
0
4
0
4
105
PRE or CLR low
CLK high
t *
w
Pulse duration
4
4
ns
CLK low
5.5
5.5
2
5.5
5.5
2
Data
t *
su
ns
Setup time before CLK↑
PRE or CLR inactive
Data
t *
h
Hold time after CLK↑
0
0
ns
T
A
Operating free-air temperature
–55
125
0
70
°C
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54AS109A
SN74AS109A
PARAMETER
TEST CONDITIONS
UNIT
‡
‡
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
CC
V
CC
V
CC
V
CC
= 4.5 V,
I = –18 mA
–1.2
–1.2
V
V
IK
I
= 4.5 V to 5.5 V,
= 4.5 V,
I
= –2 mA
= 20 mA
V
CC
–2
V
CC
–2
OH
OL
OH
OL
I
0.25
0.5
0.1
0.25
0.5
0.1
V
I
I
= 5.5 V,
V = 7 V
I
mA
CLK, J, or K
PRE or CLR
CLK, J, or K
PRE or CLR
20
20
I
V
= 5.5 V,
= 5.5 V,
V = 2.7 V
µA
IH
IL
CC
CC
I
40
40
–0.5
–1.8
–112
17
–0.5
–1.8
–112
17
I
V
V = 0.4 V
I
mA
§
I
I
V
V
= 5.5 V,
= 5.5 V,
V = 2.25 V
O
–30
–30
mA
mA
O
CC
See Note 1
11.5
11.5
CC
CC
‡
§
All typical values are at V
= 5 V, T = 25°C.
A
CC
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
.
OS
NOTE 1:
I
is measured with J, K, CLK, and PRE grounded, then with J, K, CLK, and CLR grounded.
CC
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS109A, SN54AS109A, SN74ALS109A, SN74AS109A
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS198B – APRIL 1982 – REVISED AUGUST 1995
switching characteristics (see Figure 1)
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
= 500 Ω,
FROM
TO
(OUTPUT)
†
PARAMETER
(INPUT)
UNIT
T
A
= MIN to MAX
SN54AS109A SN74AS109A
MIN
90
MAX
MIN
105
2
MAX
f
t
t
t
t
*
MHz
ns
max
2
9
11.5
10
8
10.5
9
PLH
PHL
PLH
PHL
PRE or CLR
CLK
Q or Q
Q or Q
3.5
2.5
3.5
3.5
2.5
3.5
ns
10.5
9
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS109A, SN54AS109A, SN74ALS109A, SN74AS109A
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS198B – APRIL 1982 – REVISED AUGUST 1995
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7 V
R
= R1 = R2
V
CC
L
S1
R1
R
L
Test
Point
From Output
Under Test
From Output
Under Test
Test
Point
Test
Point
From Output
Under Test
C
C
L
R
L
R2
L
C
L
(see Note A)
(see Note A)
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
3.5 V
Timing
Input
High-Level
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
0.3 V
t
h
t
w
t
su
3.5 V
3.5 V
0.3 V
Data
Input
Low-Level
1.3 V
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
0.3 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
3.5 V
t
PZL
Input
1.3 V
1.3 V
t
PLZ
0.3 V
PHL
3.5 V
t
Waveform 1
S1 Closed
(see Note B)
t
PLH
1.3 V
V
OH
In-Phase
Output
1.3 V
1.3 V
1.3 V
V
OL
0.3 V
V
OL
t
PHZ
t
PLH
t
PZH
t
PHL
V
OH
V
Waveform 2
S1 Open
(see Note B)
OH
OL
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
0.3 V
V
0 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, t = t = 2 ns, duty cycle = 50%.
r
f
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
28-Feb-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
CFP
Drawing
84000012A
8400001EA
ACTIVE
ACTIVE
OBSOLETE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
FK
J
20
16
16
20
16
16
16
16
1
1
None
None
None
None
None
None
None
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Level-NC-NC-NC
Level-NC-NC-NC
Call TI
8400001FA
W
FK
J
JM38510/37102B2A
JM38510/37102BEA
SN54ALS109AJ
SN54AS109AJ
SN74ALS109AD
LCCC
CDIP
CDIP
CDIP
SOIC
1
1
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
J
1
J
1
D
40
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SN74ALS109ADR
SN74ALS109AN
ACTIVE
ACTIVE
SOIC
PDIP
D
N
16
16
2500
25
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN74ALS109AN3
OBSOLETE
ACTIVE
PDIP
SO
N
16
16
None
Call TI
Call TI
SN74ALS109ANSR
NS
2000
40
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SN74AS109AD
SN74AS109ADR
SN74AS109AN
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
PDIP
SO
D
D
16
16
16
16
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
2500
25
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
N
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN74AS109ANSR
NS
2000
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SNJ54ALS109AFK
SNJ54ALS109AJ
SNJ54AS109AFK
SNJ54AS109AJ
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
LCCC
CDIP
FK
J
20
16
20
16
1
1
1
1
None
None
None
None
Call TI
Call TI
Call TI
Call TI
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
FK
J
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
28-Feb-2005
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
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