SN74AS10DRG4 [TI]
TRIPLE 3-INPUT POSITIVE-NAND GATES; 三路3输入正与非门型号: | SN74AS10DRG4 |
厂家: | TEXAS INSTRUMENTS |
描述: | TRIPLE 3-INPUT POSITIVE-NAND GATES |
文件: | 总16页 (文件大小:665K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ꢀꢁ ꢂꢃ ꢄꢅ ꢀ ꢆꢇ ꢄ ꢈꢉ ꢀꢁꢂ ꢃ ꢄꢀꢆ ꢇ ꢈ ꢉꢀꢁꢊ ꢃ ꢄꢅ ꢀꢆ ꢇ ꢄꢈ ꢉꢀ ꢁꢊ ꢃꢄꢀ ꢆꢇ
ꢋ ꢌꢄꢍꢎ ꢌꢏꢅ ꢐꢉ ꢇꢑꢒ ꢁꢏꢌ ꢓ ꢉꢏꢔ ꢀ ꢒꢓ ꢒꢕꢐ ꢑꢁꢔꢎ ꢉ ꢖ ꢄꢓꢐ ꢀ
ꢗ
SDAS111B − APRIL 1982 − REVISED DECEMBER 1994
SN54ALS02A, SN54AS02 . . . J PACKAGE
SN74ALS02A, SN74AS02 . . . D OR N PACKAGE
(TOP VIEW)
• Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
1Y
1A
1B
2Y
2A
V
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
4Y
4B
4A
3Y
3B
3A
description
These devices contain four independent 2-input
positive-NOR gates. They perform the Boolean
functions Y = A + B or Y = A • B in positive logic.
2B
GND
8
The SN54ALS02A and SN54AS02 are
characterized for operation over the full military
temperature range of −55°C to 125°C. The
SN74ALS02A and SN74AS02 are characterized
for operation from 0°C to 70°C.
SN54ALS02A, SN54AS02 . . . FK PACKAGE
(TOP VIEW)
FUNCTION TABLE
(each gate)
3
2
1
20 19
18
1B
NC
2Y
4B
NC
4A
NC
3Y
4
5
6
7
8
INPUTS
OUTPUT
Y
17
16
15
14
A
B
X
H
L
H
X
L
L
L
NC
2A
9 10 11 12 13
H
NC − No internal connection
†
logic symbol
logic diagram (positive logic)
2
1A
3
2
1A
3
1
4
≥1
1
4
1Y
2Y
3Y
4Y
1Y
2Y
3Y
4Y
1B
5
1B
5
2A
6
2A
6
2B
8
2B
8
3A
9
10
13
3A
9
10
13
3B
11
3B
11
4A
12
4B
4A
12
4B
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
ꢏꢎ ꢔ ꢍꢌ ꢘ ꢓꢒ ꢔꢁ ꢍ ꢄꢓꢄ ꢙꢚ ꢛ ꢜꢝ ꢞꢟ ꢠꢙꢜ ꢚ ꢙꢡ ꢢꢣ ꢝ ꢝ ꢤꢚꢠ ꢟꢡ ꢜꢛ ꢥꢣꢦ ꢧꢙꢢ ꢟꢠ ꢙꢜꢚ ꢨꢟ ꢠꢤ ꢩ
ꢏꢝ ꢜ ꢨꢣꢢ ꢠ ꢡ ꢢ ꢜꢚ ꢛꢜ ꢝ ꢞ ꢠ ꢜ ꢡ ꢥꢤ ꢢ ꢙꢛ ꢙꢢꢟ ꢠꢙ ꢜꢚꢡ ꢥꢤ ꢝ ꢠꢪ ꢤ ꢠꢤ ꢝ ꢞꢡ ꢜꢛ ꢓꢤꢫ ꢟꢡ ꢒꢚꢡ ꢠꢝ ꢣꢞ ꢤꢚꢠ ꢡ
ꢡ ꢠ ꢟ ꢚꢨ ꢟ ꢝꢨ ꢬ ꢟ ꢝꢝ ꢟ ꢚ ꢠꢭꢩ ꢏꢝ ꢜ ꢨꢣꢢ ꢠꢙꢜꢚ ꢥꢝ ꢜꢢ ꢤꢡ ꢡꢙ ꢚꢮ ꢨꢜꢤ ꢡ ꢚꢜꢠ ꢚꢤ ꢢꢤ ꢡꢡ ꢟꢝ ꢙꢧ ꢭ ꢙꢚꢢ ꢧꢣꢨ ꢤ
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ
Copyright 1994, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂ ꢃꢄ ꢅ ꢀꢆ ꢇ ꢄꢈ ꢉ ꢀ ꢁꢂ ꢃꢄ ꢀ ꢆ ꢇ ꢈꢉ ꢀ ꢁꢊ ꢃ ꢄ ꢅꢀ ꢆ ꢇ ꢄꢈꢉ ꢀꢁꢊ ꢃꢄꢀ ꢆꢇ
ꢋꢌ ꢄ ꢍꢎ ꢌ ꢏꢅꢐ ꢉ ꢇ ꢑꢒ ꢁꢏ ꢌꢓ ꢉ ꢏ ꢔ ꢀꢒ ꢓ ꢒꢕ ꢐꢑ ꢁꢔꢎꢉ ꢖ ꢄꢓ ꢐꢀ
ꢗ
SDAS111B − APRIL 1982 − REVISED DECEMBER 1994
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Operating free-air temperature range, T : SN54ALS02A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
A
SN74ALS02A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS02A
MIN NOM MAX
5.5
SN74ALS02A
MIN NOM MAX
UNIT
V
V
Supply voltage
4.5
2
5
4.5
2
5
5.5
V
V
CC
High-level input voltage
IH
‡
§
0.8
0.8
V
IL
Low-level input voltage
V
0.7
I
I
High-level output current
Low-level output current
Operating free-air temperature
−0.4
4
−0.4
8
mA
mA
°C
OH
OL
T
−55
125
0
70
A
‡
§
Applies over temperature range −55°C to 70°C
Applies over temperature range 70°C to 125°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54ALS02A
SN74ALS02A
PARAMETER
TEST CONDITIONS
UNIT
¶
¶
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
= 4.5 V,
I = −18 mA
−1.5
−1.5
V
V
IK
CC
I
= 4.5 V to 5.5 V,
I
I
I
= −0.4 mA
= 4 mA
V
CC
−2
V
CC
−2
OH
CC
OH
OL
OL
0.25
0.4
0.25
0.35
0.4
0.5
V
OL
V
CC
= 4.5 V
V
= 8 mA
I
I
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
V = 7 V
0.1
20
0.1
mA
µA
I
I
V = 2.7 V
I
20
IH
IL
V = 0.4 V
I
−0.1
−112
2.2
−0.1
−112
2.2
mA
mA
mA
mA
#
V
O
= 2.25 V
−20
−30
O
V = 0
I
0.86
2.16
0.86
2.16
CCH
CCL
V = 4.5 V
I
4
4
¶
#
All typical values are at V
CC
= 5 V, T = 25°C.
A
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
.
OS
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢀ ꢆꢇ ꢄ ꢈꢉ ꢀꢁꢂ ꢃ ꢄꢀꢆ ꢇ ꢈ ꢉꢀꢁꢊ ꢃ ꢄꢅ ꢀꢆ ꢇ ꢄꢈ ꢉꢀ ꢁꢊ ꢃꢄꢀ ꢆꢇ
ꢋ ꢌꢄꢍꢎ ꢌꢏꢅ ꢐꢉ ꢇꢑꢒ ꢁꢏꢌ ꢓ ꢉꢏꢔ ꢀ ꢒꢓ ꢒꢕꢐ ꢑꢁꢔꢎ ꢉ ꢖ ꢄꢓꢐ ꢀ
ꢗ
SDAS111B − APRIL 1982 − REVISED DECEMBER 1994
switching characteristics (see Figure 1)
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
= 500 Ω,
FROM
TO
(OUTPUT)
†
PARAMETER
(INPUT)
UNIT
T
A
= MIN to MAX
SN54ALS02A SN74ALS02A
MIN
1
MAX
16
MIN
1
MAX
12
t
t
PLH
A or B
Y
ns
1
11
1
10
PHL
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Operating free-air temperature range, T : SN54AS02 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
A
SN74AS02 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54AS02
SN74AS02
UNIT
MIN NOM
MAX
MIN NOM
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Operating free-air temperature
IH
0.8
−2
0.8
−2
20
70
V
IL
I
I
mA
mA
°C
OH
20
OL
T
A
−55
125
0
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54AS02
SN74AS02
PARAMETER
TEST CONDITIONS
UNIT
§
§
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 4.5 V,
I = −18 mA
−1.2
−1.2
V
IK
I
= 4.5 V to 5.5 V,
= 4.5 V,
I
= −2 mA
= 20 mA
V
−2
V −2
CC
V
OH
OL
OH
OL
CC
I
0.35
0.5
0.1
0.35
0.5
0.1
V
I
I
I
I
I
I
= 5.5 V,
V = 7 V
I
mA
µA
mA
mA
mA
mA
I
= 5.5 V,
V = 2.7 V
I
20
20
IH
= 5.5 V,
V = 0.4 V
I
−0.5
−112
5.9
−0.5
−112
5.9
IL
¶
= 5.5 V,
V
O
= 2.25 V
−30
−30
O
= 5.5 V,
V = 0
I
3.7
3.7
CCH
CCL
= 5.5 V,
V = 4.5 V
I
12.5
20.1
12.5
20.1
§
¶
All typical values are at V
CC
= 5 V, T = 25°C.
A
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
.
OS
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂ ꢃꢄ ꢅ ꢀꢆ ꢇ ꢄꢈ ꢉ ꢀ ꢁꢂ ꢃꢄ ꢀ ꢆ ꢇ ꢈꢉ ꢀ ꢁꢊ ꢃ ꢄ ꢅꢀ ꢆ ꢇ ꢄꢈꢉ ꢀꢁꢊ ꢃꢄꢀ ꢆꢇ
ꢋꢌ ꢄ ꢍꢎ ꢌ ꢏꢅꢐ ꢉ ꢇ ꢑꢒ ꢁꢏ ꢌꢓ ꢉ ꢏ ꢔ ꢀꢒ ꢓ ꢒꢕ ꢐꢑ ꢁꢔꢎꢉ ꢖ ꢄꢓ ꢐꢀ
ꢗ
SDAS111B − APRIL 1982 − REVISED DECEMBER 1994
switching characteristics (see Figure 1)
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
= 500 Ω,
FROM
TO
(OUTPUT)
†
PARAMETER
(INPUT)
UNIT
T
A
= MIN to MAX
SN54AS02
SN74AS02
MIN
1
MAX
MIN
1
MAX
t
t
6
5
4.5
4.5
PLH
A or B
Y
ns
1
1
PHL
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢀ ꢆꢇ ꢄ ꢈꢉ ꢀꢁꢂ ꢃ ꢄꢀꢆ ꢇ ꢈ ꢉꢀꢁꢊ ꢃ ꢄꢅ ꢀꢆ ꢇ ꢄꢈ ꢉꢀ ꢁꢊ ꢃꢄꢀ ꢆꢇ
ꢋ ꢌꢄꢍꢎ ꢌꢏꢅ ꢐꢉ ꢇꢑꢒ ꢁꢏꢌ ꢓ ꢉꢏꢔ ꢀ ꢒꢓ ꢒꢕꢐ ꢑꢁꢔꢎ ꢉ ꢖ ꢄꢓꢐ ꢀ
ꢗ
SDAS111B − APRIL 1982 − REVISED DECEMBER 1994
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7 V
R
= R1 = R2
V
CC
L
S1
R1
R
L
Test
Point
From Output
Under Test
From Output
Under Test
Test
Point
Test
Point
From Output
Under Test
C
C
L
R
L
R2
L
C
L
(see Note A)
(see Note A)
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
3.5 V
Timing
Input
High-Level
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
0.3 V
t
t
w
h
t
su
3.5 V
3.5 V
0.3 V
Data
Input
Low-Level
1.3 V
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
0.3 V
3.5 V
t
PZL
Input
1.3 V
1.3 V
t
PLZ
0.3 V
PHL
[3.5 V
t
Waveform 1
S1 Closed
(see Note B)
t
PLH
1.3 V
V
OH
In-Phase
Output
1.3 V
1.3 V
1.3 V
V
OL
V
OL
0.3 V
t
PHZ
t
PLH
t
PZH
t
PHL
V
OH
V
Waveform 2
S1 Open
(see Note B)
OH
OL
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
0.3 V
V
[0 V
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, t = t = 2 ns, duty cycle = 50%.
r
f
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
PACKAGE OPTION ADDENDUM
www.ti.com
9-Oct-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CFP
Drawing
5962-86844012A
5962-8684401DA
JM38510/37301B2A
JM38510/37301BCA
SN54ALS02AJ
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
FK
W
FK
J
20
14
20
14
14
14
14
1
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 N / A for Pkg Type
POST-PLATE N / A for Pkg Type
LCCC
CDIP
CDIP
CDIP
SOIC
A42 SNPB
A42 SNPB
A42 SNPB
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
J
SN54AS02J
J
SN74ALS02AD
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ALS02ADE4
SN74ALS02ADG4
SN74ALS02ADR
SN74ALS02ADRE4
SN74ALS02ADRG4
SN74ALS02AN
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
D
D
D
D
D
N
14
14
14
14
14
14
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74ALS02AN3
SN74ALS02ANE4
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
14
14
TBD
Call TI
Call TI
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74ALS02ANSR
SN74ALS02ANSRE4
SN74ALS02ANSRG4
SN74AS02D
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
NS
NS
NS
D
14
14
14
14
14
14
14
14
14
14
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AS02DE4
SN74AS02DG4
SN74AS02DR
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AS02DRE4
SN74AS02DRG4
SN74AS02N
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
N
25
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74AS02N3
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
14
14
TBD
Call TI
Call TI
SN74AS02NE4
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74AS02NSR
ACTIVE
SO
NS
14
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
9-Oct-2007
Orderable Device
SN74AS02NSRE4
SN74AS02NSRG4
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SO
NS
14
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
NS
14
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SNJ54ALS02AFK
SNJ54ALS02AJ
SNJ54ALS02AW
SNJ54AS02FK
SNJ54AS02J
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CFP
FK
J
20
14
14
20
14
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB
A42
N / A for Pkg Type
N / A for Pkg Type
W
FK
J
LCCC
CDIP
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
SN74ALS02ADR
SN74ALS02ANSR
SN74AS02DR
SOIC
SO
D
NS
D
14
14
14
14
2500
2000
2500
2000
330.0
330.0
330.0
330.0
16.4
16.4
16.4
16.4
6.5
8.2
6.5
8.2
9.0
10.5
9.0
2.1
2.5
2.1
2.5
8.0
12.0
8.0
16.0
16.0
16.0
16.0
Q1
Q1
Q1
Q1
SOIC
SO
SN74AS02NSR
NS
10.5
12.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74ALS02ADR
SN74ALS02ANSR
SN74AS02DR
SOIC
SO
D
NS
D
14
14
14
14
2500
2000
2500
2000
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
33.0
33.0
33.0
33.0
SOIC
SO
SN74AS02NSR
NS
Pack Materials-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
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