SN74AS640NSR [TI]
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS; 八路总线收发器与3态输出型号: | SN74AS640NSR |
厂家: | TEXAS INSTRUMENTS |
描述: | OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
文件: | 总18页 (文件大小:690K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN54ALS640B, SN54AS640, SN74ALS640B, SN74AS640
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS122A – DECEMBER 1983 – REVISED JANUARY 1995
SN54ALS640B, SN54AS640 . . . J PACKAGE
SN74ALS640B, SN74AS640 . . . DW OR N PACKAGE
(TOP VIEW)
• Bidirectional Bus Transceivers in
High-Density 20-Pin Packages
• Inverting Logic
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic (N)
and Ceramic (J) 300-mil DIPs
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DIR
A1
A2
A3
A4
A5
A6
A7
A8
V
CC
OE
B1
B2
B3
B4
B5
B6
B7
B8
description
These octal bus transceivers are designed for
asynchronous two-way communication between
data buses. These devices transmit data from the
A bus to the B bus or from the B bus to the A bus,
depending upon the level at the direction-control
(DIR) input. The output-enable (OE) input can be
used to disable the device so that the buses are
effectively isolated.
GND
SN54ALS640B, SN54AS640 . . . FK PACKAGE
(TOP VIEW)
The -1 version of the SN74ALS640B is identical to
the standard version, except that the
3
2
1
20 19
18
B1
B2
B3
B4
B5
A3
A4
A5
A6
A7
4
5
6
7
8
recommended maximum I for the -1 version is
OL
17
16
15
14
increased to 48 mA. There is no -1 version of the
SN54ALS640B.
The SN54ALS640B and SN54AS640 are
characterized for operation over the full military
temperature range of –55°C to 125°C. The
9 10 11 12 13
SN74ALS640B
and
SN74AS640
are
characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
OPERATION
OE
L
DIR
L
B data to A bus
A data to B bus
Isolation
L
H
H
X
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS640B, SN54AS640, SN74ALS640B, SN74AS640
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS122A – DECEMBER 1983 – REVISED JANUARY 1995
†
logic symbol
logic diagram (positive logic)
19
19
OE
G3
OE
1
DIR
3 EN1 [BA]
3 EN2 [AB]
1
2
18
DIR
A1
B1
1
2
3
17
16
15
14
13
12
11
A2
4
B2
B3
B4
B5
B6
B7
B8
2
18
A3
5
B1
A1
A4
6
A5
7
A6
8
A7
9
To Seven Other Transceivers
A8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V : All inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, T : SN54ALS640B . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
SN74ALS640B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS640B
MIN NOM MAX
SN74ALS640B
MIN NOM MAX
UNIT
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
IH
0.7
–12
12
0.8
–15
24
V
IL
I
mA
OH
I
Low-level output current
mA
OL
§
48
70
T
A
Operating free-air temperature
–55
125
0
°C
§
Applies only to the -1 version and only if V
CC
is between 4.75 V and 5.25 V
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS640B, SN54AS640, SN74ALS640B, SN74AS640
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS122A – DECEMBER 1983 – REVISED JANUARY 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54ALS640B
SN74ALS640B
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
= 4.5 V,
I = –18 mA
–1.5
–1.5
V
IK
CC
I
= 4.5 V to 5.5 V,
I
I
I
I
I
I
I
= –0.4 mA
= –3 mA
= –12 mA
= –15 mA
= 12 mA
V
–2
V
–2
CC
OH
OH
OH
OH
OL
OL
OL
CC
2.4
CC
2.4
3.2
3.2
V
V
OH
V
V
= 4.5 V
= 4.5 V
2
CC
2
0.25
0.4
0.25
0.35
0.35
0.4
0.5
0.5
0.1
0.1
20
V
OL
= 24 mA
CC
‡
= 48 mA
Control inputs
A or B ports
V = 7 V
I
0.1
0.1
I
I
V
V
= 5.5 V
= 5.5 V,
mA
I
CC
V = 5.5 V
I
Control inputs
20
V = 2.7 V
I
µA
IH
IL
CC
§
A or B ports
Control inputs
20
20
–0.1
–0.1
–112
50
–0.1
–0.1
–112
45
I
I
V
V
= 5.5 V,
= 5.5 V,
V = 0.4 V
I
mA
mA
CC
§
A or B ports
¶
V
O
= 2.25 V
–20
–30
O
CC
Outputs high
Outputs low
19
27
28
19
27
28
I
V
CC
= 5.5 V
60
55
mA
CC
Outputs disabled
55
50
†
All typical values are at V
= 5 V, T = 25°C.
A
CC
Applies only to the -1 version and only if V
‡
§
¶
is between 4.75 V and 5.25 V
CC
For I/O ports, the parameters I and I include the off-state output current.
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
IH IL
.
OS
switching characteristics (see Figure 1)
V
C
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
R1 = 500 Ω,
R2 = 500 Ω,
T
A
FROM
TO
(OUTPUT)
PARAMETER
(INPUT)
UNIT
#
= MIN to MAX
SN54ALS640B SN74ALS640B
MIN
2
MAX
14
MIN
2
MAX
11
t
t
t
t
t
t
PLH
PHL
PZH
PZL
PHZ
PLZ
A or B
ns
ns
ns
B or A
A or B
A or B
2
13
2
10
4
25
4
21
OE
OE
5
27
5
24
2
12
2
10
3
20
3
15
#
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS640B, SN54AS640, SN74ALS640B, SN74AS640
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS122A – DECEMBER 1983 – REVISED JANUARY 1995
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V : All inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, T : SN54AS640 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
SN74AS640 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54AS640
MIN NOM
SN74AS640
MIN NOM
UNIT
MAX
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Operating free-air temperature
IH
0.8
–12
48
0.8
–15
64
V
IL
I
I
mA
mA
°C
OH
OL
T
A
–55
125
0
70
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54AS640
SN74AS640
PARAMETER
TEST CONDITIONS
UNIT
‡
‡
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
= 4.5 V,
I = –18 mA
–1.2
–1.2
V
IK
CC
CC
CC
I
= 4.5 V,
I
I
I
I
I
I
I
= –2 mA
= –2 mA
= –3 mA
= –12 mA
= –15 mA
= 48 mA
= 64 mA
V
CC
–2
OH
OH
OH
OH
OH
OL
OL
= 4.5 V to 5.5 V,
V
–2
CC
2.4
V
OH
2.4
3.2
0.3
3.2
V
V
CC
= 4.5 V
2.4
2.4
0.55
V
OL
V
CC
V
CC
V
CC
= 4.5 V
= 5.5 V
= 5.5 V,
V
0.35
0.55
0.1
Control inputs
A or B ports
V = 7 V
I
0.1
0.1
I
I
mA
µA
V = 5.5 V
I
0.1
Control inputs
20
20
I
V = 2.7 V
I
IH
IL
§
A or B ports
70
70
Control inputs
–0.5
–0.75
–150
58
–0.5
–0.75
–150
58
I
I
V
V
= 5.5 V,
= 5.5 V,
V = 0.4 V
I
mA
mA
CC
§
A or B ports
¶
V
O
= 2.25 V
–50
–50
O
CC
Outputs high
Outputs low
37
78
51
37
78
51
I
V
CC
= 5.5 V
123
80
123
80
mA
CC
Outputs disabled
‡
§
¶
All typical values are at V
For I/O ports, the parameters I and I include the off-state output current.
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
= 5 V, T = 25°C.
A
IH IL
CC
.
OS
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS640B, SN54AS640, SN74ALS640B, SN74AS640
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS122A – DECEMBER 1983 – REVISED JANUARY 1995
switching characteristics (see Figure 1)
V
C
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
R1 = 500 Ω,
R2 = 500 Ω,
T
A
FROM
TO
(OUTPUT)
PARAMETER
(INPUT)
UNIT
†
= MIN to MAX
SN54AS640
SN74AS640
MIN
1
MAX
8
MIN
2
MAX
7
t
t
t
t
t
t
PLH
PHL
PZH
PZL
PHZ
PLZ
A or B
ns
ns
ns
B or A
A or B
A or B
1
7
2
6
2
10
12
9
2
8
OE
OE
2
2
10
8
2
2
2
16
2
13
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS640B, SN54AS640, SN74ALS640B, SN74AS640
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS122A – DECEMBER 1983 – REVISED JANUARY 1995
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7 V
R
= R1 = R2
V
CC
L
S1
R1
R
L
Test
Point
From Output
Under Test
From Output
Under Test
Test
Point
Test
Point
From Output
Under Test
C
C
L
R
L
R2
L
C
L
(see Note A)
(see Note A)
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
3.5 V
Timing
Input
High-Level
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
0.3 V
t
h
t
w
t
su
3.5 V
3.5 V
0.3 V
Data
Input
Low-Level
1.3 V
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
0.3 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
3.5 V
t
PZL
Input
1.3 V
1.3 V
t
PLZ
0.3 V
PHL
3.5 V
t
Waveform 1
S1 Closed
(see Note B)
t
PLH
1.3 V
V
OH
In-Phase
Output
1.3 V
1.3 V
1.3 V
V
OL
0.3 V
V
OL
t
PHZ
t
PLH
t
PZH
t
PHL
V
OH
V
Waveform 2
S1 Open
(see Note B)
OH
OL
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
0.3 V
V
0 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, t = t = 2 ns, duty cycle = 50%.
r
f
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
23-Apr-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
CFP
Drawing
5962-88727012A
5962-8872701RA
5962-8872701SA
5962-89553012A
5962-8955301RA
5962-8955301SA
SN54ALS640BJ
SN54AS640J
OBSOLETE
ACTIVE
FK
J
20
20
20
20
20
20
20
20
20
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Call TI
A42 SNPB
Call TI
Call TI
1
1
1
1
N / A for Pkg Type
N / A for Pkg Type
ACTIVE
W
FK
J
ACTIVE
LCCC
CDIP
CFP
POST-PLATE N / A for Pkg Type
ACTIVE
A42 SNPB
Call TI
N / A for Pkg Type
Call TI
OBSOLETE
ACTIVE
W
J
CDIP
CDIP
SOIC
1
1
A42 SNPB
A42 SNPB
N / A for Pkg Type
N / A for Pkg Type
ACTIVE
J
SN74ALS640B-1DW
ACTIVE
DW
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ALS640B-1DWE4
SN74ALS640B-1DWG4
SN74ALS640B-1DWR
SN74ALS640B-1DWRE4
SN74ALS640B-1DWRG4
SN74ALS640B-1N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
DW
DW
DW
DW
DW
N
20
20
20
20
20
20
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
20
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74ALS640B-1N3
SN74ALS640B-1NE4
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
20
20
TBD
Call TI
Call TI
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74ALS640B-1NSR
SN74ALS640B-1NSRE4
SN74ALS640B-1NSRG4
SN74ALS640BDW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
SO
NS
NS
NS
DW
DW
DW
DW
DW
DW
N
20
20
20
20
20
20
20
20
20
20
20
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SO
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ALS640BDWE4
SN74ALS640BDWG4
SN74ALS640BDWR
SN74ALS640BDWRE4
SN74ALS640BDWRG4
SN74ALS640BN
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74ALS640BNE4
N
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74ALS640BNSR
NS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
23-Apr-2008
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
no Sb/Br)
SN74ALS640BNSRE4
SN74ALS640BNSRG4
SN74AS640DW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
SO
NS
NS
DW
DW
DW
DW
DW
DW
N
20
20
20
20
20
20
20
20
20
20
20
20
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SO
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AS640DWE4
SN74AS640DWG4
SN74AS640DWR
SN74AS640DWRE4
SN74AS640DWRG4
SN74AS640N
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74AS640NE4
N
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74AS640NSR
NS
NS
NS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74AS640NSRE4
SN74AS640NSRG4
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SNJ54ALS640BFK
SNJ54ALS640BJ
SNJ54ALS640BW
SNJ54AS640FK
SNJ54AS640J
OBSOLETE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CFP
FK
J
20
20
20
20
20
TBD
TBD
TBD
TBD
TBD
Call TI
A42 SNPB
Call TI
Call TI
1
1
1
1
N / A for Pkg Type
N / A for Pkg Type
W
FK
J
LCCC
CDIP
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
23-Apr-2008
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
SN74ALS640B-1DWR
SN74ALS640BDWR
SN74AS640DWR
SOIC
SOIC
SOIC
DW
DW
DW
20
20
20
2000
2000
2000
330.0
330.0
330.0
24.4
24.4
24.4
10.8
10.8
10.8
13.0
13.0
13.0
2.7
2.7
2.7
12.0
12.0
12.0
24.0
24.0
24.0
Q1
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74ALS640B-1DWR
SN74ALS640BDWR
SN74AS640DWR
SOIC
SOIC
SOIC
DW
DW
DW
20
20
20
2000
2000
2000
346.0
346.0
346.0
346.0
346.0
346.0
41.0
41.0
41.0
Pack Materials-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
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