SN74AS867NT [TI]

SYNCHRONOUS 8-BIT UP/DOWN COUNTERS; 同步8位加/减计数器
SN74AS867NT
型号: SN74AS867NT
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

SYNCHRONOUS 8-BIT UP/DOWN COUNTERS
同步8位加/减计数器

计数器 触发器 逻辑集成电路 光电二极管 输出元件
文件: 总17页 (文件大小:288K)
中文:  中文翻译
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SN54AS867, SN54AS869  
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869  
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS  
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995  
SN54AS867, SN54AS869 . . . JT PACKAGE  
Fully Programmable With Synchronous  
SN74ALS867A, SN74ALS869, SN74AS867,  
SN74AS869 . . . DW OR NT PACKAGE  
(TOP VIEW)  
Counting and Loading  
SN74ALS867A and AS867 Have  
Asynchronous Clear; SN74ALS869 and  
AS869 Have Synchronous Clear  
S0  
S1  
A
B
C
D
E
F
G
V
CC  
ENP  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
2
Fully Independent Clock Circuit  
Q
3
Simplifies Use  
A
Q
B
4
Ripple-Carry Output for n-Bit Cascading  
Q
5
C
Package Options Include Plastic  
Small-Outline (DW) Packages, Ceramic  
Chip Carriers (FK), and Standard Plastic  
(NT) and Ceramic (JT) 300-mil DIPs  
Q
D
6
Q
7
E
Q
F
8
Q
9
G
H
ENT  
GND  
Q
H
CLK  
10  
11  
12  
description  
RCO  
These synchronous, presettable, 8-bit up/down  
counters feature internal-carry look-ahead  
circuitry for cascading in high-speed counting  
applications. Synchronous operation is provided  
by having all flip-flops clocked simultaneously so  
that the outputs change coincidentally with each  
other when so instructed by the count-enable  
(ENP, ENT) inputs and internal gating. This mode  
of operation eliminates the output counting spikes  
normally associated with asynchronous (ripple-  
clock) counters. A buffered clock (CLK) input  
triggers the eight flip-flops on the rising (positive-  
going) edge of the clock waveform.  
SN54AS867, SN54AS869 . . . FK PACKAGE  
(TOP VIEW)  
4
3
2
1 28 27 26  
25  
B
C
Q
Q
Q
5
B
C
D
24  
23  
22  
21  
20  
19  
6
D
7
NC  
E
NC  
8
Q
9
E
F
10  
11  
Q
Q
F
These counters are fully programmable; they may  
be preset to any number between 0 and 255. The  
load-input circuitry allows parallel loading of the  
cascaded counters. Because loading is  
synchronous, selecting the load mode disables  
the counter and causes the outputs to agree with  
the data inputs after the next clock pulse.  
G
G
12 13 14 15 16 17 18  
NC – No internal connection  
The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without  
additional gating. Two count-enable (ENP and ENT) inputs and a ripple-carry (RCO) output are instrumental  
in accomplishing this function. Both ENP and ENT must be low to count. The direction of the count is determined  
by the levels of the select (S0, S1) inputs as shown in the function table. ENT is fed forward to enable RCO. RCO  
thus enabled produces a low-level pulse while the count is zero (all outputs low) counting down or 255 counting  
up (all outputs high). This low-level overflow-carry pulse can be used to enable successive cascaded stages.  
Transitions at ENP and ENT are allowed regardless of the level of CLK. All inputs are diode clamped to minimize  
transmission-line effects, thereby simplifying system design.  
These counters feature a fully independent clock circuit. With the exception of the asynchronous clear on the  
SN74ALS867A and AS867, changes at S0 and S1 that modify the operating mode have no effect on the Q  
outputs until clocking occurs. For the AS867 and AS869, any time ENP and/or ENT is taken high, RCO either  
goes or remains high. For the SN74ALS867A and SN74ALS869, any time ENT is taken high, RCO either goes  
or remains high. The function of the counter (whether enabled, disabled, loading, or counting) is dictated solely  
by the conditions meeting the stable setup and hold times.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AS867, SN54AS869  
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869  
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS  
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995  
description (continued)  
The SN54AS867 and SN54AS869 are characterized for operation over the full military temperature range of  
55°C to 125°C. The SN74ALS867A, SN74ALS869, SN74AS867, and SN74AS869 are characterized for  
operation from 0°C to 70°C.  
FUNCTION TABLE  
S1  
L
S0  
L
FUNCTION  
Clear  
L
H
L
Count down  
Load  
H
H
H
Count up  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AS867, SN54AS869  
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869  
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS  
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995  
logic symbols  
SN74ALS867A  
CTRDIV 256  
1
S0  
S1  
0
0
3
2
M
1
13  
11  
RCO  
1,4CT=0  
ENT  
G4  
23  
14  
3,4CT=255  
ENP  
CLK  
G5  
C6/1,4,5/3,4,5+  
0R  
3
22  
21  
20  
19  
18  
17  
16  
15  
Q
A
A
B
C
D
E
F
2,6D  
4
Q
B
5
Q
C
6
Q
D
7
Q
E
8
Q
F
9
Q
G
G
H
10  
Q
H
SN74ALS869  
CTRDIV 256  
0
3
1
S0  
S1  
0
2
M
1
13  
11  
RCO  
ENT  
1,4CT=0  
G4  
23  
14  
3,4CT=255  
ENP  
CLK  
G5  
C6/1,4,5/3,4,5+  
0,6R  
3
22  
21  
20  
19  
18  
17  
16  
15  
Q
A
A
B
C
D
E
F
2,6D  
4
Q
B
5
Q
C
6
Q
D
7
Q
E
8
Q
F
9
Q
G
G
H
10  
Q
H
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
Pin numbers shown are for the DW, JT, and NT packages.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AS867, SN54AS869  
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869  
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS  
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995  
logic symbols (continued)  
AS867  
CTRDIV 256  
0
3
1
S0  
S1  
0
2
M
1
13  
11  
RCO  
1,4,5CT=0  
3,4,5CT=255  
ENT  
G4  
23  
14  
ENP  
CLK  
G5  
C6/1,4,5/3,4,5+  
0R  
3
22  
21  
20  
19  
18  
17  
16  
15  
Q
A
A
B
C
D
E
F
2,6D  
4
Q
B
5
Q
C
6
Q
D
7
Q
E
8
Q
F
9
Q
G
G
H
10  
Q
H
AS869  
CTRDIV 256  
0
3
1
S0  
S1  
0
2
M
1
13  
11  
RCO  
1,4,5CT=0  
3,4,5CT=255  
ENT  
G4  
23  
14  
ENP  
CLK  
G5  
C6/1,4,5/3,4,5+  
0,6R  
3
22  
21  
20  
19  
18  
17  
16  
15  
Q
A
A
B
C
D
E
F
2,6D  
4
Q
B
5
Q
C
6
Q
D
7
Q
E
8
Q
F
9
Q
G
G
H
10  
Q
H
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
Pin numbers shown are for the DW, JT, and NT packages.  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AS867, SN54AS869  
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869  
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS  
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995  
logic diagram (positive logic)  
SN74ALS867A, SN74ALS869  
14  
CLK  
1
SN74ALS867A Only  
(asynchronous clear)  
S0  
2
S1  
23  
ENP  
1D  
C1  
22  
R
3
A
Q
Q
Q
Q
A
B
C
D
1D  
C1  
4
21  
20  
19  
R
B
1D  
C1  
R
5
C
1D  
C1  
R
6
D
1D  
C1  
7
18  
17  
R
E
Q
Q
E
F
1D  
C1  
R
8
F
1D  
C1  
9
16  
15  
R
G
Q
Q
G
H
1D  
C1  
10  
H
R
13  
RCO  
11  
ENT  
Pin numbers shown are for the DW, JT, and NT packages.  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AS867, SN54AS869  
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869  
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS  
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995  
logic diagram (positive logic)  
AS867, AS869  
1
S0  
2
AS867 Only  
(asynchronous clear)  
S1  
11  
ENT  
13  
22  
RCO  
23  
14  
ENP  
CLK  
Q
Q
Q
Q
A
B
C
D
3
4
5
6
1D  
C1  
R
A
B
C
D
21  
20  
19  
1D  
C1  
R
1D  
C1  
R
1D  
C1  
R
18  
17  
16  
15  
Q
Q
Q
Q
E
F
7
1D  
C1  
R
E
F
8
1D  
C1  
R
G
H
9
1D  
C1  
R
G
H
10  
1D  
C1  
R
Pin numbers shown are for the DW, JT, and NT packages.  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AS867, SN54AS869  
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869  
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS  
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995  
typical clear, preset, count, and inhibit sequences  
The following sequence is illustrated below:  
1. Clear outputs to zero (SN74ALS867A and AS867 are asynchronous;  
SN74ALS869 and AS869 are synchronous.)  
2. Preset to binary 252  
3. Count up to 253, 254, 255, 0, 1, and 2  
4. Count down to 1, 0, 255, 254, 253, and 252  
5. Inhibit  
S0  
S1  
A
B
C
D
Data  
Inputs  
E
F
G
H
CLK  
ENP  
ENT  
Q
A
Q
B
Q
C
Q
D
Outputs  
Q
E
Q
F
Q
G
Q
H
RCO  
Sync  
Clear  
252 253 254 255  
0
1
2
1
0
255 254 253 252  
Count Down  
Count Up  
Inhibit  
Async  
Preset  
Clear  
ENT and ENP both must be low for counting to occur.  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AS867, SN54AS869  
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869  
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS  
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
CC  
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
I
Operating free-air temperature range, T : SN74ALS867A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C  
A
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
recommended operating conditions  
SN74ALS867A  
MIN NOM MAX  
UNIT  
V
V
V
Supply voltage  
4.5  
2
5
5.5  
V
V
CC  
High-level input voltage  
Low-level input voltage  
IH  
0.8  
0.4  
8
V
IL  
I
I
f
t
t
High-level output current  
Low-level output current  
Clock frequency  
mA  
mA  
MHz  
ns  
OH  
OL  
0
14  
10  
10  
15  
12  
12  
12  
3
35  
clock  
w(clock)  
w(clear)  
Pulse duration, CLK high or low  
Pulse duration of clear pulse, S0 and S1 low  
ns  
Data inputs A–H  
ENP or ENT  
t
su  
S0 low and S1 high (load)  
S0 high and S1 low (count down)  
S0 and S1 high (count up)  
S0 high after S1or S1 high after S0↑  
Data inputs A–H  
ns  
Setup time before CLK↑  
t
h
ns  
Hold time after CLK↑  
0
T
A
Operating free-air temperature  
0
70  
°C  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
SN74ALS867A  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN TYP  
MAX  
V
V
V
V
= 4.5 V,  
I = –18 mA  
–1.2  
V
V
IK  
CC  
I
= 4.5 V to 5.5 V,  
I
I
I
= 0.4 mA  
= 4 mA  
V
CC  
–2  
OH  
CC  
OH  
OL  
OL  
0.25  
0.35  
0.4  
0.5  
V
OL  
V
CC  
= 4.5 V  
V
= 8 mA  
I
I
I
I
I
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
= 5.5 V  
V = 7 V  
0.1  
mA  
µA  
I
I
V = 2.7 V  
I
20  
IH  
IL  
V = 0.4 V  
I
0.2  
–112  
45  
mA  
mA  
mA  
§
V
O
= 2.25 V  
30  
O
28  
CC  
§
All typical values are at V  
= 5 V, T = 25°C.  
A
CC  
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I  
.
OS  
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AS867, SN54AS869  
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869  
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS  
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995  
switching characteristics (see Figure 1)  
V
C
R
= 4.5 V to 5.5 V,  
= 50 pF,  
CC  
L
L
= 500 ,  
FROM  
TO  
(OUTPUT)  
PARAMETER  
(INPUT)  
UNIT  
T
A
= MIN to MAX  
SN74ALS867A  
MIN  
35  
4
MAX  
f
t
t
t
t
t
t
t
t
t
t
MHz  
ns  
max  
PLH  
PHL  
PLH  
PHL  
PLH  
PHL  
PHL  
PLH  
PHL  
PLH  
14  
14  
16  
16  
14  
9
CLK  
CLK  
RCO  
4
3
Any Q  
ns  
3
3
ns  
ns  
ns  
ns  
ENT  
RCO  
2
S0 or S1 (clear mode)  
Any Q  
8
26  
16  
16  
16  
4
S0 or S1  
(count up/down)  
RCO  
RCO  
4
S0 or S1 (clear mode)  
4
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.  
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AS867, SN54AS869  
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869  
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS  
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
CC  
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
I
Operating free-air temperature range, T : SN74ALS869 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C  
A
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
recommended operating conditions  
SN74ALS869  
MIN NOM MAX  
UNIT  
V
V
V
Supply voltage  
4.5  
2
5
5.5  
V
V
CC  
High-level input voltage  
Low-level input voltage  
High-level output current  
Low-level output current  
Clock frequency  
IH  
0.8  
0.4  
8
V
IL  
I
I
f
t
mA  
mA  
MHz  
ns  
OH  
OL  
0
14  
10  
15  
13  
13  
13  
13  
3
35  
clock  
w(clock)  
Pulse duration, CLK high or low  
Data inputs A–H  
ENP or ENT  
S0 and S1 low (clear)  
t
su  
ns  
Setup time before CLK↑  
S0 low and S1 high (load)  
S0 high and S1 low (count down)  
S0 and S1 high (count up)  
S0 high after S1or S1 high after S0↑  
Data inputs A–H  
t
h
ns  
Hold time after CLK↑  
0
T
A
Operating free-air temperature  
0
70  
°C  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
SN74ALS869  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN TYP  
MAX  
V
V
V
V
= 4.5 V,  
I = –18 mA  
–1.2  
V
V
IK  
CC  
I
= 4.5 V to 5.5 V,  
I
I
I
= 0.4 mA  
= 4 mA  
V
CC  
–2  
OH  
CC  
OH  
OL  
OL  
0.25  
0.35  
0.4  
0.5  
V
OL  
V
CC  
= 4.5 V  
V
= 8 mA  
I
I
I
I
I
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
= 5.5 V  
V = 7 V  
0.1  
mA  
µA  
I
I
V = 2.7 V  
I
20  
IH  
IL  
V = 0.4 V  
I
0.2  
–112  
45  
mA  
mA  
mA  
§
V
O
= 2.25 V  
30  
O
28  
CC  
§
All typical values are at V  
= 5 V, T = 25°C.  
A
CC  
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I  
.
OS  
10  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AS867, SN54AS869  
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869  
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS  
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995  
switching characteristics (see Figure 1)  
V
C
R
= 4.5 V to 5.5 V,  
= 50 pF,  
CC  
L
L
= 500 ,  
FROM  
TO  
(OUTPUT)  
PARAMETER  
(INPUT)  
UNIT  
T
A
= MIN to MAX  
SN74ALS869  
MIN MAX  
35  
f
t
t
t
t
t
t
t
t
t
t
MHz  
ns  
max  
PLH  
PHL  
PLH  
PHL  
PLH  
PHL  
PLH  
PHL  
PLH  
PHL  
4
4
3
3
3
2
4
4
4
4
14  
14  
16  
16  
14  
9
CLK  
CLK  
ENT  
RCO  
Any Q  
ns  
ns  
ns  
ns  
RCO  
RCO  
RCO  
15  
15  
16  
12  
S1  
(count up/down)  
S0  
(clear/load)  
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.  
11  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AS867, SN54AS869  
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869  
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS  
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
CC  
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
I
Operating free-air temperature range, T : SN54AS867 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 125°C  
A
SN74AS867 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C  
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
recommended operating conditions  
SN54AS867  
MIN NOM  
SN74AS867  
MIN NOM  
UNIT  
MAX  
MAX  
V
V
V
Supply voltage  
4.5  
2
5
5.5  
4.5  
2
5
5.5  
V
V
CC  
High-level input voltage  
Low-level input voltage  
IH  
0.8  
–2  
20  
40  
0.8  
–2  
20  
50  
V
IL  
I
I
f
t
t
High-level output current  
Low-level output current  
Clock frequency  
mA  
mA  
MHz  
ns  
OH  
OL  
clock  
*
0
12.5  
12.5  
5
0
10  
10  
4
*
Pulse duration, CLK high or low  
Pulse duration of clear pulse, S0 and S1 low  
w(clock)  
*
ns  
w(clear)  
Data inputs A–H  
ENP or ENT  
9
8
S0 low and S1 high (load)  
S0 and S1 low (clear)  
S0 high and S1 low (count down)  
S0 and S1 high (count up)  
Data inputs A–H  
11  
10  
10  
40  
40  
0
t
*
ns  
Setup time before CLK↑  
su  
11  
42  
42  
0
t *  
h
Hold time after CLK↑  
ns  
ns  
°C  
Skew time between S0 and S1  
t
*
8
7
skew  
(maximum to avoid inadvertent clear)  
T
Operating free-air temperature  
55  
125  
0
70  
A
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.  
12  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AS867, SN54AS869  
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869  
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS  
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
SN54AS867  
SN74AS867  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN TYP  
MAX  
MIN TYP  
MAX  
V
V
V
V
= 4.5 V,  
I = –18 mA  
–1.2  
–1.2  
V
V
IK  
CC  
I
= 4.5 V to 5.5 V,  
I
= 2 mA  
V
CC  
–2  
V
CC  
–2  
OH  
CC  
OH  
OL  
I
V
= 20 mA,  
on ENT = 0.7 V  
0.34  
0.5  
RCO  
IL  
V
OL  
V
CC  
= 4.5 V  
V
Other outputs  
I
= 20 mA  
0.34  
0.5  
0.1  
OL  
I
I
V
V
= 5.5 V,  
= 5.5 V,  
V = 7 V  
0.1  
40  
mA  
I
CC  
I
ENT  
40  
V = 2.7 V  
µA  
IH  
IL  
CC  
I
Other inputs  
ENT  
20  
20  
–4  
–4  
I
V
CC  
= 5.5 V,  
V = 0.4 V  
mA  
I
Other inputs  
–2  
–2  
I
I
V
V
= 5.5 V,  
= 5.5 V  
V = 2.25 V  
O
30  
112  
195  
30  
112  
195  
mA  
mA  
O
CC  
134  
134  
CC  
CC  
All typical values are at V  
= 5 V, T = 25°C.  
A
CC  
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I  
.
OS  
switching characteristics (see Figure 1)  
V
C
R
= 4.5 V to 5.5 V,  
= 50 pF,  
CC  
L
L
= 500 ,  
FROM  
TO  
(OUTPUT)  
§
PARAMETER  
(INPUT)  
UNIT  
T
A
= MIN to MAX  
SN54AS867  
SN74AS867  
MIN  
40  
5
MAX  
MIN  
50  
5
MAX  
f
t
t
t
t
t
t
t
t
t
*
MHz  
ns  
max  
31  
19  
12  
16  
19  
21  
16  
21  
23  
22  
16  
11  
15  
10  
17  
14  
17  
21  
PLH  
PHL  
PLH  
PHL  
PLH  
PHL  
PLH  
PHL  
PHL  
CLK  
CLK  
RCO  
6
6
3
3
Any Q  
ns  
ns  
4
4
3
3
ENT  
RCO  
5
5
5
5
ns  
ns  
ENP  
RCO  
5
5
Clear (S0 or S1 low)  
Any Q  
7
7
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.  
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.  
13  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AS867, SN54AS869  
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869  
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS  
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
CC  
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
I
Operating free-air temperature range, T : SN54AS869 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 125°C  
A
SN74AS869 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C  
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
recommended operating conditions  
SN54AS869  
MIN NOM  
SN74AS869  
MIN NOM  
UNIT  
MAX  
MAX  
V
V
V
Supply voltage  
4.5  
2
5
5.5  
4.5  
2
5
5.5  
V
V
CC  
High-level input voltage  
Low-level input voltage  
High-level output current  
Low-level output current  
Clock frequency  
IH  
0.7  
–2  
20  
40  
0.8  
–2  
20  
45  
V
IL  
I
I
f
t
mA  
mA  
MHz  
ns  
OH  
OL  
clock  
*
*
Pulse duration, CLK high or low  
12.5  
6
11  
5
w(clock)  
Data inputs A–H  
ENP or ENT  
10  
13  
13  
52  
52  
0
9
S0 low and S1 high (load)  
S0 and S1 low (clear)  
S0 high and S1 low (count down)  
S0 and S1 high (count up)  
Data inputs A–H  
11  
11  
50  
50  
0
t *  
su  
ns  
Setup time before CLK↑  
t *  
h
Hold time after CLK↑  
ns  
T
A
Operating free-air temperature  
55  
125  
0
70  
°C  
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.  
14  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AS867, SN54AS869  
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869  
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS  
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
SN54AS869  
SN74AS869  
PARAMETER  
TEST CONDITIONS  
UNIT  
V
MIN TYP  
MAX  
MIN TYP  
MAX  
V
V
V
V
V
= 4.5 V,  
I = –18 mA  
I
–1.2  
–1.2  
IK  
CC  
CC  
CC  
= 4.5 V to 5.5 V,  
= 4.5 V,  
I
I
I
= 2 mA  
= 2 mA  
V
CC  
–2  
OH  
OH  
OL  
V
OH  
V
CC  
2*  
= 20 mA,  
on ENT = 0.7 V  
0.34  
0.5  
RCO  
V
IL  
V
OL  
V
CC  
= 4.5 V  
V
Other outputs  
I
= 20 mA  
0.34  
0.5  
0.1  
OL  
I
I
V
V
= 5.5 V,  
= 5.5 V,  
V = 7 V  
0.1  
40  
mA  
I
CC  
I
ENT  
40  
V = 2.7 V  
µA  
IH  
IL  
CC  
I
Other inputs  
ENT  
20  
20  
–4  
–4  
I
V
CC  
= 5.5 V,  
V = 0.4 V  
mA  
I
Other inputs  
–2  
–2  
I
I
V
V
= 5.5 V,  
= 5.5 V  
V = 2.25 V  
O
30  
112  
195  
30  
112  
195  
mA  
mA  
O
CC  
134  
134  
CC  
CC  
All typical values are at V  
= 5 V, T = 25°C.  
A
CC  
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I  
.
OS  
switching characteristics (see Figure 1)  
V
C
R
= 4.5 V to 5.5 V,  
= 50 pF,  
CC  
L
L
= 500 ,  
FROM  
TO  
(OUTPUT)  
§
PARAMETER  
(INPUT)  
UNIT  
T
A
= MIN to MAX  
SN54AS869  
SN74AS869  
MIN  
40  
6
MAX  
MIN  
45  
6
MAX  
f
t
t
t
t
t
t
t
t
*
MHz  
ns  
max  
35  
20  
12  
16  
25  
21  
27  
21  
35  
18  
11  
15  
15  
17  
19  
18  
PLH  
PHL  
PLH  
PHL  
PLH  
PHL  
PLH  
PHL  
CLK  
CLK  
RCO  
6
6
3
3
Any Q  
ns  
ns  
ns  
4
4
3
3
ENT  
ENP  
RCO  
RCO  
6
6
5
5
6
6
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.  
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.  
15  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54AS867, SN54AS869  
SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869  
SYNCHRONOUS 8-BIT UP/DOWN COUNTERS  
SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995  
PARAMETER MEASUREMENT INFORMATION  
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES  
7 V  
R
= R1 = R2  
V
CC  
L
S1  
R1  
R
L
Test  
Point  
From Output  
Under Test  
From Output  
Under Test  
Test  
Point  
Test  
Point  
From Output  
Under Test  
C
C
L
R
L
R2  
L
C
L
(see Note A)  
(see Note A)  
(see Note A)  
LOAD CIRCUIT FOR  
BI-STATE  
TOTEM-POLE OUTPUTS  
LOAD CIRCUIT  
FOR OPEN-COLLECTOR OUTPUTS  
LOAD CIRCUIT  
FOR 3-STATE OUTPUTS  
3.5 V  
3.5 V  
Timing  
Input  
High-Level  
1.3 V  
1.3 V  
1.3 V  
Pulse  
0.3 V  
0.3 V  
t
h
t
w
t
su  
3.5 V  
3.5 V  
0.3 V  
Data  
Input  
Low-Level  
1.3 V  
1.3 V  
1.3 V  
1.3 V  
Pulse  
0.3 V  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
VOLTAGE WAVEFORMS  
PULSE DURATIONS  
3.5 V  
0.3 V  
Output  
Control  
(low-level  
enabling)  
1.3 V  
1.3 V  
3.5 V  
t
PZL  
Input  
1.3 V  
1.3 V  
t
PLZ  
0.3 V  
PHL  
3.5 V  
t
Waveform 1  
S1 Closed  
(see Note B)  
t
PLH  
1.3 V  
V
OH  
In-Phase  
Output  
1.3 V  
1.3 V  
1.3 V  
V
OL  
0.3 V  
V
OL  
t
PHZ  
t
PLH  
t
PZH  
t
PHL  
V
OH  
V
Waveform 2  
S1 Open  
(see Note B)  
OH  
OL  
Out-of-Phase  
Output  
(see Note C)  
1.3 V  
1.3 V  
0.3 V  
V
0 V  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS  
NOTES: A.  
C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.  
D. All input pulses have the following characteristics: PRR 1 MHz, t = t = 2 ns, duty cycle = 50%.  
r
f
E. The outputs are measured one at a time with one transition per measurement.  
Figure 1. Load Circuits and Voltage Waveforms  
16  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
BE FULLY AT THE CUSTOMER’S RISK.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 1998, Texas Instruments Incorporated  

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