SN74AUC1G08DCKRG4 [TI]
SINGLE 2-INPUT POSITIVE-AND GATE; 单路2输入正与门型号: | SN74AUC1G08DCKRG4 |
厂家: | TEXAS INSTRUMENTS |
描述: | SINGLE 2-INPUT POSITIVE-AND GATE |
文件: | 总14页 (文件大小:402K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN74AUC1G08
SINGLE 2-INPUT POSITIVE-AND GATE
www.ti.com
SCES374O–SEPTEMBER 2001–REVISED APRIL 2007
FEATURES
•
Available in the Texas Instruments
NanoFree™ Package
•
•
•
Low Power Consumption, 10-µA Max ICC
±8-mA Output Drive at 1.8 V
•
Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
•
ESD Protection Exceeds JESD 22
•
Ioff Supports Partial-Power-Down Mode
Operation
–
–
–
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
•
•
Sub-1-V Operable
1000-V Charged-Device Model (C101)
Max tpd of 2.4 ns at 1.8 V
DBV PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
DRL PACKAGE
(TOP VIEW)
VCC
A
B
1
2
3
5
1
2
3
5
4
A
B
VCC
1
2
3
5
A
B
VCC
GND
Y
4
GND
Y
4
Y
GND
DRY PACKAGE
(TOP VIEW)
YZP PACKAGE
(BOTTOM VIEW)
3
4
Y
1
2
3
6
5
4
GND
B
A
B
VCC
2
1
NC
Y
5
VCC
A
GND
See mechanical drawings for dimensions.
NC – No internal connection
DESCRIPTION/ORDERING INFORMATION
This single 2-input positive-AND gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V
to 1.95-V VCC operation.
Y + A • B or Y + A ) B
The SN74AUC1G08 performs the Boolean function
in positive logic.
ORDERING INFORMATION
TA
PACKAGE(1)(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(3)
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
Reel of 3000
SN74AUC1G08YZPR
_ _ _UE_
SON – DRY
Reel of 5000
Reel of 3000
Reel of 3000
SN74AUC1G08DRYR
SN74AUC1G08DBVR
SN74AUC1G08DCKR
PREVIEW
U08_
–40°C to 85°C
SOT (SOT-23) – DBV
SOT (SC-70) – DCK
UE_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(3) DBV/DCK/DRY: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains
Copyright © 2001–2007, Texas Instruments Incorporated
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74AUC1G08
SINGLE 2-INPUT POSITIVE-AND GATE
www.ti.com
SCES374O–SEPTEMBER 2001–REVISED APRIL 2007
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
FUNCTION TABLE
INPUTS
OUTPUT
Y
A
H
L
B
H
X
L
H
L
L
X
LOGIC DIAGRAM (POSITIVE LOGIC)
1
A
B
4
Y
2
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
MAX
3.6
UNIT
V
VCC
VI
Supply voltage range
Input voltage range(2)
Voltage range applied to any output in the high-impedance or power-off state(2)
Output voltage range(2)
3.6
V
VO
VO
IIK
3.6
V
–0.5 VCC + 0.5
V
Input clamp current
VI < 0
–50
–50
±20
±100
206
252
142
234
132
mA
mA
mA
mA
IOK
IO
Output clamp current
VO < 0
Continuous output current
Continuous current through VCC or GND
DBV package
DCK package
DRL package
DRY package
YZP package
θJA
Package thermal impedance(3)
°C/W
Tstg
Storage temperature range
–65
150
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
2
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SN74AUC1G08
SINGLE 2-INPUT POSITIVE-AND GATE
www.ti.com
SCES374O–SEPTEMBER 2001–REVISED APRIL 2007
Recommended Operating Conditions(1)
MIN
0.8
MAX UNIT
VCC
VIH
Supply voltage
2.7
V
VCC = 0.8 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 0.8 V to 1.95 V
VCC = 2.3 V to 2.7 V
0.65 × VCC
1.7
High-level input voltage
V
0.35 × VCC
VIL
Low-level input voltage
V
0.7
3.6
VCC
–0.7
–3
–5
–8
–9
0.7
3
VI
Input voltage
0
0
V
V
VO
Output voltage
VCC = 0.8 V
VCC = 1.1 V
IOH
High-level output current
Low-level output current
VCC = 1.4 V
mA
mA
VCC = 1.65 V
VCC = 2.3 V
VCC = 0.8 V
VCC = 1.1 V
IOL
VCC = 1.4 V
5
VCC = 1.65 V
VCC = 2.3 V
8
9
VCC = 0.8 V to 1.95 V
VCC = 2.3 V to 2.7 V
20
10
85
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
ns/V
TA
–40
°C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –100 µA
VCC
0.8 V to 2.7 V
0.8 V
MIN
TYP(1)
MAX UNIT
VCC – 0.1
IOH = –0.7 mA
IOH = –3 mA
IOH = –5 mA
IOH = –8 mA
IOH = –9 mA
IOL = 100 µA
IOL = 0.7 mA
IOL = 3 mA
0.55
1.1 V
0.8
1
VOH
V
1.4 V
1.65 V
2.3 V
1.2
1.8
0.8 V to 2.7 V
0.8 V
0.2
0.25
1.1 V
0.3
V
VOL
IOL = 5 mA
1.4 V
0.4
IOL = 8 mA
1.65 V
2.3 V
0.45
0.6
IOL = 9 mA
II
A or B input
VI = VCC or GND
VI or VO = 2.7 V
VI = VCC or GND,
VI = VCC or GND
0 to 2.7 V
0
±5
±10
10
µA
µA
µA
pF
Ioff
ICC
CI
IO = 0
0.8 V to 2.7 V
2.5 V
3
(1) All typical values are at TA = 25°C.
3
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SN74AUC1G08
SINGLE 2-INPUT POSITIVE-AND GATE
www.ti.com
SCES374O–SEPTEMBER 2001–REVISED APRIL 2007
Switching Characteristics
over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 1)
VCC = 1.2 V VCC = 1.5 V
± 0.1 V ± 0.1 V
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 0.8 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
TYP
MIN MAX MIN MAX MIN TYP MAX MIN MAX
0.9 3.3 0.6 2.3 0.4 1.1 1.7 0.2 1.6
tpd
A or B
Y
4.7
ns
Switching Characteristics
over recommended operating free-air temperature range, CL = 30 pF (unless otherwise noted) (see Figure 1)
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
TYP
MAX
MIN MAX
tpd
A or B
Y
0.7
1.3
2.4
0.5
2
ns
Operating Characteristics
TA = 25°C
VCC = 0.8 V
TYP
VCC = 1.2 V
TYP
VCC = 1.5 V
TYP
VCC = 1.8 V
TYP
VCC = 2.5 V
TYP
TEST
CONDITIONS
PARAMETER
UNIT
Power dissipation
capacitance
Cpd
f = 10 MHz
15
15
15
15
19
pF
4
Submit Documentation Feedback
SN74AUC1G08
SINGLE 2-INPUT POSITIVE-AND GATE
www.ti.com
SCES374O–SEPTEMBER 2001–REVISED APRIL 2007
PARAMETER MEASUREMENT INFORMATION
2 × V
CC
TEST
/t
PLH PHL
S1
Open
2 × V
S1
Open
GND
R
L
t
t
From Output
Under Test
t
/t
PLZ PZL
CC
/t
GND
PHZ PZH
C
L
R
L
(see Note A)
C
L
V
∆
R
L
V
CC
0.8 V
2 kΩ
2 kΩ
2 kΩ
2 kΩ
2 kΩ
1 kΩ
500 Ω
0.1 V
0.1 V
0.1 V
15 pF
15 pF
15 pF
15 pF
15 pF
30 pF
30 pF
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
LOAD CIRCUIT
0.15 V
0.15 V
0.15 V
0.15 V
V
CC
Timing Input
V /2
CC
0 V
t
w
t
su
t
h
V
CC
V
CC
V /2
CC
V /2
CC
Input
V /2
CC
V /2
CC
Data Input
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
V
CC
CC
Output
Control
V
CC
/2
V
CC
/2
V /2
CC
V /2
CC
Input
0 V
V
0 V
t
t
t
PLZ
t
t
PHL
PZL
PLH
Output
Waveform 1
V
OH
CC
V
/2
/2
V
V
/2
/2
V
CC
/2
CC
CC
Output
S1 at 2 × V
V
OL
+ V
PHZ
CC
∆
V
OL
V
OL
(see Note B)
t
t
PZH
t
PHL
PLH
/2
Output
Waveform 2
S1 at GND
V
OH
V
OH
V
OH
− V
∆
V
CC
V
CC
CC
Output
≈0 V
V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, slew rate ≥ 1 V/ns.
O
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
.
dis
.
PLZ
PZL
PLH
PHZ
are the same as t
PZH
en
are the same as t .
PHL pd
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
5
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PACKAGE OPTION ADDENDUM
www.ti.com
29-May-2007
PACKAGING INFORMATION
Orderable Device
SN74AUC1G08DBVR
SN74AUC1G08DBVRE4
SN74AUC1G08DBVRG4
SN74AUC1G08DCKR
SN74AUC1G08DCKRE4
SN74AUC1G08DCKRG4
SN74AUC1G08DRLR
SN74AUC1G08DRLRG4
SN74AUC1G08YZPR
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT-23
DBV
5
5
5
5
5
5
5
5
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SOT-23
SC70
DBV
DBV
DCK
DCK
DCK
DRL
DRL
YZP
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-553
SOT-553
WCSP
4000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
4000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-May-2007
TAPE AND REEL INFORMATION
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-May-2007
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
180
180
180
180
180
(mm)
SN74AUC1G08DBVR
SN74AUC1G08DBVR
SN74AUC1G08DCKR
SN74AUC1G08DRLR
SN74AUC1G08YZPR
DBV
DBV
DCK
DRL
YZP
5
5
5
5
5
HNT
HNC
9
9
9
9
8
3.23
3.23
2.24
1.78
1.02
3.17
3.17
2.34
1.78
1.52
1.37
1.37
1.22
0.69
0.66
4
4
4
4
4
8
8
8
8
8
Q3
Q3
Q3
Q3
Q1
HNC
HNT
SCSAT
TAPE AND REEL BOX INFORMATION
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
SN74AUC1G08DBVR
SN74AUC1G08DBVR
SN74AUC1G08DCKR
SN74AUC1G08DRLR
SN74AUC1G08YZPR
DBV
DBV
DCK
DRL
YZP
5
5
5
5
5
HNT
HNC
202.0
205.0
205.0
201.0
220.0
201.0
200.0
200.0
192.0
220.0
28.0
33.0
33.0
26.0
34.0
HNC
HNT
SCSAT
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-May-2007
Pack Materials-Page 3
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