SN74AUC1G14-EP_15 [TI]
SINGLE SCHMITT-TRIGGER INVERTER;型号: | SN74AUC1G14-EP_15 |
厂家: | TEXAS INSTRUMENTS |
描述: | SINGLE SCHMITT-TRIGGER INVERTER |
文件: | 总13页 (文件大小:319K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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ꢀꢉ ꢁꢈ ꢊ ꢋ ꢀꢆꢌ ꢍꢉ ꢎꢎꢏꢎ ꢐꢉꢈ ꢈ ꢋꢐ ꢉ ꢁꢑ ꢋ ꢐꢎ ꢋꢐ
SCES375J − SEPTEMBER 2001 − REVISED NOVEMBER 2003
DBV OR DCK PACKAGE
(TOP VIEW)
D
D
Available in the Texas Instruments
NanoStar and NanoFree Packages
Optimized for 1.8-V Operation and Is 3.6-V
I/O Tolerant to Support Mixed-Mode Signal
Operation
1
2
3
5
4
NC
A
GND
V
Y
CC
D
I
Supports Partial-Power-Down Mode
off
Operation
NC − No internal connection
D
D
D
D
D
Sub 1-V Operable
YEA, YEP, YZA, OR YZP PACKAGE
(BOTTOM VIEW)
Max t of 2.5 ns at 1.8 V
pd
Low Power Consumption, 10-µA Max I
CC
3 4
2
GND
A
DNU
Y
V
8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
1 5
CC
D
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
DNU − Do not use
− 1000-V Charged-Device Model (C101)
description/ordering information
This single Schmitt-trigger inverter is operational at 0.8-V to 2.7-V V , but is designed specifically for 1.65-V
CC
to 1.95-V V
operation.
CC
The SN74AUC1G14 contains one inverter and performs the Boolean function Y = A. The device functions as
an independent inverter, but because of Schmitt action, it may have different input threshold levels for
positive-going (V ) and negative-going (V ) signals.
T+
T−
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
‡
NanoStar − WCSP (DSBGA)
0.17-mm Small Bump − YEA
SN74AUC1G14YEAR
SN74AUC1G14YZAR
SN74AUC1G14YEPR
SN74AUC1G14YZPR
NanoFree − WCSP (DSBGA)
0.17-mm Small Bump − YZA (Pb-free)
Tape and reel
_ _ _UF_
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
−40°C to 85°C
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
SOT (SOT-23) − DBV
SOT (SC-70) − DCK
Tape and reel
Tape and reel
SN74AUC1G14DBVR
SN74AUC1G14DCKR
U14_
UF_
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,
and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
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Copyright 2003, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SCES375J − SEPTEMBER 2001 − REVISED NOVEMBER 2003
description/ordering information (continued)
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,
off
off
preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, please refer to the TI application report, Applications of
Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027.
FUNCTION TABLE
INPUT
A
OUTPUT
Y
H
L
L
H
logic diagram (positive logic)
2
4
A
Y
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.6 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.6 V
I
Voltage range applied to any output in the high-impedance or power-off state, V
O
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.6 V
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V + 0.5 V
O
CC
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
IK
OK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
O
Continuous output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Continuous current through V
O
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
CC
Package thermal impedance, θ (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W
JA
DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W
YEA/YZA package . . . . . . . . . . . . . . . . . . . . . . . . . . . 154°C/W
YEP/YZP package . . . . . . . . . . . . . . . . . . . . . . . . . . . 132°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
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SCES375J − SEPTEMBER 2001 − REVISED NOVEMBER 2003
recommended operating conditions (see Note 3)
MIN
0.8
0
MAX
2.7
UNIT
V
V
V
Supply voltage
Input voltage
Output voltage
V
V
V
CC
3.6
I
0
V
CC
O
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 0.8 V
= 1.1 V
= 1.4 V
= 1.65 V
= 2.3 V
= 0.8 V
= 1.1 V
= 1.4 V
= 1.65 V
= 2.3 V
−0.7
−3
−5
−8
−9
0.7
3
I
High-level output current
mA
OH
5
I
Low-level output current
mA
OL
8
9
T
A
Operating free-air temperature
−40
85
°C
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
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SCES375J − SEPTEMBER 2001 − REVISED NOVEMBER 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
UNIT
V
CC
0.8 V
1.1 V
0.5
V
0.51
0.65
0.79
1.11
0.86
1
T+
Positive-going input
threshold voltage
1.4 V
V
1.65 V
2.3 V
1.16
1.56
0.8 V
0.3
1.1 V
0.22
0.3
0.53
0.58
0.62
0.87
V
T−
1.4 V
Negative-going input
threshold voltage
V
V
1.65 V
2.3 V
0.39
0.58
0.8 V
0.21
1.1 V
0.25
0.31
0.37
0.48
0.38
0.5
∆V
Hysteresis
(V − V
T+ T−
T
1.4 V
)
1.65 V
2.3 V
0.62
0.77
I
I
I
I
I
I
I
I
I
I
I
I
= −100 µA
= −0.7 mA
= −3 mA
= −5 mA
= −8 mA
= −9 mA
= 100 µA
= 0.7 mA
= 3 mA
0.8 V to 2.7 V
0.8 V
V
CC
−0.1
OH
OH
OH
OH
OH
OH
OL
OL
OL
OL
OL
OL
0.55
1.1 V
0.8
1
V
OH
V
1.4 V
1.65 V
2.3 V
1.2
1.8
0.8 V to 2.7 V
0.8 V
0.2
0.25
1.1 V
0.3
0.4
0.45
0.6
5
V
OL
V
= 5 mA
1.4 V
= 8 mA
1.65 V
2.3 V
= 9 mA
I
I
I
A input
V = V
CC
or GND
0 to 2.7 V
0
µA
µA
µA
pF
I
I
V or V = 2.7 V
10
off
I
O
V = V
or GND,
or GND
I = 0
O
0.8 V to 2.7 V
2.5 V
10
CC
I
CC
C
V = V
3.5
i
I
CC
†
All typical values are at T = 25°C.
A
switching characteristics over recommended operating free-air temperature range, C = 15 pF
L
(unless otherwise noted) (see Figure 1)
V
= 1.2 V
0.1 V
V
= 1.5 V
0.1 V
V
= 1.8 V
V
= 2.5 V
0.2 V
CC
CC
CC
0.15 V
CC
V
= 0.8 V
CC
TYP
5.8
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN MAX
0.7
MIN MAX
0.6 2.3
MIN TYP MAX
MIN MAX
‡
‡
‡
‡
‡
t
pd
A
4
ns
Y
‡
This information was not available at the time of publication.
4
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SCES375J − SEPTEMBER 2001 − REVISED NOVEMBER 2003
switching characteristics over recommended operating free-air temperature range, C = 30 pF
L
(unless otherwise noted) (see Figure 1)
V
= 1.8 V
V
= 2.5 V
0.2 V
CC
0.15 V
CC
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN TYP MAX
MIN MAX
t
pd
A
0.7
1.6
2.5
0.5
2.5
ns
Y
operating characteristics, T = 25°C
A
V
= 0.8 V
CC
TYP
V
= 1.2 V
CC
TYP
V
CC
= 1.5 V
V
CC
= 1.8 V
V
CC
= 2.5 V
TEST
PARAMETER
UNIT
CONDITIONS
TYP
TYP
TYP
Power dissipation
capacitance
C
f = 10 MHz
14
15
15
16
19
pF
pd
5
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SCES375J − SEPTEMBER 2001 − REVISED NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
2 × V
CC
TEST
S1
S1
Open
R
L
t
t
/t
Open
From Output
Under Test
PLH PHL
GND
t
/t
2 × V
CC
GND
PLZ PZL
/t
PHZ PZH
C
L
R
L
(see Note A)
V
∆
C
L
R
V
CC
L
0.8 V
2 kΩ
2 kΩ
2 kΩ
2 kΩ
2 kΩ
1 kΩ
500 Ω
0.1 V
0.1 V
15 pF
1.2 V 0.1 V
1.5 V 0.1 V
1.8 V 0.15 V
2.5 V 0.2 V
1.8 V 0.15 V
2.5 V 0.2 V
15 pF
15 pF
15 pF
15 pF
30 pF
30 pF
LOAD CIRCUIT
0.1 V
0.15 V
0.15 V
0.15 V
0.15 V
V
CC
Timing Input
V
CC
/2
0 V
t
w
t
t
h
su
V
CC
V
CC
V
CC
/2
V
CC
/2
Input
V
CC
/2
V
CC
/2
Data Input
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
V
CC
CC
Output
Control
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
Input
0 V
0 V
t
t
t
t
t
PHL
/2
PZL
PLZ
+ V
PLH
PHL
Output
Waveform 1
V
V
V
V
OH
CC
V
/2
/2
V
V
/2
/2
V
CC
Output
CC
CC
S1 at 2 × V
(see Note B)
V
V
CC
OL
∆
OL
OL
t
t
t
PLH
/2
PZH
PHZ
Output
Waveform 2
S1 at GND
V
OH
V
V
OH
− V
OH
∆
V
CC
V
CC
CC
Output
≈0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, slew rate ≥ 1 V/ns.
O
D. The outputs are measured one at a time with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
.
.
PLZ
PZL
PLH
PHZ
PZH
PHL
dis
are the same as t
en
are the same as t .
pd
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDS025C – FEBRUARY 1997 – REVISED FEBRUARY 2002
DCK (R-PDSO-G5)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
M
0,10
0,65
5
4
0,13 NOM
1,40 2,40
1,10 1,80
1
3
Gage Plane
2,15
1,85
0,15
0°–8°
0,46
0,26
Seating Plane
0,10
1,10
0,80
0,10
0,00
4093553-2/D 01/02
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-203
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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相关型号:
UL1042
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