SN74AUP1G00DCKTE4 [TI]
LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE; 低功耗单路2输入正与非门
| 型号： | SN74AUP1G00DCKTE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE |
| 文件： | 总17页 (文件大小：552K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74AUP1G00
LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
www.ti.com
SCES604E–SEPTEMBER 2004–REVISED MAY 2007
FEATURES
•
•
•
Available in the Texas Instruments
NanoFree™ Package
•
•
Optimized for 3.3-V Operation
3.6-V I/O Tolerant to Support Mixed-Mode
Signal Operation
Low Static-Power Consumption
(ICC = 0.9 µA Max)
•
•
•
tpd = 4.8 ns Max at 3.3 V
Low Dynamic-Power Consumption
(Cpd = 4 pF Typ at 3.3 V)
Suitable for Point-to-Point Applications
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
•
•
Low Input Capacitance (Ci = 1.5 pF Typ)
Low Noise Overshoot and Undershoot
<10% of VCC
•
ESD Performance Tested Per JESD 22
–
2000-V Human-Body Model
(A114-B, Class II)
•
•
Ioff Supports Partial-Power-Down Mode
Operation
–
–
200-V Machine Model (A115-A)
Input Hysteresis Allows Slow Input Transition
and Better Switching Noise Immunity at Input
(Vhys = 250 mV Typ at 3.3 V)
1000-V Charged-Device Model (C101)
•
ESD Protection Exceeds ±5000 V With
Human-Body Model
•
Wide Operating VCC Range of 0.8 V to 3.6 V
YFP PACKAGE
(BOTTOM VIEW)
DRY PACKAGE
(TOP VIEW)
GND
1
2
3
6
5
4
A
B
VCC
NC
Y
DNU
VCC
6
A
GND
DNU – Do not use
NC – No internal connection
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable
applications. This family ensures a very low static and dynamic power consumption across the entire VCC range
of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see
Figure 1 and Figure 2).
This single 2-input positive-NAND gate performs the Boolean function Y = A • B or Y = A + B in positive logic.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains
Copyright © 2004–2007, Texas Instruments Incorporated
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74AUP1G00
LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
www.ti.com
SCES604E–SEPTEMBER 2004–REVISED MAY 2007
Switching Characteristics
†
at 25 MHz
3.5
3
2.5
2
Input
Output
1.5
1
0.5
0
−0.5
20
Time − ns
10
15
0
5
25
35 40 45
30
†
AUP1G08 data at C = 15 pF
L
Figure 1. AUP – The Lowest-Power Family
Figure 2. Excellent Signal Integrity
ORDERING INFORMATION
TA
PACKAGE(1)(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(3)
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YFP
(Pb-free)
Reel of 3000
Reel of 3000
SN74AUP1G00YFPR
PREVIEW
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP
(Pb-free)
SN74AUP1G00YZPR
_ _ _HA_
–40°C to 85°C
SON – DRY
Reel of 5000
Reel of 3000
Reel of 3000
Reel of 4000
SN74AUP1G00DRYR
SN74AUP1G00DBVR
SN74AUP1G00DCKR
SN74AUP1G00DRLR
PREVIEW
H00_
SOT (SOT-23) – DBV
SOT (SC-70) – DCK
SOT (SOT-553) – DRL
HA_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(3) DBV/DCK/DRL/DRY: The actual top-side marking has one additional character that designates the assembly/test site.
YFP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
FUNCTION TABLE
INPUTS
OUTPUT
Y
A
L
B
L
H
H
H
L
L
H
L
H
H
H
LOGIC DIAGRAM (POSITIVE LOGIC)
1
4
A
B
Y
2
2
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SN74AUP1G00
LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
www.ti.com
SCES604E–SEPTEMBER 2004–REVISED MAY 2007
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
MAX UNIT
VCC
VI
Supply voltage range
Input voltage range(2)
Voltage range applied to any output in the high-impedance or power-off state(2)
Output voltage range in the high or low state(2)
4.6
4.6
4.6
V
V
VO
VO
IIK
V
–0.5 VCC + 0.5
V
Input clamp current
VI < 0
50
50
mA
mA
mA
mA
IOK
IO
Output clamp current
VO < 0
Continuous output current
Continuous current through VCC or GND
20
50
DBV package
DCK package
DRL package
DRY package
YFP/YZP package
206
252
θJA
Package thermal impedance(3)
142 °C/W
234
132
Tstg
Storage temperature range
–65
150
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
3
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SN74AUP1G00
LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
www.ti.com
SCES604E–SEPTEMBER 2004–REVISED MAY 2007
Recommended Operating Conditions(1)
MIN
MAX UNIT
VCC
Supply voltage
0.8
3.6
V
VCC = 0.8 V
VCC
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 0.8 V
0.65 × VCC
VIH
High-level input voltage
V
1.6
2
0
0.35 × VCC
0.7
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VIL
Low-level input voltage
V
0.9
VI
Input voltage
0
0
3.6
V
V
VO
Output voltage
VCC
–20
–1.1
–1.7
–1.9
–3.1
–4
VCC = 0.8 V
VCC = 1.1 V
VCC = 1.4 V
VCC = 1.65
µA
IOH
High-level output current
mA
A
VCC = 2.3 V
VCC = 3 V
VCC = 0.8 V
VCC = 1.1 V
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 3 V
20
1.1
1.7
IOL
Low-level output current
1.9
mA
3.1
4
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
VCC = 0.8 V to 3.6 V
200
85
ns/V
TA
–40
°C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
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SN74AUP1G00
LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
www.ti.com
SCES604E–SEPTEMBER 2004–REVISED MAY 2007
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
TA = 25°C
TA = –40°C to 85°C
PARAMETER
TEST CONDITIONS
IOH = –20 µA
VCC
UNIT
MIN TYP
VCC – 0.1
MAX
MIN
VCC – 0.1
0.7 × VCC
1.03
MAX
0.8 V to 3.6 V
1.1 V
IOH = –1.1 mA
IOH = –1.7 mA
IOH = –1.9 mA
IOH = –2.3 mA
IOH = –3.1 mA
IOH = –2.7 mA
IOH = –4 mA
IOL = 20 µA
0.75 × VCC
1.11
1.4 V
1.65 V
1.32
1.3
VOH
V
2.05
1.97
2.3 V
3 V
1.9
1.85
2.72
2.67
2.6
2.55
0.8 V to 3.6 V
1.1 V
0.1
0.3 × VCC
0.31
0.1
0.3 × VCC
0.37
IOL = 1.1 mA
IOL = 1.7 mA
IOL = 1.9 mA
IOL = 2.3 mA
IOL = 3.1 mA
IOL = 2.7 mA
IOL = 4 mA
1.4 V
1.65 V
0.31
0.35
VOL
V
0.31
0.33
2.3 V
0.44
0.45
0.31
0.33
3 V
0.44
0.45
A or
B input
II
VI = GND to 3.6 V
0 V to 3.6 V
0.1
0.5
µA
Ioff
VI or VO = 0 V to 3.6 V
VI or VO = 0 V to 3.6 V
0 V
0.2
0.2
0.6
0.6
µA
µA
∆Ioff
0 V to 0.2 V
VI = GND or (VCC to 3.6 V),
IO = 0
ICC
0.8 V to 3.6 V
0.5
40
0.9
50
µA
µA
∆ICC
VI = VCC – 0.6 V(1), IO = 0
VI = VCC or GND
VO = GND
3.3 V
0 V
1.5
1.5
3
Ci
pF
pF
3.6 V
0 V
Co
(1) One input at VCC – 0.6 V, other input at VCC or GND
Switching Characteristics
over recommended operating free-air temperature range, CL = 5 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
TYP
16.6
7
MAX
MIN MAX
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
2.6
2.9
2
13.8
9.2
7.1
4.9
3.8
2.1
2.9
2
17.1
11.1
9
5
tpd
A or B
Y
ns
4
1.3
1
2.9
2.4
1.3
1
6.2
4.8
5
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SN74AUP1G00
LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
www.ti.com
SCES604E–SEPTEMBER 2004–REVISED MAY 2007
Switching Characteristics
over recommended operating free-air temperature range, CL = 10 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
TYP
18.9
8
MAX
MIN MAX
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
1.5
2.9
2
15.7
10.5
8.2
1
2.9
2
18.8
12.1
9.8
5.8
4.7
3.4
2.9
tpd
A or B
Y
ns
1.3
1
5.7
1.3
1
6.8
4.5
5.2
Switching Characteristics
over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
TYP
21.3
9
MAX
MIN MAX
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
3.6
2.9
2
17.3
11.6
9.2
3.1
2.9
2
21.5
14
6.5
5.3
3.9
3.3
tpd
A or B
Y
ns
11.4
8
1.3
1
6.4
1.3
1
5.1
6.4
Switching Characteristics
over recommended operating free-air temperature range, CL = 30 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
TYP
28.4
11.9
8.6
MAX
MIN MAX
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
4.9
2.9
2
21.9
14.7
11.5
8.1
4.4
2.9
2
27.1
17.7
14.2
10
tpd
A or B
Y
ns
7.1
1.3
1
5.3
1.3
1
4.5
6.5
8
Operating Characteristics
TA = 25°C
PARAMETER
TEST CONDITIONS
VCC
TYP UNIT
0.8 V
4
4
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
4
Cpd
Power dissipation capacitance
f = 10 MHz
pF
4
4
4
6
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SN74AUP1G00
LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
www.ti.com
SCES604E–SEPTEMBER 2004–REVISED MAY 2007
PARAMETER MEASUREMENT INFORMATION
(Propagation Delays, Setup and Hold Times, and Pulse Width)
From Output
Under Test
C
L
1 MΩ
(see Note A)
LOAD CIRCUIT
V
= 1.2 V
V
= 1.5 V
V
= 1.8 V
V
= 2.5 V
V
= 3.3 V
CC
CC
CC
CC
CC
V
CC
= 0.8 V
± 0.1 V
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
/2 /2 /2
± 0.1 V
± 0.15 V
± 0.2 V
± 0.3 V
C
L
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
V
M
V
CC
V
CC
V
V /2
CC
V
/2
CC
V
/2
CC
CC
V
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
t
w
V
CC
V /2
CC
V /2
CC
Input
V
I
0 V
V
M
V
M
Input
VOLTAGE WAVEFORMS
PULSE DURATION
0 V
t
t
t
PHL
PLH
V
V
OH
V
CC
V
V
V
M
M
Output
Timing Input
Data Input
V /2
CC
OL
0 V
t
PHL
PLH
t
su
t
h
V
V
OH
V
CC
V
M
M
Output
V /2
CC
V
/2
CC
OL
0 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
NOTES: A. C includes probe and jig capacitance.
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, slew rate ≥ 1 V/ns.
O
C. The outputs are measured one at a time, with one transition per measurement.
D.
t
and t are the same as t .
PHL pd
PLH
E. All parameters and waveforms are not applicable to all devices.
Figure 3. Load Circuit and Voltage Waveforms
7
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SN74AUP1G00
LOW-POWER SINGLE 2-INPUT POSITIVE-NAND GATE
www.ti.com
SCES604E–SEPTEMBER 2004–REVISED MAY 2007
PARAMETER MEASUREMENT INFORMATION
(Enable and Disable Times)
2 × V
CC
S1
5 kΩ
From Output
Under Test
GND
TEST
S1
t
/t
2 × V
C
PLZ PZL
CC
L
5 kΩ
(see Note A)
t
/t
GND
PHZ PZH
LOAD CIRCUIT
V
= 1.2 V
V
= 1.5 V
V
= 1.8 V
V
= 2.5 V
V
= 3.3 V
CC
CC
CC
CC
CC
V
CC
= 0.8 V
± 0.1 V
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
/2 /2 /2
± 0.1 V
± 0.15 V
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
/2 /2 /2
± 0.2 V
± 0.3 V
C
L
V
M
V
CC
V
CC
V
V
CC
V
V
CC
CC
CC
V
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
∆
0.1 V
0.1 V
0.1 V
0.15 V
0.15 V
0.3 V
V
CC
Output
Control
V /2
CC
V /2
CC
0 V
t
t
PZL
PLZ
Output
V
V
CC
Waveform 1
V
/2
/2
CC
S1 at 2 × V
V
+ V
CC
∆
OL
OL
(see Note B)
t
t
PHZ
PZH
Output
Waveform 2
S1 at GND
V
OH
V
OH
- V
∆
V
CC
≈0 V
(see Note B)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, slew rate ≥ 1 V/ns.
O
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
t
t
and t
and t
are the same as t
.
dis
.
PLZ
PHZ
are the same as t
PZL
PZH
en
G. All parameters and waveforms are not applicable to all devices.
Figure 4. Load Circuit and Voltage Waveforms
8
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PACKAGE OPTION ADDENDUM
www.ti.com
22-Oct-2007
PACKAGING INFORMATION
Orderable Device
SN74AUP1G00DBVR
SN74AUP1G00DBVRE4
SN74AUP1G00DBVRG4
SN74AUP1G00DBVT
SN74AUP1G00DBVTE4
SN74AUP1G00DBVTG4
SN74AUP1G00DCKR
SN74AUP1G00DCKRE4
SN74AUP1G00DCKRG4
SN74AUP1G00DCKT
SN74AUP1G00DCKTE4
SN74AUP1G00DCKTG4
SN74AUP1G00DRLR
SN74AUP1G00DRLRG4
SN74AUP1G00YZPR
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT-23
DBV
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SC70
DBV
DBV
DBV
DBV
DBV
DCK
DCK
DCK
DCK
DCK
DCK
DRL
DRL
YZP
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT
4000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT
4000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
WCSP
3000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
22-Oct-2007
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
180
180
180
180
180
180
(mm)
SN74AUP1G00DBVR
SN74AUP1G00DBVT
SN74AUP1G00DCKR
SN74AUP1G00DCKT
SN74AUP1G00DRLR
SN74AUP1G00YZPR
DBV
DBV
DCK
DCK
DRL
YZP
5
5
5
5
5
5
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 12
9
9
9
9
9
8
3.23
3.23
2.24
2.24
1.78
1.02
3.17
3.17
2.34
2.34
1.78
1.52
1.37
1.37
1.22
1.22
0.69
0.66
4
4
4
4
4
4
8
8
8
8
8
8
Q3
Q3
Q3
Q3
Q3
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
SN74AUP1G00DBVR
SN74AUP1G00DBVT
SN74AUP1G00DCKR
SN74AUP1G00DCKT
SN74AUP1G00DRLR
SN74AUP1G00YZPR
DBV
DBV
DCK
DCK
DRL
YZP
5
5
5
5
5
5
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 12
202.0
202.0
202.0
202.0
202.0
220.0
201.0
201.0
201.0
201.0
201.0
220.0
28.0
28.0
28.0
28.0
28.0
0.0
Pack Materials-Page 2
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Amplifiers
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DSP
Applications
Audio
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/audio
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Digital Control
Military
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
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Interface
interface.ti.com
logic.ti.com
Logic
Power Mgmt
Microcontrollers
RFID
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lpw
Telephony
Low Power
Wireless
Video & Imaging
Wireless
www.ti.com/wireless
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