SN74AUP1G04_101 [TI]
LOW-POWER SINGLE INVERTER GATE; 低功耗单路反相门型号: | SN74AUP1G04_101 |
厂家: | TEXAS INSTRUMENTS |
描述: | LOW-POWER SINGLE INVERTER GATE |
文件: | 总21页 (文件大小:940K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN74AUP1G04
www.ti.com
SCES571H –JUNE 2004–REVISED MARCH 2010
LOW-POWER SINGLE INVERTER GATE
Check for Samples: SN74AUP1G04
1
FEATURES
•
•
•
Available in the Texas Instruments NanoStar™
Package
•
•
•
Wide Operating VCC Range of 0.8 V to 3.6 V
Optimized for 3.3-V Operation
Low Static-Power Consumption
(ICC = 0.9 mA Max)
3.6-V I/O Tolerant to Support Mixed-Mode
Signal Operation
Low Dynamic-Power Consumption
(Cpd = 4.1 pF Typ at 3.3 V)
•
•
•
tpd = 3.9 ns Max at 3.3 V
Suitable for Point-to-Point Applications
•
•
Low Input Capacitance (Ci = 1.5 pF Typ)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
Low Noise − Overshoot and Undershoot
<10% of VCC
•
ESD Performance Tested Per JESD 22
•
•
Ioff Supports Partial-Power-Down Mode
Operation
–
2000-V Human-Body Model
(A114-B, Class II)
Input Hysteresis Allows Slow Input Transition
and Better Switching Noise Immunity at the
Input (Vhys = 250 mV Typ at 3.3 V)
–
1000-V Charged-Device Model (C101)
DBV PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
DRL PACKAGE
(TOP VIEW)
1
2
3
5
N.C.
A
VCC
N.C.
A
VCC
1
2
5
1
5
N.C.
A
VCC
4
GND
Y
2
3
3
4
GND
Y
4
Y
GND
DSF PACKAGE
(TOP VIEW)
YFP PACKAGE
(TOP VIEW)
DRY PACKAGE
(TOP VIEW)
1
2
3
6
5
4
A2
N.C.
A
A1
1
2
4
3
VCC
N.C.
Y
A
VCC
Y
1
2
3
6
5
4
N.C.
A
VCC
N.C.
Y
GND B1
B2
GND
GND
N.C. – No internal connection.
DNU – Do not use
See mechancial drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
The AUP family is TI's premier solution to the industry's low power needs in battery-powered portable
applications. This family ensures a very low static and dynamic power consumption across the entire VCC range
of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see
Figure 1 and Figure 2).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004–2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74AUP1G04
SCES571H –JUNE 2004–REVISED MARCH 2010
www.ti.com
Switching Characteristics
at 25 MHz†
Static-Power Consumption
(mA)
Dynamic-Power Consumption
(pF)
3.5
3
100%
80%
100%
80%
2.5
2
Input
Output
60%
40%
60%
40%
3.3-V
3.3-V
1.5
1
†
Logic
Logic†
0.5
0
20%
0%
20%
0%
AUP
AUP
-0.5
10
15 20
Time (ns)
0
5
25
35 40 45
30
† Single, dual, and triple gates.
† AUP1G04 data at C = 15 pF.
L
Figure 1. AUP – The Lowest-Power Family
Figure 2. Excellent Signal Integrity
This single inverter gate performs the Boolean function Y = A.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION(1)
ORDERABLE PART
NUMBER
TOP-SIDE
TA
PACKAGE(2)
MARKING(3)
NanoStar™ – WCSP (DSBGA)
0.23-mm large bump – YFP
QFN – DRY
Reel of 3000
SN74AUP1G04YFPR
_ _ _ H C _
Reel of 5000
Reel of 5000
Reel of 3000
Reel of 3000
Reel of 4000
SN74AUP1G04DRYR
SN74AUP1G04DSFR
SN74AUP1G04DBVR
SN74AUP1G04DCKR
SN74AUP1G04DRLR
HC
uQFN – DSF
HC
–40°C to 85°C
SOT (SOT-23) – DBV
SOT (SC-70) – DCK
SOT (SOT-553) – DRL
H04_
HC_
HC_
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
YFP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
FUNCTION TABLE
INPUT
A
INPUT
B
H
L
L
H
2
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SN74AUP1G04
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SCES571H –JUNE 2004–REVISED MARCH 2010
LOGIC DIAGRAM (POSITIVE LOGIC)
(DBV, DCK, DRL, and DRY Packages)
2
4
A
Y
(YFP Package)
1
3
A
Y
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
MAX UNIT
VCC
VI
Supply voltage range
Input voltage range(2)
Voltage range applied to any output in the high-impedance or power-off state(2)
Output voltage range in the high or low state(2)
4.6
4.6
4.6
V
V
VO
VO
IIK
V
–0.5 VCC + 0.5
V
Input clamp current
VI < 0
–50
–50
±20
±50
206
252
142
300
234
132
mA
mA
mA
mA
IOK
IO
Output clamp current
VO < 0
Continuous output current
Continuous current through VCC or GND
DBV package
DCK package
DRL package
DSF package
DRY package
YFP package
qJA
Package thermal impedance(3)
°C/W
°C
Tstg
Storage temperature range
–65
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
Copyright © 2004–2010, Texas Instruments Incorporated
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SN74AUP1G04
SCES571H –JUNE 2004–REVISED MARCH 2010
www.ti.com
RECOMMENDED OPERATING CONDITIONS(1)
MIN
MAX UNIT
VCC
Supply voltage
0.8
3.6
V
VCC = 0.8 V
VCC
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 0.8 V
0.65 × VCC
VIH
High-level input voltage
V
1.6
2
0
0.35 × VCC
0.7
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VIL
Low-level input voltage
V
0.9
VI
Input voltage
0
0
3.6
V
V
VO
Output voltage
VCC
–20
–1.1
–1.7
–1.9
–3.1
–4
VCC = 0.8 V
VCC = 1.1 V
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 3 V
mA
IOH
High-level output current
mA
mA
VCC = 0.8 V
VCC = 1.1 V
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 3 V
20
1.1
1.7
IOL
Low-level output current
1.9
mA
3.1
4
Δt/Δv
Input transition rise or fall rate
Operating free-air temperature
VCC = 0.8 V to 3.6 V
200
85
ns/V
°C
TA
–40
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
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SN74AUP1G04
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SCES571H –JUNE 2004–REVISED MARCH 2010
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
TA = 25°C
TA = –40°C to 85°C
UNIT
PARAMETER
TEST CONDITIONS
VCC
MIN
VCC – 0.1
0.75 × VCC
1.11
TYP
MAX
MIN
VCC – 0.1
0.7 × VCC
1.03
MAX
IOH = –20 mA
0.8 V to 3.6 V
1.1 V
IOH = –1.1 mA
IOH = –1.7 mA
IOH = –1.9 mA
IOH = –2.3 mA
IOH = –3.1 mA
IOH = –2.7 mA
IOH = –4 mA
1.4 V
1.65 V
1.32
1.3
VOH
V
2.05
1.97
2.3 V
3 V
1.9
1.85
2.72
2.67
2.6
2.55
IOL = 20 mA
0.8 V to 3.6 V
1.1 V
0.1
0.3 × VCC
0.31
0.1
0.3 × VCC
0.37
IOL = 1.1 mA
IOL = 1.7 mA
1.4 V
IOL = 1.9 mA
1.65 V
0.31
0.35
VOL
V
IOL = 2.3 mA
0.31
0.33
2.3 V
3 V
IOL = 3.1 mA
0.44
0.45
IOL = 2.7 mA
0.31
0.33
IOL = 4 mA
0.44
0.45
II
A input
VI = GND to 3.6 V
VI or VO = 0 V to 3.6 V
VI or VO = 0 V to 3.6 V
0 V to 3.6 V
0 V
0.1
0.5
mA
mA
mA
Ioff
ΔIoff
0.2
0.6
0 V to 0.2 V
0.2
0.6
VI = GND or IO = 0
(VCC to 3.6 V)
ICC
0.8 V to 3.6 V
0.5
40
0.9
50
mA
mA
ΔICC
VI = VCC – 0.6 V, IO = 0
3.3 V
0 V
1.5
1.5
2.5
CI
VI = VCC or GND
pF
pF
3.6 V
3.6 V
Co
VO = VCC or GND
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, CL = 5 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
TYP
15.6
5.9
MAX
MIN MAX
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
3.3
2.5
2.2
1.7
1.4
10.8
7
2.1
1.6
1.4
1.3
1.2
13.5
8.8
7
4.2
tpd
A
Y
ns
3.4
5.9
4
2.5
4.9
3.9
2.1
3.2
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SCES571H –JUNE 2004–REVISED MARCH 2010
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SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, CL = 10 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
TYP
17.7
6.9
5
MAX
MIN MAX
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
3.9
3
12.2
8.1
6.9
4.6
3.8
3.1
2.5
2.1
1.7
1.5
15
9.9
7.9
5.6
4.5
tpd
A
Y
ns
2.6
2.1
1.8
4
3
2.5
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
TYP
19.5
7.8
MAX
MIN MAX
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
4.7
3.7
3.2
2.5
2.2
13
8.6
7.4
5.1
4.2
3.8
3.1
2.6
2.1
1.9
15.9
10.6
8.5
6.1
5
5.6
tpd
A
Y
ns
4.6
3.5
2.9
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, CL = 30 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
TYP
25.4
10.4
7.6
6.3
4.8
4
MAX
MIN MAX
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
6.8
5.3
4.6
3.6
3.2
16
10.8
9.2
6.1
4.8
4.1
3.3
2.9
19
12.9
10.5
7.6
tpd
A
Y
ns
6.5
5.4
6.2
OPERATING CHARACTERISTICS
TA = 25°C
PARAMETER
TEST CONDITIONS
VCC
0.8 V
TYP
UNIT
3.9
3.9
3.9
3.9
3.9
4.1
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
Cpd
Power dissipation capacitance
f = 10 MHz
pF
6
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SCES571H –JUNE 2004–REVISED MARCH 2010
PARAMETER MEASUREMENT INFORMATION
(Propagation Delays, Setup and Hold Times, and Pulse Width)
From Output
Under Test
CL
1 MW
(see Note A)
LOAD CIRCUIT
VCC = 1.2 V
VCC = 1.5 V
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
VCC = 0.8 V
± 0.1 V
± 0.1 V
± 0.15 V
± 0.2 V
± 0.3 V
CL
VM
VI
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
VCC/2
VCC
VCC/2
VCC
VCC/2
VCC
VCC/2
VCC
VCC/2
VCC
VCC/2
VCC
tw
VCC
0 V
VCC/2
VCC/2
Input
VI
VM
VM
Input
VOLTAGE WAVEFORMS
PULSE DURATION
0 V
tPHL
tPLH
VOH
VOL
VCC
0 V
VM
VM
Output
Timing Input
VCC/2
tPHL
tPLH
tsu
th
VOH
VOL
VCC
0 V
VM
VM
Output
VCC/2
VCC/2
Data Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 W, tr/tf = 3 ns.
C. The outputs are measured one at a time, with one transition per measurement.
D. tPLH and tPHL are the same as tpd.
E. All parameters and waveforms are not applicable to all devices.
Figure 3. Load Circuit and Voltage Waveforms
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PARAMETER MEASUREMENT INFORMATION
(Enable and Disable Times)
2 ´ VCC
S1
5 kW
From Output
Under Test
GND
TEST
S1
tPLZ/tPZL
tPHZ/tPZH
2 ´ VCC
CL
5 kW
GND
(see Note A)
LOAD CIRCUIT
VCC = 0.8 V
VCC = 1.2 V
VCC = 1.5 V
VCC = 1.8 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.1 V
± 0.1 V
± 0.15 V
± 0.3 V
CL
VM
VI
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
VCC/2
VCC
VCC/2
VCC
VCC/2
VCC
VCC/2
VCC
VCC/2
VCC
VCC/2
VCC
VD
0.1 V
0.1 V
0.1 V
0.15 V
0.15 V
0.3 V
VCC
0 V
Output
Control
VCC/2
VCC/2
tPZL
tPLZ
Output
Waveform 1
S1 at 2 ´ VCC
VCC
VOL
VCC/2
VOL + VD
tPHZ
OH - VD
(see Note B)
tPZH
Output
Waveform 2
S1 at GND
VOH
V
VCC/2
»0 V
(see Note B)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 W, tr/tf = 3 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis
F. tPZL and tPZH are the same as ten
G. All parameters and waveforms are not applicable to all devices.
.
.
Figure 4. Load Circuit and Voltage Waveforms
8
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PACKAGE OPTION ADDENDUM
www.ti.com
23-Apr-2010
PACKAGING INFORMATION
Orderable Device
SN74AUP1G04DBVR
SN74AUP1G04DBVRE4
SN74AUP1G04DBVRG4
SN74AUP1G04DBVT
SN74AUP1G04DBVTE4
SN74AUP1G04DBVTG4
SN74AUP1G04DCKR
SN74AUP1G04DCKRE4
SN74AUP1G04DCKRG4
SN74AUP1G04DCKT
SN74AUP1G04DCKTE4
SN74AUP1G04DCKTG4
SN74AUP1G04DRLR
SN74AUP1G04DRLRG4
SN74AUP1G04DRYR
SN74AUP1G04DSFR
SN74AUP1G04YFPR
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT-23
DBV
5
5
5
5
5
5
5
5
5
5
5
5
5
5
6
6
4
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SC70
DBV
DBV
DBV
DBV
DBV
DCK
DCK
DCK
DCK
DCK
DCK
DRL
DRL
DRY
DSF
YFP
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT
4000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT
4000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SON
5000 Green (RoHS &
no Sb/Br)
NIPDAU
NIPDAU
SNAGCU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
SON
5000 Green (RoHS &
no Sb/Br)
DSBGA
3000 Green (RoHS &
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
23-Apr-2010
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Jul-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74AUP1G04DBVR
SN74AUP1G04DBVR
SN74AUP1G04DBVT
SN74AUP1G04DCKR
SN74AUP1G04DCKT
SN74AUP1G04DCKT
SN74AUP1G04DRLR
SN74AUP1G04DRYR
SN74AUP1G04DSFR
SN74AUP1G04YFPR
SOT-23
SOT-23
SOT-23
SC70
DBV
DBV
DBV
DCK
DCK
DCK
DRL
DRY
DSF
YFP
5
5
5
5
5
5
5
6
6
4
3000
3000
250
180.0
178.0
180.0
180.0
178.0
180.0
180.0
180.0
180.0
178.0
9.2
9.0
9.2
9.2
9.0
9.2
9.2
8.4
8.4
9.2
3.23
3.23
3.23
2.24
2.4
3.17
3.17
3.17
2.34
2.5
1.37
1.37
1.37
1.22
1.2
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q1
Q2
Q1
3000
250
SC70
SC70
250
2.24
1.78
1.25
1.16
0.89
2.34
1.78
1.6
1.22
0.69
0.7
SOT
4000
5000
5000
3000
SON
SON
1.16
0.89
0.63
0.58
DSBGA
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Jul-2010
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74AUP1G04DBVR
SN74AUP1G04DBVR
SN74AUP1G04DBVT
SN74AUP1G04DCKR
SN74AUP1G04DCKT
SN74AUP1G04DCKT
SN74AUP1G04DRLR
SN74AUP1G04DRYR
SN74AUP1G04DSFR
SN74AUP1G04YFPR
SOT-23
SOT-23
SOT-23
SC70
DBV
DBV
DBV
DCK
DCK
DCK
DRL
DRY
DSF
YFP
5
5
5
5
5
5
5
6
6
4
3000
3000
250
202.0
180.0
202.0
202.0
180.0
202.0
202.0
202.0
202.0
220.0
201.0
180.0
201.0
201.0
180.0
201.0
201.0
201.0
201.0
220.0
28.0
18.0
28.0
28.0
18.0
28.0
28.0
28.0
28.0
35.0
3000
250
SC70
SC70
250
SOT
4000
5000
5000
3000
SON
SON
DSBGA
Pack Materials-Page 2
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