SN74AUP1G08-Q1 [TI]
汽车类单路 2 输入、0.8V 至 3.6V 低功耗与门;
| 型号： | SN74AUP1G08-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 汽车类单路 2 输入、0.8V 至 3.6V 低功耗与门 |
| 文件： | 总14页 (文件大小：655K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74AUP1G08-Q1
www.ti.com.cn
ZHCSAL9 –DECEMBER 2012
低功耗单路 2 输入正与门
查询样品: SN74AUP1G08-Q1
1
特性
•
•
•
0.8V 至 3.6V 的宽运行 VCC范围
针对 3.3V 运行进行了优化
2
•
具有符合 AEC-Q100 的下列结果：
可耐受 3.6V 输入/输出 (I/O) 以支持混合模式信号
运行
–
–
–
器件温度 1 级：-40°C 至 125°C 的环境运行温
度范围
•
•
•
3.3V 时，tpd=4.3ns（最大值）
器件人体模型 (HBM) 静电放电 (ESD) 分类等级
H2
适合于点到点应用
器件充电器件模型 (CDM) ESD 分类等级 C3B
锁存性能超过 100mA（符合 JESD-78，II 类规范
的要求）
•
•
采用德州仪器的 NanoStar™ 封装
低静态功耗：
ICC=0.9μA（最大值）
•
低动态功耗：3.3V 时的典型值，
Cpd=4.3pF
•
•
低输入电容：Ci=1.5pF（典型值）
低噪声：过冲和下冲
小于 VCC的 10%
•
•
I关闭支持部分断电模式运行
施密特触发器的运行可实现低输入转换以及输入上
更好的开关噪声抗扰度（Vhys=250mV，这是 3.3V
时的典型值）
DCK PACKAGE
(TOP VIEW)
A
B
V
5
CC
1
2
3
4
Y
GND
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
NanoStar is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
版权 © 2012, Texas Instruments Incorporated
English Data Sheet: SCES847
SN74AUP1G08-Q1
ZHCSAL9 –DECEMBER 2012
www.ti.com.cn
说明
AUP 系列产品是 TI 针对业界对于电池供电便携式应用的低功耗需求的主要解决方案。 此系列可确保在整个 0.8V
至 3.6V 的 VCC 范围内实现超低静态和动态功耗，从而延长电池的使用寿命（请见图 1）。 这个产品还保持了出色
的信号完整性（请见图 2中显示的极低下冲和上冲特性）。
Switching Characteristics
Static-Power Consumption
Dynamic-Power Consumption
(pF)
†
at 25 MHz
(µA)
3.5
3
100%
80%
100%
80%
2.5
2
Input
Output
60%
40%
60%
40%
3.3-V
3.3-V
†
Logic
1.5
1
†
Logic
0.5
0
20%
0%
20%
0%
AUP
AUP
−0.5
20
Time − ns
10
15
0
5
25
35 40 45
30
†
Single, dual, and triple gates
†
AUP1G08 data at C = 15 pF
L
图 1. AUP - 最低功耗系列
图 2. 出色的信号完整性
Y + A • B or Y + A ) B
这个单路 2 输入正与门执行布尔函数：正逻辑中的
。
NanoStar 封装技术是集成电路 (IC) 封装理念的重要突破，这是因为此技术使用芯片作为封装。
该器件完全符合使用 I关闭的部分断电应用的规范要求。 I关闭电路禁用输出，从而可防止其断电时破坏性电流从该器
件回流。
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
TA
ORDERABLE PART NUMBER(2)
TOP-SIDE MARKING
–40°C to 125°C
SN74AUP1G08QDCKRQ1
SIT
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
2
Copyright © 2012, Texas Instruments Incorporated
SN74AUP1G08-Q1
www.ti.com.cn
ZHCSAL9 –DECEMBER 2012
FUNCTION TABLE
INPUTS
OUTPUT
Y
A
L
B
L
L
L
L
H
L
H
H
L
H
H
LOGIC DIAGRAM (POSITIVE LOGIC)
1
A
B
4
Y
2
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
MAX
4.6
UNIT
V
VCC
VI
Supply voltage range
Input voltage range(2)
Voltage range applied to any output in the high-impedance or power-off state(2)
Output voltage range in the high or low state(2)
4.6
V
VO
VO
IIK
4.6
V
–0.5 VCC + 0.5
V
Input clamp current
VI < 0
–50
–50
±20
±50
mA
mA
mA
mA
°C
kV
V
IOK
IO
Output clamp current
VO < 0
Continuous output current
Continuous current through VCC or GND
Storage temperature range
Tstg
–65
150
2
Human body model (HBM) AEC-Q100 classification level H2
Charged device model (CDM) AEC-Q100 classification level C3B
ESD
ratings
750
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
THERMAL INFORMATION
SN74AUP1G08-Q1
THERMAL METRIC(1)
UNIT
DCK (5 PINS)
304.7
115.3
80.3
θJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
θJCtop
θJB
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
3.5
ψJB
79.4
θJCbot
N/A
(1) 有关传统和新的热 度量的更多信息，请参阅IC 封装热度量应用报告， SPRA953。
Copyright © 2012, Texas Instruments Incorporated
3
SN74AUP1G08-Q1
ZHCSAL9 –DECEMBER 2012
www.ti.com.cn
MAX UNIT
RECOMMENDED OPERATING CONDITIONS(1)
MIN
VCC
Supply voltage
0.8
3.6
V
VCC = 0.8 V
VCC
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 0.8 V
0.65 × VCC
VIH
High-level input voltage
V
1.6
2
0
0.35 × VCC
0.7
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VIL
Low-level input voltage
V
0.9
VI
Input voltage
0
0
3.6
V
V
VO
Output voltage
VCC
–20
VCC = 0.8 V
VCC = 1.1 V
VCC = 1.4 V
VCC = 1.65
μA
–1.1
–1.7
–1.9
–3.1
–4
IOH
High-level output current
mA
μA
VCC = 2.3 V
VCC = 3 V
VCC = 0.8 V
VCC = 1.1 V
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 3 V
20
1.1
1.7
IOL
Low-level output current
1.9
mA
3.1
4
Δt/Δv
Input transition rise or fall rate
Operating free-air temperature
VCC = 0.8 V to 3.6 V
200
ns/V
°C
TA
–40
125
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
TA = 25°C
TA = –40°C to 85°C
TA = 125°C
MIN MAX
PARAMETER TEST CONDITIONS
VCC
UNIT
MIN TYP
MAX
MIN
MAX
0.8 V
to 3.6 V
IOH = –20 μA
VCC – 0.1
VCC – 0.1
VCC – 0.1
IOH = –1.1 mA
IOH = –1.7 mA
1.1 V
1.4 V
0.75 × VCC
1.11
0.7 × VCC
1.03
0.7 × VCC
1.03
IOH = –1.9 mA
IOH = –2.3 mA
IOH = –3.1 mA
IOH = –2.7 mA
IOH = –4 mA
1.65 V
1.32
1.3
1.3
VOH
V
2.05
1.97
1.97
2.3 V
3 V
1.9
1.85
1.85
2.72
2.67
2.67
2.6
2.55
2.55
4
Copyright © 2012, Texas Instruments Incorporated
SN74AUP1G08-Q1
www.ti.com.cn
ZHCSAL9 –DECEMBER 2012
ELECTRICAL CHARACTERISTICS (continued)
over recommended operating free-air temperature range (unless otherwise noted)
TA = 25°C
TA = –40°C to 85°C
TA = 125°C
UNIT
PARAMETER TEST CONDITIONS
VCC
MIN TYP
MAX
MIN
MAX
MIN
MAX
0.8 V
to 3.6 V
IOL = 20 μA
0.1
0.1
0.1
IOL = 1.1 mA
IOL = 1.7 mA
1.1 V
1.4 V
0.3 × VCC
0.31
0.3 × VCC
0.37
0.3 × VCC
0.37
IOL = 1.9 mA
IOL = 2.3 mA
IOL = 3.1 mA
IOL = 2.7 mA
IOL = 4 mA
1.65 V
0.31
0.35
0.35
VOL
V
0.31
0.33
0.33
2.3 V
3 V
0.44
0.45
0.45
0.31
0.33
0.33
0.44
0.45
0.45
A or B
input
0 V
to 3.6 V
II
VI = GND to 3.6 V
0.1
0.2
0.2
0.5
0.6
0.6
0.5
0.8
0.8
μA
μA
μA
VI or VO = 0 V
to 3.6 V
Ioff
ΔIoff
0 V
VI or VO = 0 V
to 3.6 V
0 V
to 0.2 V
VI = GND or
(VCC to 3.6 V),
IO = 0
VI = VCC – 0.6 V(1)
IO = 0
0.8 V
to 3.6 V
ICC
0.5
40
0.9
50
1.2
23
μA
μA
,
ΔICC
3.3 V
0 V
3.6 V
0 V
1.5
1.5
3
Ci
VI = VCC or GND
VO = GND
pF
pF
Co
(1) One input at VCC – 0.6 V, other input at VCC or GND.
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, CL = 5 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = 25°C
TA = –40°C to 85°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
TYP
18
MAX
MIN
MAX
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
2.6
1.4
1
7.3
5.2
4.2
3
12.8
8.7
6.6
4.4
3.5
2.1
0.9
0.5
0.5
0.5
15.6
10.3
8.2
tpd
A or B
Y
ns
1
5.5
1
2.4
4.3
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, CL = 10 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = 25°C
TA = –40°C to 85°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
TYP
21
MAX
MIN
MAX
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
1.5
1
8.5
6.2
5
14.7
10
1
0.5
0.5
0.5
0.5
17.2
11.3
9
tpd
A or B
Y
ns
1
7.7
5.2
4.2
1
3.6
2.9
6.1
4.7
1
Copyright © 2012, Texas Instruments Incorporated
5
SN74AUP1G08-Q1
ZHCSAL9 –DECEMBER 2012
www.ti.com.cn
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = 25°C
TYP
24
TA = –40°C to 85°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
MAX
MIN
MAX
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
3.6
2.3
1.6
1
9.9
16.3
11.1
8.7
3.1
1.8
1.1
0.5
0.5
19.9
13.2
10.6
7.3
7.2
tpd
A or B
Y
ns
5.8
4.3
5.9
1
3.4
4.8
5.9
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, CL = 30 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = 25°C
TYP
32.8
13.1
9.5
TA = –40°C to 85°C
TA = 125°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
4.9
3.4
2.5
1.8
1.5
20.9
14.2
11
4.4
2.9
2
25.5
16.9
13.5
9.4
4.4
2.9
2
27.8
18
tpd
A or B
Y
ns
7.7
19.7
11
5.7
7.6
1.3
1
1.3
1
4.7
6.2
7.5
8.7
OPERATING CHARACTERISTICS
TA = 25°C
PARAMETER
TEST CONDITIONS
VCC
0.8 V
TYP
UNIT
4
4
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
4
Cpd
Power dissipation capacitance
f = 10 MHz
pF
4
4.1
4.3
6
Copyright © 2012, Texas Instruments Incorporated
SN74AUP1G08-Q1
www.ti.com.cn
ZHCSAL9 –DECEMBER 2012
PARAMETER MEASUREMENT INFORMATION
(Propagation Delays, Setup and Hold Times, and Pulse Duration)
From Output
Under Test
C
L
1 MW
(see Note A)
LOAD CIRCUIT
TA = -25°C to 85°C
= 2.5 V = 3.3 V
V
= 1.2 V
V
= 1.5 V
V
CC
= 1.8 V
V
CC
V
CC
CC
CC
V
CC
= 0.8 V
± 0.1 V
± 0.1 V
± 0.15 V
± 0.2 V
± 0.3 V
C
L
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
V
M
V /2
CC
V /2
CC
V /2
CC
V /2
CC
V /2
CC
V /2
CC
V
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
t
w
V
CC
V /2
CC
V /2
CC
Input
V
I
0 V
V
M
V
M
Input
VOLTAGE WAVEFORMS
PULSE DURATION
0 V
t
t
t
PHL
PLH
V
V
OH
V
CC
V
V
V
M
M
Output
Timing Input
V
/2
CC
OL
0 V
t
PHL
PLH
t
t
h
su
V
V
OH
V
CC
V
M
M
Output
V
CC
/2
V /2
CC
Data Input
OL
0 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
NOTES: A. C includes probe and jig capacitance.
L
B. All input pulses are supplied by generators having the following characteristics: PRR≤ 10 MHz, Z = 50 W, slew rate ≥ 1 V/ns.
O
C. The outputs are measured one at a time, with one transition per measurement.
D.
E. All parameters and waveforms are not applicable to all devices.
t
and t are the same as t .
PHL pd
PLH
Figure 3. Load Circuit and Voltage Waveforms
Copyright © 2012, Texas Instruments Incorporated
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SN74AUP1G08-Q1
ZHCSAL9 –DECEMBER 2012
www.ti.com.cn
PARAMETER MEASUREMENT INFORMATION
(Enable and Disable Times)
2 × V
CC
S1
5 kW
From Output
Under Test
GND
TEST
S1
t
/t
PLZ PZL
2 × V
C
L
CC
5 kW
(see Note A)
t /t
PHZ PZH
GND
LOAD CIRCUIT
TA = -25°C to 85°C
= 1.5 V = 1.8 V
V
CC
= 1.2 V
V
V
CC
V
= 2.5 V
V
CC
= 3.3 V
CC
CC
V
CC
= 0.8 V
± 0.1 V
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
/2 /2 /2 /2 /2 /2
± 0.1 V
± 0.15 V
± 0.2 V
± 0.3 V
C
L
V
M
V
CC
V
CC
V
V
CC
V
V
CC
CC
CC
V
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
D
0.1 V
0.1 V
0.1 V
0.15 V
0.15 V
0.3 V
V
CC
Output
V /2
CC
V /2
CC
Control
0 V
t
t
PZL
PLZ
Output
V
V
CC
Waveform 1
S1 at 2 × V
V
/2
/2
CC
V
+ V
CC
D
OL
OL
(see Note B)
t
t
PZH
PHZ
Output
Waveform 2
S1 at GND
V
OH
V
OH
- V
D
V
CC
≈0 V
(see Note B)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR≤ 10 MHz, Z = 50 W, slew rate ≥ 1 V/ns.
O
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
t
and t
and t
are the same as t .
dis
PLZ
PHZ
t
are the same as t .
en
PZL
PZH
G. All parameters and waveforms are not applicable to all devices.
Figure 4. Load Circuit and Voltage Waveforms
8
Copyright © 2012, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
7-Apr-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
SN74AUP1G08QDCKRQ1
ACTIVE
SC70
DCK
5
3000 RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 125
(SIJ, SIT)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
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OTHER QUALIFIED VERSIONS OF SN74AUP1G08-Q1 :
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
7-Apr-2022
Catalog : SN74AUP1G08
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE OUTLINE
DCK0005A
SOT - 1.1 max height
S
C
A
L
E
5
.
6
0
0
SMALL OUTLINE TRANSISTOR
C
2.4
1.8
0.1 C
1.4
1.1
B
1.1 MAX
A
PIN 1
INDEX AREA
1
2
5
NOTE 4
(0.15)
(0.1)
2X 0.65
1.3
2.15
1.85
1.3
4
3
0.33
5X
0.23
0.1
0.0
(0.9)
TYP
0.1
C A B
0.15
0.22
0.08
GAGE PLANE
TYP
0.46
0.26
8
0
TYP
TYP
SEATING PLANE
4214834/C 03/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-203.
4. Support pin may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
DCK0005A
SOT - 1.1 max height
SMALL OUTLINE TRANSISTOR
PKG
5X (0.95)
1
5
5X (0.4)
SYMM
(1.3)
2
3
2X (0.65)
4
(R0.05) TYP
(2.2)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:18X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214834/C 03/2023
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DCK0005A
SOT - 1.1 max height
SMALL OUTLINE TRANSISTOR
PKG
5X (0.95)
1
5
5X (0.4)
SYMM
(1.3)
2
3
2X(0.65)
4
(R0.05) TYP
(2.2)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:18X
4214834/C 03/2023
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
www.ti.com
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