SN74AUP1G80DPWR [TI]
低功耗单路正边沿触发式 D 型触发器 | DPW | 5 | -40 to 85;
| 型号： | SN74AUP1G80DPWR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 低功耗单路正边沿触发式 D 型触发器 | DPW | 5 | -40 to 85 触发器 锁存器 |
| 文件： | 总14页 (文件大小：375K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74AUP1G80
LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
www.ti.com
SCES593B–JULY 2004–REVISED JULY 2005
FEATURES
•
•
•
Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
•
•
•
Wide Operating VCC Range of 0.8 V to 3.6 V
Optimized for 3.3-V Operation
Low Static-Power Consumption
(ICC = 0.9 µA Max)
3.6-V I/O Tolerant to Support Mixed-Mode
Signal Operation
Low Dynamic-Power Consumption
(Cpd = 4.3 pF Typ at 3.3 V)
•
•
•
tpd = 4.3 ns Max at 3.3 V
Suitable for Point-to-Point Applications
•
•
Low Input Capacitance (Ci = 1.5 pF Typ)
Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
Low Noise – Overshoot and Undershoot
<10% of VCC
•
ESD Performance Tested Per JESD 22
•
•
Ioff Supports Partial-Power-Down Mode
Operation
– 2000-V Human-Body Model
(A114-B, Class II)
Schmitt-Trigger Action Allows Slow Input
Transition and Better Switching Noise
Immunity at the Input
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
•
ESD Protection Exceeds ±5000 V With
Human-Body Model
(Vhys = 250 mV Typ at 3.3 V)
DBV PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
YEP OR YZP PACKAGE
(BOTTOM VIEW)
3
4
Q
GND
CLK
D
D
CLK
GND
V
CC
1
2
3
5
1
2
3
5
D
CLK
GND
V
CC
2
1
5
V
CC
4
Q
4
Q
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable
applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range
of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal
integrity (see Figure 2).
Switching Characteristics
Static-Power Consumption
Dynamic-Power Consumption
(pF)
†
at 25 MHz
(µA)
3.5
3
100%
80%
100%
80%
2.5
2
Input
Output
60%
40%
60%
40%
3.3-V
3.3-V
†
Logic
1.5
1
†
Logic
0.5
0
20%
0%
20%
0%
AUP
AUP
−0.5
20
Time − ns
10
15
0
5
25
35 40 45
30
†
Single, dual, and triple gates
†
AUP1G08 data at C = 15 pF
L
Figure 1. AUP – The Lowest-Power Family
Figure 2. Excellent Signal Integrity
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74AUP1G80
LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
www.ti.com
SCES593B–JULY 2004–REVISED JULY 2005
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
This is a single positive-edge-triggered D-type flip-flop. When data at the data (D) input meets the setup time
requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock
triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the
hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING(2)
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
SN74AUP1G80YEPR
_ _ _HX_
Reel of 3000
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
SN74AUP1G80YZPR
–40°C to 85°C
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
SN74AUP1G80DBVR
H80_
SOT (SOT-23) – DBV
SOT (SC-70) – DCK
SN74AUP1G80DBVT
SN74AUP1G80DCKR
HX_
SN74AUP1G80DCKT
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).
FUNCTION TABLE
INPUTS
CLK
OUTPUT
Q
D
H
L
↑
↑
L
H
L or H
X
Q 0
LOGIC DIAGRAM (POSITIVE LOGIC)
CLK
D
CLK
Q
Q
D
2
SN74AUP1G80
LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
www.ti.com
SCES593B–JULY 2004–REVISED JULY 2005
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
–0.5
MAX
4.6
UNIT
V
VCC
VI
Supply voltage range
Input voltage range(2)
Voltage range applied to any output in the high-impedance or power-off state(2)
Voltage range applied to any output in the high or low state(2)
4.6
V
VO
VO
IIK
4.6
V
VCC + 0.5
–50
V
Input clamp current
VI < 0
mA
mA
mA
mA
IOK
IO
Output clamp current
VO < 0
–50
Continuous output current
Continuous current through VCC or GND
±20
±50
DBV package
206
θJA
Package thermal impedance(3)
DCK package
252
°C/W
°C
YEP/YZP package
132
Tstg
Storage temperature range
–65
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions(1)
MIN
MAX UNIT
VCC
Supply voltage
0.8
3.6
V
VCC = 0.8 V
VCC
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 0.8 V
0.65 × VCC
VIH
High-level input voltage
V
1.6
2
0
0.35 × VCC
0.7
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VIL
Low-level input voltage
V
0.9
VI
Input voltage
0
0
3.6
V
V
VO
Output voltage
VCC
–20
–1.1
–1.7
–1.9
–3.1
–4
VCC = 0.8 V
VCC = 1.1 V
VCC = 1.4 V
VCC = 1.65
µA
IOH
High-level output current(2)
mA
µA
VCC = 2.3 V
VCC = 3 V
VCC = 0.8 V
VCC = 1.1 V
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 3 V
20
1.1
1.7
IOL
Low-level output current(2)
1.9
mA
3.1
4
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
VCC = 0.8 V to 3.6 V
200
85
ns/V
TA
–40
°C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
(2) Defined by the signal integrity requirements and design-goal priorities.
3
SN74AUP1G80
LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
www.ti.com
SCES593B–JULY 2004–REVISED JULY 2005
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
TA = –40°C
to 85°C
TA = 25°C
PARAMETER
TEST CONDITIONS
IOH = –20 µA
VCC
UNIT
MIN TYP
VCC – 0.1
MAX
MIN
MAX
0.8 V to 3.6 V
1.1 V
VCC – 0.1
0.7 × VCC
1.03
IOH = –1.1 mA
IOH = –1.7 mA
IOH = –1.9 mA
IOH = –2.3 mA
IOH = –3.1 mA
IOH = –2.7 mA
IOH = –4 mA
IOL = 20 µA
0.75 × VCC
1.11
1.4 V
1.65 V
1.32
1.3
VOH
V
2.05
1.97
2.3 V
3 V
1.9
1.85
2.72
2.67
2.6
2.55
0.8 V to 3.6 V
1.1 V
0.1
0.3 × VCC
0.31
0.1
0.3 × VCC
0.37
IOL = 1.1 mA
IOL = 1.7 mA
IOL = 1.9 mA
IOL = 2.3 mA
IOL = 3.1 mA
IOL = 2.7 mA
IOL = 4 mA
1.4 V
1.65 V
0.31
0.35
VOL
V
0.31
0.33
2.3 V
0.44
0.45
0.31
0.33
3 V
0.44
0.45
D or CLK
input
II
VI = GND to 3.6 V
0 V to 3.6 V
0.1
0.5 µA
Ioff
VI or VO = 0 V to 3.6 V
0 V
0 V to 0.2 V
0.8 V to 3.6 V
3.3 V
0.2
0.2
0.5
40
0.6 µA
0.6 µA
0.9 µA
50 µA
∆Ioff
ICC
VI or VO = 0 V to 3.6 V
VI = GND or VCC to 3.6 V, IO = 0
VI = VCC – 0.6 V,(1) IO = 0
∆ICC
0 V
1.5
1.5
3
Ci
VI = VCC or GND
VO = GND
pF
pF
3.6 V
Co
0 V
(1) One input at VCC – 0.6 V, other input at VCC or GND
4
SN74AUP1G80
LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
www.ti.com
SCES593B–JULY 2004–REVISED JULY 2005
Timing Requirements
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 3)
TA = –40°C
to 85°C
TA = 25°C
VCC
UNIT
TYP
MIN
MAX
0.8 V
20
80
1.2 V ± 0.1 V
1.5 V ± 0.1 V
120
160
220
260
fclock
Clock frequency
MHz
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
0.8 V
5.5
2.5
1.5
1.6
1.7
1.9
6.7
2.4
1.2
0.8
0.6
0.4
8.9
2
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
0.8 V
tw
Pulse duration, CLK high or low
3.4
3.4
0
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
0.8 V
Data high
ns
ns
ns
tsu
Setup time before CLK↑
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
0.8 V
1.3
1.1
0.8
0.7
1
Data low
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
0
0
th
Hold time, data after CLK↑
0
0
0
5
SN74AUP1G80
LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
www.ti.com
SCES593B–JULY 2004–REVISED JULY 2005
Switching Characteristics
over recommended operating free-air temperature range, CL = 5 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
TYP
91
MAX
MIN MAX
0.8 V
90
220
230
240
250
260
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
0.8 V
175
237
269
280
280
17.2
7.1
5
fmax
MHz
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
3.2
1.9
1.7
1.4
1.2
14.9
9.8
7.6
5.3
4.1
2.7
2.1
1.6
1.2
1
16.3
10.3
8.1
tpd
CLK
Q
ns
3.9
2.8
2.2
5.6
4.4
Switching Characteristics
over recommended operating free-air temperature range, CL = 10 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
TYP
68
MAX
MIN MAX
0.8 V
70
170
220
240
250
260
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
0.8 V
128
189
234
273
280
19.4
8.2
fmax
MHz
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
4.4
3.6
2.9
2.2
1.9
16.2
10.7
8.4
3.4
2.6
2.1
1.7
1.4
17.7
11.3
3
5.8
tpd
CLK
Q
ns
4.6
3.3
5.9
6.3
4.9
2.7
4.7
6
SN74AUP1G80
LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
www.ti.com
SCES593B–JULY 2004–REVISED JULY 2005
Switching Characteristics
over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
TYP
52
MAX
MIN MAX
0.8 V
50
130
180
240
250
260
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
0.8 V
98
148
196
249
280
21.5
9.1
6.5
4.2
3.8
3.1
fmax
MHz
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
3
3.2
2.7
2.2
1.9
17.4
11.7
9.2
4.1
3.2
2.6
2.1
1.8
19
12.3
9.8
tpd
CLK
Q
ns
6.5
6.9
5.1
5.5
Switching Characteristics
over recommended operating free-air temperature range, CL = 30 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
TYP
32
MAX
MIN MAX
0.8 V
20
80
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
0.8 V
71
104
133
181
257
28.4
11.8
8.5
120
160
220
260
fmax
MHz
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5.1
4.8
4
20.7
14.1
11.2
7.9
6.2
6.9
2
28.7
16.7
13.3
9.3
tpd
CLK
Q
ns
6.9
3.3
2.9
5.1
3.2
2.8
4.2
6.4
7.5
Operating Characteristics
TA = 25°C
PARAMETER
TEST CONDITIONS
VCC
TYP UNIT
0.8 V
2.5
2.5
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
2.5
pF
Cpd
Power dissipation capacitance
f = 10 MHz
2.5
3
3
7
SN74AUP1G80
LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
www.ti.com
SCES593B–JULY 2004–REVISED JULY 2005
PARAMETER MEASUREMENT INFORMATION
(Propagation Delays, Setup and Hold Times, and Pulse Duration)
From Output
Under Test
C
L
1 MΩ
(see Note A)
LOAD CIRCUIT
V
= 1.2 V
V
= 1.5 V
V
= 1.8 V
V
= 2.5 V
V
= 3.3 V
CC
CC
CC
CC
CC
V
CC
= 0.8 V
± 0.1 V
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
/2 /2 /2
± 0.1 V
± 0.15 V
± 0.2 V
± 0.3 V
C
L
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
V
M
V
CC
V
CC
V
V /2
CC
V
/2
CC
V
/2
CC
CC
V
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
t
w
V
CC
V /2
CC
V /2
CC
Input
V
I
0 V
V
M
V
M
Input
VOLTAGE WAVEFORMS
PULSE DURATION
0 V
t
t
t
PHL
PLH
V
V
OH
V
CC
V
V
V
M
M
Output
Timing Input
Data Input
V /2
CC
OL
0 V
t
PHL
PLH
t
su
t
h
V
V
OH
V
CC
V
M
M
Output
V /2
CC
V
/2
CC
OL
0 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
NOTES: A. C includes probe and jig capacitance.
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t /t = 3 ns.
O
r f
C. The outputs are measured one at a time, with one transition per measurement.
D. and t are the same as t
E. All parameters and waveforms are not applicable to all devices.
t
.
pd
PLH
PHL
Figure 3. Load Circuit and Voltage Waveforms
8
SN74AUP1G80
LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
www.ti.com
SCES593B–JULY 2004–REVISED JULY 2005
PARAMETER MEASUREMENT INFORMATION
(Enable and Disable Times)
2 × V
CC
S1
5 kΩ
From Output
Under Test
GND
TEST
S1
t
/t
2 × V
C
PLZ PZL
CC
L
5 kΩ
(see Note A)
t
/t
GND
PHZ PZH
LOAD CIRCUIT
V
= 1.2 V
V
= 1.5 V
V
= 1.8 V
V
= 2.5 V
V
= 3.3 V
CC
CC
CC
CC
CC
V
CC
= 0.8 V
± 0.1 V
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
/2 /2 /2
± 0.1 V
± 0.15 V
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
/2 /2 /2
± 0.2 V
± 0.3 V
C
L
V
M
V
CC
V
CC
V
V
CC
V
V
CC
CC
CC
V
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
∆
0.1 V
0.1 V
0.1 V
0.15 V
0.15 V
0.3 V
V
CC
Output
Control
V /2
CC
V /2
CC
0 V
t
t
PZL
PLZ
Output
V
V
CC
Waveform 1
V
/2
/2
CC
S1 at 2 × V
V
+ V
CC
∆
OL
OL
(see Note B)
t
t
PHZ
PZH
Output
Waveform 2
S1 at GND
V
OH
V
OH
− V
∆
V
CC
≈0 V
(see Note B)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t /t = 3 ns.
O
r f
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
t
t
and t
and t
are the same as t
.
dis
.
PLZ
PHZ
are the same as t
PZL
PZH
en
G. All parameters and waveforms are not applicable to all devices.
Figure 4. Load Circuit and Voltage Waveforms
9
PACKAGE OPTION ADDENDUM
www.ti.com
14-Aug-2006
PACKAGING INFORMATION
Orderable Device
SN74AUP1G80DBVR
SN74AUP1G80DBVRE4
SN74AUP1G80DBVT
SN74AUP1G80DBVTE4
SN74AUP1G80DCKR
SN74AUP1G80DCKRE4
SN74AUP1G80DCKT
SN74AUP1G80DCKTE4
SN74AUP1G80YZPR
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT-23
DBV
5
5
5
5
5
5
5
5
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SOT-23
SOT-23
SC70
DBV
DBV
DBV
DCK
DCK
DCK
DCK
YZP
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
WCSP
3000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to
discontinue any product or service without notice. Customers should obtain the latest relevant information
before placing orders and should verify that such information is current and complete. All products are sold
subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent
TI deems necessary to support this warranty. Except where mandated by government requirements, testing
of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible
for their products and applications using TI components. To minimize the risks associated with customer
products and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent
right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine,
or process in which TI products or services are used. Information published by TI regarding third-party
products or services does not constitute a license from TI to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or
other intellectual property of the third party, or a license from TI under the patents or other intellectual
property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices.
Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not
responsible or liable for such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for
that product or service voids all express and any implied warranties for the associated TI product or service
and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Amplifiers
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Interface
Applications
Audio
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amplifier.ti.com
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dsp.ti.com
interface.ti.com
logic.ti.com
www.ti.com/audio
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www.ti.com/digitalcontrol
www.ti.com/military
Logic
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power.ti.com
microcontroller.ti.com
www.ti.com/lpw
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Wireless
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
www.ti.com/wireless
Mailing Address:
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Post Office Box 655303 Dallas, Texas 75265
Copyright © 2007, Texas Instruments Incorporated
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