SN74AUP1T97YFPR [TI]
SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS; 单电源电压电平转换与9个可配置门逻辑功能型号: | SN74AUP1T97YFPR |
厂家: | TEXAS INSTRUMENTS |
描述: | SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS |
文件: | 总25页 (文件大小:991K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN74AUP1T97
www.ti.com
SCES613I –OCTOBER 2004–REVISED MAY 2010
SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR
WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS
Check for Samples: SN74AUP1T97
1
FEATURES
DBV OR DCK PACKAGE
2
•
Available in the Texas Instruments NanoStar™
(TOP VIEW)
Packages
1
2
3
6
5
4
B
GND
A
C
•
•
•
•
•
•
•
Single-Supply Voltage Translator
1.8 V to 3.3 V (at VCC = 3.3 V)
2.5 V to 3.3 V (at VCC = 3.3 V)
1.8 V to 2.5 V (at VCC = 2.5 V)
3.3 V to 2.5 V (at VCC = 2.5 V)
Nine Configurable Gate Logic Functions
VCC
Y
DRY OR DSF PACKAGE
(TOP VIEW)
1
2
3
6
5
4
B
GND
A
C
Schmitt-Trigger Inputs Reject Input Noise and
Provide Better Output Signal Integrity
VCC
Y
•
•
•
Ioff Supports Partial-Power-Down Mode With
Low Leakage Current (0.5 µA)
Very Low Static and Dynamic Power
Consumption
YFP OR YZP PACKAGE
(TOP VIEW)
Pb-Free Packages Available: SON (DRY or
DSF), SOT-23 (DBV), SC-70 (DCK), and
NanoStar WCSP
A1
B1
C1
A2
B2
C2
1
2
3
6
5
4
B
GND
A
C
VCC
Y
•
•
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
–
2000-V Human-Body Model
(A114-B, Class II)
–
1000-V Charged-Device Model (C101)
•
Related Devices: SN74AUP1T98,
SN74AUP1T57, and SN74AUP1T58
DESCRIPTION/ORDERING INFORMATION
AUP technology is the industry's lowest-power logic technology designed for use in battery-operated or battery
backed-up equipment. The SN74AUP1T97 is designed for logic-level translation applications with input switching
levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply.
The wide VCC range of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and
ensures normal operation between this range.
Schmitt-trigger inputs (ΔVT = 210 mV between positive and negative input transitions) offer improved noise
immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger
inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.
The SN74AUP1T97 can be easily configured to perform a required gate function by connecting A, B, and C
inputs to VCC or ground (see Function Selection table). Up to nine commonly used logic gate functions can be
performed.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
NanoStar is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2010, Texas Instruments Incorporated
SN74AUP1T97
SCES613I –OCTOBER 2004–REVISED MAY 2010
www.ti.com
Ioff is a feature that allows for powered-down conditions (VCC = 0 V) and is important in portable and mobile
applications. When VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of
the device. No damage occurs to the device under these conditions.
The SN74AUP1T97 is designed with optimized current-drive capability of 4 mA to reduce line reflections,
overshoot, and undershoot caused by high-drive outputs.
NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the package.
ORDERING INFORMATION(1)
TA
PACKAGE(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(3)
_ _ _TH_
NanoStar™ – WCSP (DSBGA)
Reel of 3000 SN74AUP1T97YZPR
0.23-mm Large Bump – YZP (Pb-free)
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YFP
Reel of 3000 SN74AUP1T97YFPR
_ _ _TH_
–40°C to 85°C
QFN – DRY
Reel of 5000 SN74AUP1T97DRYR
Reel of 5000 SN74AUP1T97DSFR
Reel of 3000 SN74AUP1T97DBVR
Reel of 3000 SN74AUP1T97DCKR
TH
uQFN – DSF
TH
SOT (SOT-23) – DBV
SOT (SC-70) – DCK
HT4_
TH_
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) DBV/DCK: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, ● = Pb-free).
FUNCTION SELECTION TABLE
LOGIC FUNCTION
FIGURE NO.
2-to-1 data selector
5
6
2-input AND gate
2-input OR gate with one inverted input
2-input NAND gate with one inverted input
2-input AND gate with one inverted input
2-input NOR gate with one inverted input
2-input OR gate
7
7
8
8
9
Inverter
10
11
Noninverted buffer
Switching Characteristics
Static-Power Consumption
Dynamic-Power Consumption
(pF)
†
at 25 MHz
(µA)
3.5
3
100%
80%
100%
80%
2.5
2
1.5
1
Input
Output
60%
40%
60%
3.3-V
3.3-V
Logic
†
†
Logic
40%
0.5
0
20%
0%
20%
0%
−0.5
AUP
AUP
10
15 20
Time − ns
AUP1G08 data at C = 15 pF
0
5
25
35 40 45
30
†
Single, dual, and triple gates
†
L
Figure 1. AUP – The Lowest-Power Family
Figure 2. Excellent Signal Integrity
2
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Product Folder Link(s): SN74AUP1T97
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SCES613I –OCTOBER 2004–REVISED MAY 2010
3.3 V
3.3 V
V
IH
V
IL
= 1.19 V
= 0.5 V
V
IH
V
IL
= 1.19 V
= 0.5 V
1.8-V
3.3-V
2.5-V
3.3-V
System
System
System
System
SN74AUP1T97
2.5 V
SN74AUP1T97
2.5 V
V
IH
V
IL
= 1.10 V
= 0.35 V
V
IH
V
IL
= 1.10 V
= 0.35 V
1.8-V
2.5-V
3.3-V
2.5-V
System
System
System
System
SN74AUP1T97
SN74AUP1T97
Figure 3. Possible Voltage-Translation Combinations
3.3 V
1.8-V
3.3-V
System
System
SN74AUP1T97
V
OH
min
V
T+
max = V min = 1.19 V
IH
V
OL
max
V
T−
min = V max = 0.5 V
IL
Input Switching Waveform
Output Switching Waveform
Figure 4. Switching Thresholds for 1.8-V to 3.3-V Translation
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SCES613I –OCTOBER 2004–REVISED MAY 2010
www.ti.com
FUNCTION TABLE
INPUTS
OUTPUT
Y
C
L
B
L
A
L
L
L
L
L
H
L
L
H
H
L
H
H
L
L
H
L
H
H
H
H
L
H
L
H
L
H
H
H
H
LOGIC DIAGRAM (POSITIVE LOGIC)
3
A
4
Y
1
B
6
C
LOGIC CONFIGURATIONS
V
CC
C
B
A
1
2
3
6
5
4
C
Y
B
A
Y
GND
Figure 5. 157: 2-to-1 Data Selector/MUX
When C is L, Y = B
When C is H, Y = A
V
CC
1
2
3
6
5
4
C
Y
C
A
Y
A
GND
Figure 6. 08: 2-Input AND Gate
4
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Product Folder Link(s): SN74AUP1T97
SN74AUP1T97
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SCES613I –OCTOBER 2004–REVISED MAY 2010
V
CC
C
A
Y
Y
1
2
3
6
5
4
C
Y
C
A
A
GND
Figure 7. 14+32/14+00: 2-Input OR/NAND Gate With One Inverted Input
V
CC
C
Y
B
1
2
3
6
5
4
C
Y
B
C
B
Y
GND
Figure 8. 14+08/14+02: 2-Input AND/NOR Gate With One Inverted Input
V
CC
C
1
2
3
6
5
4
C
Y
B
Y
B
GND
Figure 9. 32: 2-Input OR Gate
V
CC
1
2
3
6
5
4
C
Y
C
Y
GND
Figure 10. 04/14: Inverter
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SCES613I –OCTOBER 2004–REVISED MAY 2010
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V
CC
B
1
2
3
6
5
4
B
Y
Y
GND
Figure 11. 17/34: Noninverted Buffer
6
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SCES613I –OCTOBER 2004–REVISED MAY 2010
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
MAX
4.6
UNIT
V
VCC
VI
Supply voltage range
Input voltage range(2)
Voltage range applied to any output in the high-impedance or power-off state(2)
Output voltage range in the high or low state(2)
4.6
V
VO
VO
IIK
4.6
V
–0.5 VCC + 0.5
V
Input clamp current
VI < 0
–50
–50
±20
±50
165
259
340
300
123
123
mA
mA
mA
mA
IOK
IO
Output clamp current
VO < 0
Continuous output current
Continuous current through VCC or GND
DBV package
DCK package
DRY package
DSF package
YFP package
YZP package
qJA
Package thermal impedance(3)
°C/W
°C
Tstg
Storage temperature range
–65
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
RECOMMENDED OPERATING CONDITIONS(1)
MIN
2.3
0
MAX UNIT
VCC
VI
Supply voltage
Input voltage
Output voltage
3.6
3.6
VCC
–3.1
–4
V
V
V
VO
0
VCC = 2.3 V
VCC = 3 V
VCC = 2.3 V
VCC = 3 V
IOH
High-level output current
mA
3.1
4
IOL
TA
Low-level output current
mA
°C
Operating free-air temperature
–40
85
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report Implications
of Slow or Floating CMOS Inputs, literature number SCBA004.
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SCES613I –OCTOBER 2004–REVISED MAY 2010
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ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
TA = –40°C
to 85°C
TA = 25°C
PARAMETER
TEST CONDITIONS
VCC
UNIT
MIN
TYP
MAX
MIN
MAX
1.1
VT+
2.3 V to 2.7 V
3 V to 3.6 V
2.3 V to 2.7 V
3 V to 3.6 V
0.6
0.75
0.35
0.5
1.1
0.6
Positive-going
input threshold
voltage
V
1.16
0.6
0.75
0.35
0.5
1.19
0.6
VT–
Negative-going
input threshold
voltage
V
V
0.85
0.85
ΔVT
Hysteresis
(VT+ – VT–
2.3 V to 2.7 V
3 V to 3.6 V
0.23
0.25
0.6
0.1
0.6
0.56
0.15
0.56
)
IOH = –20 µA
2.3 V to 3.6 V
VCC – 0.1
2.05
VCC – 0.1
1.97
IOH = –2.3 mA
IOH = –3.1 mA
IOH = –2.7 mA
IOH = –4 mA
2.3 V
VOH
1.9
1.85
V
V
2.72
2.67
3 V
2.3 V to 3.6 V
2.3 V
2.6
2.55
IOL = 20 µA
0.1
0.31
0.44
0.31
0.44
0.1
0.1
0.33
0.45
0.33
0.45
0.5
IOL = 2.3 mA
VOL
IOL = 3.1 mA
IOL = 2.7 mA
3 V
IOL = 4 mA
II
All inputs
VI = 3.6 V or GND
VI or VO = 0 V to 3.6 V
VI or VO = 3.6 V
VI = 3.6 V or GND, IO = 0
0 V to 3.6 V
0 V
µA
µA
µA
µA
Ioff
ΔIoff
ICC
0.1
0.5
0 V to 0.2 V
2.3 V to 3.6 V
0.2
0.5
0.5
0.9
One input at 0.3 V or 1.1 V,
Other inputs at 0 or VCC, IO = 0
2.3 V to 2.7 V
3 V to 3.6 V
4
ΔICC
µA
One input at 0.45 V or 1.2 V,
Other inputs at 0 or VCC, IO = 0
12
Ci
VI = VCC or GND
VO = VCC or GND
3.3 V
3.3 V
1.5
3
pF
pF
Co
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V, VI = 1.8 V ± 0.15 V (unless otherwise noted)
(see Figure 12)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
CL
UNIT
MIN
1.8
2.3
2.6
3.8
TYP
2.3
2.8
3.1
4.4
MAX
2.9
MIN MAX
5 pF
10 pF
15 pF
30 pF
0.5
1
6.8
7.9
3.4
tpd
A, B, or C
Y
ns
3.8
1
8.7
5.1
1.5
10.8
8
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SCES613I –OCTOBER 2004–REVISED MAY 2010
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V, VI = 2.5 V ± 0.2 V (unless otherwise noted)
(see Figure 12)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
CL
UNIT
MIN
1.8
2.2
2.6
3.7
TYP
2.3
2.8
3.2
4.4
MAX
3.1
MIN MAX
5 pF
10 pF
15 pF
30 pF
0.5
1
6
7.1
7.9
10
3.5
tpd
A, B, or C
Y
ns
5.2
1
5.2
1.5
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V, VI = 3.3 V ± 0.3 V (unless otherwise noted)
(see Figure 12)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
CL
UNIT
MIN
2
TYP
2.7
3.1
3.5
4.7
MAX
3.5
MIN MAX
5 pF
10 pF
15 pF
30 pF
0.5
1
5.5
6.5
7.4
9.5
2.4
2.8
4
3.9
tpd
A, B, or C
Y
ns
4.3
1
5.5
1.5
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, VI = 1.8 V ± 0.15 V (unless otherwise noted)
(see Figure 12)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
CL
UNIT
MIN
1.6
2
TYP
2
MAX
2.5
MIN MAX
5 pF
10 pF
15 pF
30 pF
0.5
1
8
8.5
9.1
9.8
2.4
2.8
3.9
2.9
tpd
A, B, or C
Y
ns
2.3
3.4
3.3
1
4.4
1.5
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, VI = 2.5 V ± 0.2 V (unless otherwise noted)
(see Figure 12)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
CL
UNIT
MIN
1.6
2
TYP
1.9
2.3
2.7
3.8
MAX
2.4
MIN MAX
5 pF
10 pF
15 pF
30 pF
0.5
1
5.3
6.1
6.8
8.5
2.7
tpd
A, B, or C
Y
ns
2.3
3.4
3.1
1
4.2
1.5
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SCES613I –OCTOBER 2004–REVISED MAY 2010
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SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, VI = 3.3 V ± 0.3 V (unless otherwise noted)
(see Figure 12)
TA = –40°C
to 85°C
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
CL
UNIT
MIN
1.6
2
TYP
2.1
2.4
2.7
3.8
MAX
2.7
3
MIN MAX
5 pF
10 pF
15 pF
30 pF
0.5
1
4.7
5.7
6.2
7.8
tpd
A, B, or C
Y
ns
2.3
3.4
3.3
4.4
1
1.5
OPERATING CHARACTERISTICS
TA = 25°C
VCC = 2.5 V
VCC = 3.3 V
PARAMETER
TEST CONDITIONS
UNIT
TYP
TYP
Cpd
Power dissipation capacitance
f = 10 MHz
4
5
pF
10
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SCES613I –OCTOBER 2004–REVISED MAY 2010
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
V
CC
= 2.5 V
V
CC
= 3.3 V
± 0.2 V
5, 10, 15, 30 pF 5, 10, 15, 30 pF
V /2 V /2
± 0.3 V
C
L
1 MΩ
(see Note A)
C
L
V
MI
I
I
V
MO
V /2
CC
V /2
CC
LOAD CIRCUIT
V
I
V
MI
V
MI
Input
0 V
t
t
t
PHL
PLH
V
V
OH
V
V
V
Mo
MO
Output
OL
t
PHL
PLH
V
V
OH
V
Mo
Mo
Output
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
NOTES: A. C includes probe and jig capacitance.
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, slew rate ≥ 1 V/ns.
O
C. The outputs are measured one at a time, with one transition per measurement.
D.
t
and t are the same as t .
PHL pd
PLH
Figure 12. Load Circuit and Voltage Waveforms
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PACKAGE OPTION ADDENDUM
www.ti.com
7-Jun-2010
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
SN74AUP1T97DBVR
SN74AUP1T97DBVRE4
SN74AUP1T97DBVRG4
SN74AUP1T97DBVT
SN74AUP1T97DBVTE4
SN74AUP1T97DBVTG4
SN74AUP1T97DCKR
SN74AUP1T97DCKRE4
SN74AUP1T97DCKRG4
SN74AUP1T97DRYR
SN74AUP1T97DSFR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SC70
DBV
DBV
DBV
DBV
DBV
DBV
DCK
DCK
DCK
DRY
DSF
6
6
6
6
6
6
6
6
6
6
6
3000
3000
3000
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Request Free Samples
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
Request Free Samples
Request Free Samples
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Contact TI Distributor
or Sales Office
250
Green (RoHS
& no Sb/Br)
Contact TI Distributor
or Sales Office
250
Green (RoHS
& no Sb/Br)
Contact TI Distributor
or Sales Office
3000
3000
3000
5000
5000
Green (RoHS
& no Sb/Br)
Request Free Samples
Request Free Samples
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Request Free Samples
Request Free Samples
SC70
Green (RoHS
& no Sb/Br)
SC70
Green (RoHS
& no Sb/Br)
SON
Green (RoHS
& no Sb/Br)
NIPDAU
NIPDAU
Call TI
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Call TI
SON
Green (RoHS
& no Sb/Br)
SN74AUP1T97YEPR
SN74AUP1T97YFPR
OBSOLETE
ACTIVE
WCSP
YEP
YFP
6
6
TBD
Samples Not Available
Request Free Samples
DSBGA
3000
3000
Green (RoHS
& no Sb/Br)
SNAGCU Level-1-260C-UNLIM
SN74AUP1T97YZPR
ACTIVE
DSBGA
YZP
6
Green (RoHS
& no Sb/Br)
SNAGCU Level-1-260C-UNLIM
Request Free Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
7-Jun-2010
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Apr-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74AUP1T97DBVR
SN74AUP1T97DBVT
SN74AUP1T97DCKR
SN74AUP1T97YZPR
SN74AUP1T97YZPR
SOT-23
SOT-23
SC70
DBV
DBV
DCK
YZP
YZP
6
6
6
6
6
3000
250
180.0
180.0
180.0
180.0
180.0
9.2
9.2
8.4
8.4
8.4
3.23
3.23
2.24
1.02
1.02
3.17
3.17
2.34
1.52
1.52
1.37
1.37
1.22
0.63
0.63
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q1
Q1
3000
3000
3000
DSBGA
DSBGA
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Apr-2010
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74AUP1T97DBVR
SN74AUP1T97DBVT
SN74AUP1T97DCKR
SN74AUP1T97YZPR
SN74AUP1T97YZPR
SOT-23
SOT-23
SC70
DBV
DBV
DCK
YZP
YZP
6
6
6
6
6
3000
250
202.0
202.0
202.0
220.0
220.0
201.0
201.0
201.0
220.0
220.0
28.0
28.0
28.0
34.0
34.0
3000
3000
3000
DSBGA
DSBGA
Pack Materials-Page 2
D: Max = 790 µm, Min = 730 µm
E: Max = 1190 µm, Min = 1130 µm
D: Max = 790 µm, Min = 730 µm
E: Max = 1190 µm, Min = 1130 µm
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