SN74AUP3G04DCUR [TI]
LOW-POWER TRIPLE INVERTER GATE; 低功耗三非门
| 型号： | SN74AUP3G04DCUR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LOW-POWER TRIPLE INVERTER GATE |
| 文件： | 总12页 (文件大小：276K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74AUP3G04
www.ti.com
SCES762A –DECEMBER 2009–REVISED DECEMBER 2009
LOW-POWER TRIPLE INVERTER GATE
Check for Samples: SN74AUP3G04
1
FEATURES
•
•
•
Available in the Texas Instruments NanoStar™
Package
•
•
Optimized for 3.3-V Operation
3.6-V I/O Tolerant to Support Mixed-Mode
Signal Operation
Low Static-Power Consumption
(ICC = 0.9 μA Maximum)
•
•
•
tpd = 4.3 ns Maximum at 3.3 V
Low Dynamic-Power Consumption
(Cpd = 4.3 pF Typ at 3.3 V)
Suitable for Point-to-Point Applications
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
•
•
Low Input Capacitance (Ci = 1.5 pF Typical)
Low Noise – Overshoot and Undershoot
<10% of VCC
•
ESD Performance Tested Per JESD 22
–
2000-V Human-Body Model
(A114-B, Class II)
•
•
Ioff Supports Partial-Power-Down Mode
Operation
–
1000-V Charged-Device Model (C101)
Wide Operating VCC Range of 0.8 V to 3.6 V
DCU PACKAGE
(TOP VIEW)
DQE PACKAGE
(TOP VIEW)
RSE PACKAGE
(TOP VIEW)
YFP PACKAGE
(TOP VIEW)
VCC
8
7
6
5
VCC
1
2
3
4
1A
3Y
A1
B1
C1
D1
A2 VCC
VCC
1 8
2 7
3 6
4 5
1
2
3
4
8
7
6
5
1A
3Y
1A
3Y
1Y
3A
2Y
B2
1Y
1Y
3A
2Y
8
1
2
3
7
6
5
1Y
3A
2Y
1A
3Y
2A
C2
2A
3A
2A
2A
D2
GND
GND
2Y
GND
4
GND
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable
applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range
of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal
integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
Static-Power Consumption
(µA)
Dynamic-Power Consumption
(pF)
Switching Characteristics
at 25 MHz(A)
100%
80%
60%
40%
20%
0%
100%
80%
60%
40%
20%
0%
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
Input
Output
3.3-V
Logic(A)
3.3-V
Logic(A)
AUP
AUP
(A)
20
25
Time (ns)
10 15
0
5
35 40 45
30
Single, dual, and triple gates
(A) SN74AUP3Gxx data at C = 15 pF.
L
Figure 1. AUP – The Lowest-Power Family
Figure 2. Excellent Signal Integrity
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated
SN74AUP3G04
SCES762A –DECEMBER 2009–REVISED DECEMBER 2009
www.ti.com
The SN74AUP3G04 performs the Boolean function Y = A in positive logic.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION(1)
ORDERABLE
PART NUMBER
TOP-SIDE
TA
PACKAGE(2)
MARKING(3)
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YFP (Pb-free)
uQFN – DQE
Reel of 3000
SN74AUP3G04YFPR
_ _ H C _
Reel of 5000
Reel of 5000
Reel of 3000
SN74AUP3G04DQER
SN74AUP3G04RSER
SN74AUP3G04DCUR
T9
–40°C to 85°C
QFN – RSE
PREVIEW
H04_
SSOP – DCU
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) DCU: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
YFP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
FUNCTION TABLE
INPUT
A
OUTPUT
Y
H
L
L
H
LOGIC DIAGRAM (POSITIVE LOGIC)
1
3
6
7
5
2
1A
2A
3A
1Y
2Y
3Y
(1) Pin numbers shown are for the DCU and DQE packages.
2
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Product Folder Link(s): SN74AUP3G04
SN74AUP3G04
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SCES762A –DECEMBER 2009–REVISED DECEMBER 2009
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
MAX
4.6
UNIT
V
VCC
VI
Supply voltage range
Input voltage range(2)
Voltage range applied to any output in the high-impedance or power-off state(2)
Output voltage range in the high or low state(2)
4.6
V
VO
VO
IIK
4.6
V
–0.5 VCC + 0.5
V
Input clamp current
VI < 0
–50
–50
±20
±50
220
261
253
132
mA
mA
mA
mA
IOK
IO
Output clamp current
VO < 0
Continuous output current
Continuous current through VCC or GND
DCU package
DQE package
RSE package
YFP package
θJA
Package thermal impedance(3)
°C/W
Tstg
Storage temperature range
–65
150
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
Copyright © 2009, Texas Instruments Incorporated
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SCES762A –DECEMBER 2009–REVISED DECEMBER 2009
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RECOMMENDED OPERATING CONDITIONS(1)
MIN
MAX UNIT
VCC
Supply voltage
0.8
3.6
V
VCC = 0.8 V
VCC
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 0.8 V
0.65 × VCC
VIH
High-level input voltage
V
1.6
2
0
0.35 × VCC
0.7
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VIL
Low-level input voltage
V
0.9
VI
Input voltage
0
0
3.6
V
V
VO
Output voltage
VCC
–20
–1.1
–1.7
–1.9
–3.1
–4
VCC = 0.8 V
VCC = 1.1 V
VCC = 1.4 V
VCC = 1.65
μA
IOH
High-level output current
mA
μA
VCC = 2.3 V
VCC = 3 V
VCC = 0.8 V
VCC = 1.1 V
VCC = 1.4 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 3 V
20
1.1
1.7
IOL
Low-level output current
1.9
mA
3.1
4
Δt/Δv
Input transition rise or fall rate
Operating free-air temperature
VCC = 0.8 V to 3.6 V
200
85
ns/V
°C
TA
–40
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
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SN74AUP3G04
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SCES762A –DECEMBER 2009–REVISED DECEMBER 2009
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
TA = 25°C
TA = –40°C to 85°C
PARAMETER
TEST CONDITIONS
VCC
UNIT
MIN TYP
VCC – 0.1
MAX
MIN
VCC – 0.1
0.7 × VCC
1.03
MAX
IOH = –20 μA
0.8 V to 3.6 V
1.1 V
IOH = –1.1 mA
IOH = –1.7 mA
0.75 × VCC
1.11
1.4 V
IOH = –1.9 mA
1.65 V
1.32
1.3
VOH
V
IOH = –2.3 mA
2.05
1.97
2.3 V
3 V
IOH = –3.1 mA
1.9
1.85
IOH = –2.7 mA
2.72
2.67
IOH = –4 mA
2.6
2.55
IOL = 20 μA
0.8 V to 3.6 V
1.1 V
0.1
0.3 × VCC
0.31
0.1
0.3 × VCC
0.37
IOL = 1.1 mA
IOL = 1.7 mA
1.4 V
IOL = 1.9 mA
1.65 V
0.31
0.35
VOL
V
IOL = 2.3 mA
0.31
0.33
2.3 V
3 V
IOL = 3.1 mA
0.44
0.45
IOL = 2.7 mA
0.31
0.33
IOL = 4 mA
0.44
0.45
II
A or B input VI = GND to 3.6 V
VI or VO = 0 V to 3.6 V
VI or VO = 0 V to 3.6 V
0 V to 3.6 V
0 V
0.1
0.5
μA
μA
μA
Ioff
ΔIoff
0.2
0.6
0 V to 0.2 V
0.2
0.6
VI = GND or
(VCC to 3.6 V),
IO = 0
VI = VCC – 0.6 V(1)
IO = 0
ICC
0.8 V to 3.6 V
0.5
40
0.9
50
μA
μA
,
ΔICC
3.3 V
0 V
3.6 V
0 V
1.5
1.5
3
Ci
VI = VCC or GND
VO = GND
pF
pF
Co
(1) One input at VCC – 0.6 V, other input at VCC or GND
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, CL = 5 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = 25°C
TA = –40°C to 85°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
TYP
18
MAX
MIN
MAX
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
2.6
1.4
1
7.3
5.2
4.2
3
12.8
8.7
6.6
4.4
3.5
2.1
0.9
0.5
0.5
0.5
15.6
10.3
8.2
tpd
A or B
Y
ns
1
5.5
1
2.4
4.3
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SCES762A –DECEMBER 2009–REVISED DECEMBER 2009
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SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, CL = 10 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = 25°C
TA = –40°C to 85°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
TYP
21
MAX
MIN
MAX
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
1.5
1
8.5
6.2
5
14.7
10
1
0.5
0.5
0.5
0.5
17.2
11.3
9
tpd
A or B
Y
ns
1
7.7
5.2
4.2
1
3.6
2.9
6.1
4.7
1
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = 25°C
TYP
24
TA = –40°C to 85°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
MAX
MIN
MAX
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
3.6
2.3
1.6
1
9.9
16.3
11.1
8.7
3.1
1.8
1.1
0.5
0.5
19.9
13.2
10.6
7.3
7.2
tpd
A or B
Y
ns
5.8
4.3
5.9
1
3.4
4.8
5.9
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, CL = 30 pF (unless otherwise noted) (see Figure 3 and Figure 4)
TA = 25°C
TYP
32.8
13.1
9.5
TA = –40°C to 85°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
MAX
MIN
MAX
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
4.9
3.4
2.5
1.8
1.5
20.9
14.2
11
4.4
2.9
2
25.5
16.9
13.5
9.4
tpd
A or B
Y
ns
7.7
5.7
7.6
1.3
1
4.7
6.2
7.5
OPERATING CHARACTERISTICS
TA = 25°C
PARAMETER
TEST CONDITIONS
VCC
TYP UNIT
0.8 V
4
4
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
4
Cpd
Power dissipation capacitance
f = 10 MHz
pF
4
4.1
4.3
6
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SCES762A –DECEMBER 2009–REVISED DECEMBER 2009
PARAMETER MEASUREMENT INFORMATION
(Propagation Delays, Setup and Hold Times, and Pulse Width)
From Output
Under Test
C
L
(see Note A)
1 MΩ
LOAD CIRCUIT
V
= 1.2 V
V
= 1.5 V
V
= 1.8 V
V
= 2.5 V
V
= 3.3 V
CC
CC
CC
CC
CC
V
CC
= 0.8 V
± 0.1 V
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
/2 /2 /2
± 0.1 V
± 0.15 V
± 0.2 V
± 0.3 V
C
L
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
V
M
V
CC
V
CC
V
V /2
CC
V
/2
CC
V
/2
CC
CC
V
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
t
w
V
CC
V /2
CC
V /2
CC
Input
V
I
0 V
V
M
V
M
Input
VOLTAGE WAVEFORMS
PULSE DURATION
0 V
t
t
t
PHL
PLH
PHL
V
V
OH
V
CC
V
V
V
M
M
Output
Output
Timing Input
V
/2
CC
OL
0 V
t
PLH
t
t
h
su
V
V
OH
V
CC
V
M
M
V
CC
/2
V /2
CC
Data Input
OL
0 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output
control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the
output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, for
propagation delays tr/tf = 3 ns, for setup and hold times and pulse width tr/tf = 1.2 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLH and tPHL are the same as tpd
.
F. All parameters and waveforms are not applicable to all devices.
Figure 3. Load Circuit and Voltage Waveforms
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PARAMETER MEASUREMENT INFORMATION
(Enable and Disable Times)
2 xV
CC
S1
5 kΩ
From Output
Under Test
GND
TEST
S1
t
/t
PLZ PZL
2 xV
C
CC
L
5 kΩ
(see Note A)
t
/t
PHZ PZH
GND
LOAD CIRCUIT
V
= 1.2 V
V
= 1.5 V
V
= 1.8 V
V
= 2.5 V
V
= 3.3 V
CC
CC
CC
CC
CC
V
CC
= 0.8 V
± 0.1 V
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
/2 /2 /2
± 0.1 V
± 0.15 V
5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
/2 /2 /2
± 0.2 V
± 0.3 V
C
L
V
M
V
CC
V
CC
V
V
CC
V
V
CC
CC
CC
V
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
∆
0.1 V
0.1 V
0.1 V
0.15 V
0.15 V
0.3 V
V
CC
Output
V /2
CC
V /2
CC
Control
0 V
t
t
PZL
PLZ
Output
V
V
CC
Waveform 1
S1 at 2 xV
V
/2
/2
CC
V
+ V
CC
∆
OL
OL
(see Note B)
t
t
PHZ
PZH
Output
Waveform 2
S1 at GND
V
OH
V
OH
- V
∆
V
CC
≈0 V
(see Note B)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output
control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the
output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr/tf = 3 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis
F. tPLH and tPHL are the same as tpd
G. All parameters and waveforms are not applicable to all devices.
.
.
Figure 4. Load Circuit and Voltage Waveforms
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PACKAGE OPTION ADDENDUM
www.ti.com
6-Jan-2010
PACKAGING INFORMATION
Orderable Device
SN74AUP3G04DCUR
SN74AUP3G04DQER
SN74AUP3G04YFPR
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
ACTIVE
US8
DCU
8
8
8
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
ACTIVE
X2SON
DSBGA
DQE
YFP
5000 Green (RoHS &
no Sb/Br)
NIPDAU
Level-1-260C-UNLIM
PREVIEW
3000
TBD
Call TI
Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
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information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
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Products
Amplifiers
Applications
Audio
Automotive
Broadband
Digital Control
Medical
Military
Optical Networking
Security
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
www.ti.com/audio
Data Converters
DLP® Products
DSP
Clocks and Timers
Interface
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/medical
www.ti.com/military
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
Logic
Power Mgmt
Microcontrollers
RFID
Telephony
Video & Imaging
Wireless
RF/IF and ZigBee® Solutions www.ti.com/lprf
www.ti.com/wireless
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