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SN74AVC1T45 [TI]

SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS; 可配置电压转换和3态输出的单位双电源总线收发器
SN74AVC1T45
型号： SN74AVC1T45
厂家： TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述：

SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
可配置电压转换和3态输出的单位双电源总线收发器

总线收发器 输出元件
文件： 总22页 (文件大小：465K)
中文：  中文翻译
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SN74AVC1T45  
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES530D–DECEMBER 2003–REVISED NOVEMBER 2005  
FEATURES  
•
Available in the Texas Instruments  
NanoStar™ and NanoFree™ Packages  
•
•
•
Ioff Supports Partial-Power-Down Mode  
Operation  
•
Fully Configurable Dual-Rail Design Allows  
Each Port to Operate Over the Full 1.2-V to  
3.6-V Power-Supply Range  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
•
VCC Isolation Feature - If Either VCC Input Is at  
GND, Both Ports Are in the High-Impedance  
State  
– 1000-V Charged-Device Model (C101)  
•
•
•
DIR Input Circuit Referenced to VCCA  
±12-mA Output Drive at 3.3 V  
I/Os Are 4.6-V Tolerant  
DBV PACKAGE  
(TOP VIEW)  
YEP OR YZP PACKAGE  
(BOTTOM VIEW)  
DCK PACKAGE  
(TOP VIEW)  
DRL PACKAGE  
(TOP VIEW)  
C2  
C1  
3 4  
2 5  
1 6  
A
GND  
B
DIR  
1
2
3
6
5
4
V
V
V
V
CCB  
1
2
3
6
5
4
CCA  
CCB  
CCA  
1
2
3
6
V
V
CCB  
B1  
A1  
B2  
A2  
CCA  
GND  
A
DIR  
B
GND  
A
DIR  
B
V
V
CCB  
CCA  
DIR  
B
GND  
A
5
4
See mechanical drawings for dimensions.  
DESCRIPTION/ORDERING INFORMATION  
This single-bit noninverting bus transceiver uses two separate configurable power-supply rails. The  
SN74AVC1T45 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as  
low as 1.2 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The  
B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal  
low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING(2)  
NanoStar™ – WCSP (DSBGA)  
0.23-mm Large Bump – YEP  
SN74AVC1T45YEPR  
Tape and reel  
_ _ _TC_  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump – YZP (Pb-free)  
SN74AVC1T45YZPR  
–40°C to 85°C  
SOT (SOT-23) – DBV  
SOT (SC-70) – DCK  
SOT (SOT-553) – DRL  
Tape and reel  
Tape and reel  
Reel of 4000  
SN74AVC1T45DBVR  
SN74AVC1T45DCKR  
SN74AVC1T45DRLR  
DT1_  
TC_  
UE_  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
(2) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.  
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following  
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar, NanoFree are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
SN74AVC1T45  
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES530D–DECEMBER 2003–REVISED NOVEMBER 2005  
DESCRIPTION/ORDERING INFORMATION (CONTINUED)  
The SN74AVC1T45 is designed for asynchronous communication between two data buses. The logic levels of  
the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data  
from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the  
A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic  
HIGH or LOW level applied to prevent excess ICC and ICCZ  
.
The SN74AVC1T45 is designed so that the DIR input is powered by VCCA  
.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance  
state.  
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the  
die as the package.  
FUNCTION TABLE(1)  
INPUT  
OPERATION  
DIR  
L
B data to A bus  
A data to B bus  
H
(1) Input circuits of the data I/Os  
always are active.  
LOGIC DIAGRAM (POSITIVE LOGIC)  
5
3
DIR  
A
4
B
V
CCA  
V
CCB  
2
SN74AVC1T45  
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES530D–DECEMBER 2003–REVISED NOVEMBER 2005  
Absolute Maximum Ratings(1)  
over operating free-air temperature range (unless otherwise noted)  
MIN  
MAX  
UNIT  
VCCA  
Supply voltage range  
VCCB  
–0.5  
4.6  
V
I/O ports (A port)  
I/O ports (B port)  
Control inputs  
A port  
–0.5  
–0.5  
–0.5  
–0.5  
–0.5  
4.6  
4.6  
4.6  
4.6  
4.6  
VI  
Input voltage range(2)  
V
Voltage range applied to any output in the high-impedance or  
power-off state(2)  
VO  
VO  
V
V
B port  
A port  
–0.5 VCCA + 0.5  
Voltage range applied to any output in the high or low state(2)(3)  
B port  
–0.5 VCCB + 0.5  
IIK  
IOK  
IO  
Input clamp current  
VI < 0  
–50  
–50  
±50  
±100  
165  
259  
142  
123  
mA  
mA  
mA  
mA  
Output clamp current  
VO < 0  
Continuous output current  
Continuous current through VCCA, VCCB, or GND  
DBV package  
DCK package  
DRL package  
YEP/YZP package  
θJA  
Package thermal impedance(4)  
°C/W  
°C  
Tstg  
Storage temperature range  
–65  
150  
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating  
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.  
(3) The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current ratings are observed.  
(4) The package thermal impedance is calculated in accordance with JESD 51-7.  
3
SN74AVC1T45  
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES530D–DECEMBER 2003–REVISED NOVEMBER 2005  
Recommended Operating Conditions(1)(2)(3)  
VCCI  
VCCO  
MIN  
MAX UNIT  
VCCA  
VCCB  
Supply voltage  
Supply voltage  
1.2  
3.6  
3.6  
V
V
1.2  
1.2 V to 1.95 V  
1.95 V to 2.7 V  
2.7 V to 3.6 V  
1.2 V to 1.95 V  
1.95 V to 2.7 V  
2.7 V to 3.6 V  
1.2 V to 1.95 V  
1.95 V to 2.7 V  
2.7 V to 3.6 V  
1.2 V to 1.95 V  
1.95 V to 2.7 V  
2.7 V to 3.6 V  
VCCI × 0.65  
High-level  
input voltage  
VIH  
VIL  
VIH  
VIL  
Data inputs  
Data inputs  
1.6  
2
V
V
V
V
VCCI × 0.35  
Low-level  
input voltage  
0.7  
0.8  
VCCA × 0.65  
High-level  
input voltage  
DIR  
1.6  
2
(referenced to VCCA  
)
)
VCCA × 0.35  
Low-level  
input voltage  
DIR  
0.7  
0.8  
3.6  
VCCO  
3.6  
–3  
–6  
–8  
–9  
–12  
3
(referenced to VCCA  
VI  
Input voltage  
0
0
0
V
V
Active state  
3-state  
VO  
Output voltage  
1.2 V  
1.4 V to 1.6 V  
1.65 V to 1.95 V  
2.3 V to 2.7 V  
3 V to 3.6 V  
1.2 V  
IOH  
High-level output current  
Low-level output current  
mA  
mA  
1.4 V to 1.6 V  
1.65 V to 1.95 V  
2.3 V to 2.7 V  
3 V to 3.6 V  
6
IOL  
8
9
12  
5
∆t/∆v  
Input transition rise or fall rate  
Operating free-air temperature  
ns/V  
TA  
–40  
85  
°C  
(1) VCCI is the VCC associated with the input port.  
(2) VCCO is the VCC associated with the output port.  
(3) All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
4
SN74AVC1T45  
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES530D–DECEMBER 2003–REVISED NOVEMBER 2005  
Electrical Characteristics(1)(2)  
over recommended operating free-air temperature range (unless otherwise noted)  
TA = 25°C  
–40°C to 85°C  
PARAMETER  
TEST CONDITIONS  
IOH = –100 µA  
VCCA  
VCCB  
UNIT  
MIN  
TYP  
MAX  
MIN  
MAX  
VCCO  
– 0.2 V  
1.2 V to 3.6 V  
1.2 V to 3.6 V  
IOH = –3 mA  
IOH = –6 mA  
IOH = –8 mA  
IOH = –9 mA  
IOH = –12 mA  
IOL = 100 µA  
IOL = 3 mA  
1.2 V  
1.4 V  
1.2 V  
1.4 V  
0.95  
0.15  
1.05  
1.2  
VOH  
VI = VIH  
V
1.65 V  
2.3 V  
1.65 V  
2.3 V  
1.75  
2.3  
3 V  
3 V  
1.2 V to 3.6 V  
1.2 V  
1.2 V to 3.6 V  
1.2 V  
0.2  
IOL = 6 mA  
1.4 V  
1.4 V  
0.35  
0.45  
0.55  
0.7  
±1  
VOL  
VI = VIL  
V
IOL = 8 mA  
1.65 V  
2.3 V  
1.65 V  
2.3 V  
IOL = 9 mA  
IOL = 12 mA  
VI = VCCA or GND  
3 V  
3 V  
II  
DIR  
1.2 V to 3.6 V  
0 V  
1.2 V to 3.6 V  
0 to 3.6 V  
0 V  
±0.025 ±0.25  
µA  
µA  
A port  
B port  
±0.1  
±0.1  
±1  
±1  
±5  
Ioff  
VI or VO = 0 to 3.6 V  
VO = VCCO or GND  
0 to 3.6 V  
±5  
A or B  
port  
IOZ  
1.2 V to 3.6 V  
1.2 V to 3.6 V  
±0.5  
±2.5  
±5  
µA  
µA  
1.2 V to 3.6 V  
0 V  
1.2 V to 3.6 V  
3.6 V  
10  
–2  
10  
10  
10  
–2  
ICCA  
VI = VCCI or GND, IO = 0  
VI = VCCI or GND, IO = 0  
3.6 V  
0 V  
1.2 V to 3.6 V  
0 V  
1.2 V to 3.6 V  
3.6 V  
ICCB  
µA  
3.6 V  
0 V  
ICCA + ICCB  
(see Table 1)  
VI = VCCI or GND, IO = 0  
VI = 3.3 V or GND  
1.2 V to 3.6 V  
3.3 V  
1.2 V to 3.6 V  
3.3 V  
20  
µA  
pF  
pF  
Control  
inputs  
Ci  
2.5  
6
A or B  
port  
Cio  
VO = 3.3 V or GND  
3.3 V  
3.3 V  
(1) VCCO is the VCC associated with the output port.  
(2) VCCI is the VCC associated with the input port.  
5
SN74AVC1T45  
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES530D–DECEMBER 2003–REVISED NOVEMBER 2005  
Switching Characteristics  
over recommended operating free-air temperature range, VCCA = 1.2 V (see Figure 1)  
VCCB = 1.2 V  
VCCB = 1.5 V  
VCCB = 1.8 V  
VCCB = 2.5 V  
VCCB = 3.3 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
ns  
TYP  
3.3  
3.3  
3.3  
3.3  
5.1  
5.1  
5.3  
5.3  
8.6  
8.6  
8.3  
8.3  
TYP  
2.7  
2.7  
3.1  
3.1  
5.2  
5.2  
4.3  
4.3  
7.3  
7.3  
7.8  
7.8  
TYP  
2.4  
2.4  
2.9  
2.9  
5.3  
5.3  
4
TYP  
2.3  
2.3  
2.8  
2.8  
5.2  
5.2  
3.3  
3.3  
6.1  
6.1  
7.5  
7.5  
TYP  
2.4  
2.4  
2.7  
2.7  
3.7  
3.7  
3.7  
3.7  
6.4  
6.4  
5.8  
5.8  
tPLH  
tPHL  
tPLH  
tPHL  
tPHZ  
tPLZ  
tPHZ  
tPLZ  
A
B
A
A
B
A
B
B
ns  
DIR  
DIR  
DIR  
DIR  
ns  
ns  
4
(1)  
tPZH  
6.8  
6.8  
7.7  
7.7  
ns  
(1)  
tPZL  
(1)  
tPZH  
ns  
(1)  
tPZL  
(1) The enable time is a calculated value, derived using the formula shown in the enable times section.  
Switching Characteristics  
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 1)  
VCCB = 1.5 V  
VCCB = 1.8 V  
± 0.15 V  
VCCB = 2.5 V  
VCCB = 3.3 V  
VCCB = 1.2 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
± 0.1 V  
± 0.2 V  
± 0.3 V  
PARAMETER  
UNIT  
TYP  
2.9  
2.9  
2.6  
2.6  
3.8  
3.8  
5.1  
5.1  
7.7  
7.7  
6.7  
6.7  
MIN  
0.7  
0.7  
0.6  
0.6  
1.6  
1.6  
1.8  
1.8  
MAX  
5.6  
MIN  
0.6  
0.6  
0.4  
0.4  
1.5  
1.5  
1.6  
1.6  
MAX  
5.2  
5.2  
5.3  
5.3  
6.8  
6.8  
7.1  
7.1  
12.4  
12.4  
12  
MIN  
0.5  
0.5  
0.3  
0.3  
0.3  
0.3  
1.1  
1.1  
MAX  
4.2  
MIN  
0.5  
0.5  
0.3  
0.3  
0.9  
0.9  
1.4  
1.4  
MAX  
3.8  
tPLH  
tPHL  
tPLH  
tPHL  
tPHZ  
tPLZ  
tPHZ  
tPLZ  
A
B
A
A
B
A
B
ns  
ns  
ns  
ns  
ns  
ns  
5.6  
4.2  
3.8  
5.5  
4.9  
4.8  
B
5.5  
4.9  
4.8  
6.7  
6.9  
6.9  
DIR  
DIR  
DIR  
DIR  
6.7  
6.9  
6.9  
8.1  
4.7  
4.5  
8.1  
4.7  
4.5  
(1)  
tPZH  
13.6  
13.6  
12.3  
12.3  
9.6  
9.3  
(1)  
tPZL  
9.6  
9.3  
(1)  
tPZH  
11.1  
11.1  
10.7  
10.7  
(1)  
tPZL  
12  
(1) The enable time is a calculated value, derived using the formula shown in the enable times section.  
6
SN74AVC1T45  
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES530D–DECEMBER 2003–REVISED NOVEMBER 2005  
Switching Characteristics  
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 1)  
VCCB = 1.5 V  
VCCB = 1.8 V  
± 0.15 V  
VCCB = 2.5 V  
VCCB = 3.3 V  
VCCB = 1.2 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
± 0.1 V  
± 0.2 V  
± 0.3 V  
PARAMETER  
UNIT  
TYP  
2.7  
2.7  
2.3  
2.3  
3.8  
3.8  
5
MIN  
0.6  
0.6  
0.5  
0.5  
1.6  
1.6  
1.8  
1.8  
MAX  
5.3  
MIN  
0.5  
0.5  
0.4  
0.4  
1.6  
1.6  
1.4  
1.4  
MAX  
5
MIN  
0.4  
0.4  
0.3  
0.3  
1.6  
1.6  
1
MAX  
3.9  
3.9  
4.6  
4.6  
5.9  
5.9  
4.4  
4.4  
9
MIN  
0.4  
0.4  
0.2  
0.2  
0.5  
0.5  
1.4  
1.4  
MAX  
3.4  
3.4  
4.4  
4.4  
6
tPLH  
tPHL  
tPLH  
tPHL  
tPHZ  
tPLZ  
tPHZ  
tPLZ  
A
B
A
A
B
A
B
ns  
ns  
ns  
ns  
ns  
ns  
5.3  
5
5.2  
5
B
5.2  
5
5.9  
5.9  
5.9  
6.8  
6.8  
11.8  
11.8  
10.9  
10.9  
DIR  
DIR  
DIR  
DIR  
5.9  
6
7.7  
5.3  
5.3  
8.7  
8.7  
9.4  
9.4  
5
7.7  
1
(1)  
tPZH  
7.3  
7.3  
6.5  
6.5  
12.9  
12.9  
11.2  
11.2  
(1)  
tPZL  
9
(1)  
tPZH  
9.8  
9.8  
(1)  
tPZL  
(1) The enable time is a calculated value, derived using the formula shown in the enable times section.  
Switching Characteristics  
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 1)  
VCCB = 1.5 V  
VCCB = 1.8 V  
± 0.15 V  
VCCB = 2.5 V  
VCCB = 3.3 V  
VCCB = 1.2 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
± 0.1 V  
± 0.2 V  
± 0.3 V  
PARAMETER  
UNIT  
TYP  
2.6  
2.6  
2.2  
2.2  
2.8  
2.8  
4.9  
4.9  
7.1  
7.1  
5.4  
5.4  
MIN  
0.5  
0.5  
0.4  
0.4  
0.3  
0.3  
2
MAX  
4.9  
MIN  
0.4  
0.4  
0.3  
0.3  
0.8  
0.8  
1.5  
1.5  
MAX  
4.6  
MIN  
0.3  
0.3  
0.2  
0.2  
0.4  
0.4  
0.6  
0.6  
MAX  
3.4  
3.4  
3.4  
3.4  
3.8  
3.8  
4.1  
4.1  
7.5  
7.5  
7
MIN  
0.3  
0.3  
0.2  
0.2  
0.5  
0.5  
1
MAX  
3
tPLH  
tPHL  
tPLH  
tPHL  
tPHZ  
tPLZ  
tPHZ  
tPLZ  
A
B
A
A
B
A
B
ns  
ns  
ns  
ns  
ns  
ns  
4.9  
4.6  
3
4.2  
3.8  
3.3  
3.3  
3.8  
3.8  
4
B
4.2  
3.8  
3.8  
3.8  
DIR  
DIR  
DIR  
DIR  
3.8  
3.8  
7.6  
6.5  
2
7.6  
6.5  
1
4
(1)  
tPZH  
11.8  
11.8  
8.6  
10.3  
10.3  
8.1  
7.3  
7.3  
6.6  
6.6  
(1)  
tPZL  
(1)  
tPZH  
(1)  
tPZL  
8.6  
8.1  
7
(1) The enable time is a calculated value, derived using the formula shown in the enable times section.  
7
SN74AVC1T45  
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES530D–DECEMBER 2003–REVISED NOVEMBER 2005  
Switching Characteristics  
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 1)  
VCCB = 1.5 V  
VCCB = 1.8 V  
± 0.15 V  
VCCB = 2.5 V  
VCCB = 3.3 V  
± 0.3 V  
VCCB = 1.2 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
± 0.1 V  
± 0.2 V  
PARAMETER  
UNIT  
TYP  
2.6  
2.6  
2.2  
2.2  
3.1  
3.1  
4
MIN  
0.4  
0.4  
0.4  
0.4  
1.3  
1.3  
0.7  
0.7  
MAX  
4.7  
MIN  
0.3  
0.3  
0.3  
0.3  
1.3  
1.3  
0.6  
0.6  
MAX  
4.4  
4.4  
3.4  
3.4  
4.3  
4.3  
6.5  
6.5  
9.9  
9.9  
8.5  
8.5  
MIN  
0.2  
0.2  
0.2  
0.2  
1.3  
1.3  
0.7  
0.7  
MAX  
3.3  
3.3  
3
MIN MAX  
tPLH  
tPHL  
tPLH  
tPHL  
tPHZ  
tPLZ  
tPHZ  
tPLZ  
0.2  
0.2  
0.1  
0.1  
1.3  
1.3  
1.5  
1.5  
2.8  
2.8  
2.8  
2.8  
4.3  
4.3  
4.9  
4.9  
6.7  
6.7  
6.8  
6.8  
A
B
A
A
B
A
B
ns  
ns  
ns  
ns  
ns  
ns  
4.7  
3.8  
B
3.8  
3
4.3  
4.3  
4.3  
4
DIR  
DIR  
DIR  
DIR  
4.3  
7.4  
4
7.4  
4
(1)  
tPZH  
6.2  
6.2  
5.7  
5.7  
11.2  
11.2  
8.9  
7
(1)  
tPZL  
7
(1)  
tPZH  
7.2  
7.2  
(1)  
tPZL  
8.9  
(1) The enable time is a calculated value, derived using the formula shown in the enable times section.  
Operating Characteristics  
TA = 25°C  
VCCA  
=
VCCA  
=
VCCA  
=
VCCA  
=
VCCA =  
TEST  
CONDITIONS  
VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V  
PARAMETER  
UNIT  
TYP  
TYP  
TYP  
TYP  
TYP  
A-port input,  
B-port output  
3
3
3
3
4
CL = 0 pF,  
f = 10 MHz,  
tr = tf = 1 ns  
(1)  
(1)  
CpdA  
pF  
B-port input,  
A-port output  
13  
13  
3
13  
13  
3
14  
14  
3
15  
15  
3
15  
15  
3
A-port input,  
B-port output  
CL = 0 pF,  
f = 10 MHz,  
tr = tf = 1 ns  
CpdB  
pF  
B-port input,  
A-port output  
(1) Power dissipation capacitance per transceiver  
8
SN74AVC1T45  
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES530D–DECEMBER 2003–REVISED NOVEMBER 2005  
Power-Up Considerations  
A proper power-up sequence always should be followed to avoid excessive supply current, bus contention,  
oscillations, or other anomalies. To guard against such power-up problems, take the following precautions:  
1. Connect ground before any supply voltage is applied.  
2. Power up VCCA  
.
3. VCCB can be ramped up along with or after VCCA  
.
Table 1. Typical Total Static Power Consumption (ICCA + ICCB  
)
VCCA  
VCCB  
UNIT  
0 V  
0
1.2 V  
<0.5  
<1  
1.5 V  
<0.5  
<1  
1.8 V  
<0.5  
<1  
2.5 V  
<0.5  
<1  
3.3 V  
<0.5  
1
0 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
<0.5  
<0.5  
<0.5  
<0.5  
<0.5  
<1  
<1  
<1  
<1  
1
µA  
<1  
<1  
<1  
<1  
<1  
1
<1  
<1  
<1  
<1  
1
<1  
<1  
<1  
<1  
9
SN74AVC1T45  
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES530D–DECEMBER 2003–REVISED NOVEMBER 2005  
TYPICAL CHARACTERISTICS  
TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE,  
TA = 25°C, VCCA = 1.2 V  
6
5
4
3
2
1
0
6
5
4
3
2
1
0
V
V
= 1.2 V  
= 1.5 V  
= 1.8 V  
V
= 1.2 V  
CCB  
CCB  
V
= 1.5 V  
CCB  
CCB  
CCB  
CCB  
V
V
= 1.8 V  
V
V
= 2.5 V  
= 3.3 V  
V
V
= 2.5 V  
= 3.3 V  
CCB  
CCB  
CCB  
CCB  
0
10  
20  
30  
40  
50  
60  
0
10  
20  
30  
40  
50  
60  
C - pF  
L
C - pF  
L
TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE,  
TA = 25°C, VCCA = 1.5 V  
6
5
4
3
2
1
0
6
5
4
3
2
V
V
= 1.2 V  
= 1.5 V  
= 1.8 V  
V
V
= 1.2 V  
= 1.5 V  
= 1.8 V  
CCB  
CCB  
CCB  
CCB  
CCB  
CCB  
V
V
1
0
V
V
= 2.5 V  
= 3.3 V  
V
V
= 2.5 V  
= 3.3 V  
CCB  
CCB  
CCB  
CCB  
0
10  
20  
30  
40  
50  
60  
0
10  
20  
30  
40  
50  
60  
C
L
- pF  
C - pF  
L
10  
SN74AVC1T45  
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES530D–DECEMBER 2003–REVISED NOVEMBER 2005  
TYPICAL CHARACTERISTICS  
TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE,  
TA = 25°C, VCCA = 1.8 V  
6
5
4
3
2
1
6
5
4
3
2
V
V
= 1.2 V  
= 1.5 V  
= 1.8 V  
V
V
= 1.2 V  
= 1.5 V  
= 1.8 V  
CCB  
CCB  
CCB  
CCB  
CCB  
CCB  
V
V
1
0
V
V
= 2.5 V  
= 3.3 V  
V
V
= 2.5 V  
= 3.3 V  
CCB  
CCB  
CCB  
CCB  
0
0
10  
20  
30  
40  
50  
60  
0
10  
20  
30  
40  
50  
60  
C
L
- pF  
C - pF  
L
TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE,  
TA = 25°C, VCCA = 2.5 V  
6
6
V
= 1.2 V  
= 1.5 V  
= 1.8 V  
V
V
= 1.2 V  
= 1.5 V  
= 1.8 V  
CCB  
CCB  
V
CCB  
CCB  
CCB  
V
CCB  
V
5
5
4
3
2
1
0
V
CCB  
= 2.5 V  
= 3.3 V  
V
V
= 2.5 V  
= 3.3 V  
CCB  
V
CCB  
CCB  
4
3
2
1
0
0
10  
20  
30  
40  
50  
60  
0
10  
20  
30  
40  
50  
60  
C
L
- pF  
C - pF  
L
11  
SN74AVC1T45  
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES530D–DECEMBER 2003–REVISED NOVEMBER 2005  
TYPICAL CHARACTERISTICS  
TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE,  
TA = 25°C, VCCA = 3.3 V  
6
5
4
3
2
1
0
6
5
4
3
2
1
0
V
= 1.2 V  
= 1.5 V  
= 1.8 V  
V
= 1.2 V  
= 1.5 V  
= 1.8 V  
CCB  
CCB  
CCB  
CCB  
V
V
V
V
CCB  
CCB  
V
V
= 2.5 V  
= 3.3 V  
V
V
= 2.5 V  
= 3.3 V  
CCB  
CCB  
CCB  
CCB  
0
10  
20  
30  
40  
50  
60  
0
10  
20  
30  
40  
50  
60  
C
L
- pF  
C - pF  
L
12  
SN74AVC1T45  
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES530D–DECEMBER 2003–REVISED NOVEMBER 2005  
PARAMETER MEASUREMENT INFORMATION  
2 × V  
CCO  
TEST  
S1  
S1  
R
L
Open  
GND  
t
Open  
pd  
From Output  
Under Test  
t
t
/t  
/t  
2 × V  
CCO  
GND  
PLZ PZL  
PHZ PZH  
C
L
R
L
(see Note A)  
t
w
LOAD CIRCUIT  
V
CCI  
V
CCI  
/2  
V
CCI  
/2  
Input  
C
L
V
TP  
R
L
V
CCO  
0 V  
1.2 V  
2 kΩ  
2 kΩ  
2 kΩ  
2 kΩ  
2 kΩ  
0.1 V  
0.1 V  
0.15 V  
0.15 V  
0.3 V  
15 pF  
15 pF  
15 pF  
15 pF  
15 pF  
VOLTAGE WAVEFORMS  
PULSE DURATION  
1.5 V ± 0.1 V  
1.8 V ± 0.15 V  
2.5 V ± 0.2 V  
3.3 V ± 0.3 V  
V
CCA  
Output  
Control  
(low-level  
enabling)  
V /2  
CCA  
V
CCA  
/2  
t
0 V  
t
PZL  
PLZ  
V
V
CCO  
Output  
Waveform 1  
V
CCI  
V
/2  
/2  
CCO  
Input  
V
CCI  
/2  
V
CCI  
/2  
V
+ V  
OL  
TP  
S1 at 2 × V  
CCO  
OL  
0 V  
(see Note B)  
t
t
PZH  
PHZ  
t
t
PHL  
PLH  
Output  
Waveform 2  
S1 at GND  
V
OH  
V
OH  
V
OH  
− V  
TP  
V
CCO  
Output  
V /2  
CCO  
V
CCO  
/2  
(see Note B)  
0 V  
V
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
NOTES: A. C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, Z = 50 Ω, dv/dt ≥ 1 V/ns.  
O
D. The outputs are measured one at a time, with one transition per measurement.  
E.  
F.  
G.  
H.  
I.  
t
t
t
V
V
and t  
and t  
and t  
are the same as t  
.
dis  
.
PLZ  
PZL  
PLH  
PHZ  
are the same as t  
PZH  
en  
are the same as t .  
pd  
PHL  
is the V associated with the input port.  
CC  
CCI  
is the V associated with the output port.  
CCO  
CC  
Figure 1. Load Circuit and Voltage Waveforms  
13  
SN74AVC1T45  
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES530D–DECEMBER 2003–REVISED NOVEMBER 2005  
APPLICATION INFORMATION  
Figure 2 shows an example of the SN74AVC1T45 being used in a unidirectional logic level-shifting application.  
V
CC1  
V
CC1  
V
CC2  
V
CC2  
1
2
3
6
5
4
SYSTEM-1  
SYSTEM-2  
PIN  
1
NAME  
VCCA  
GND  
A
FUNCTION  
VCC1  
GND  
OUT  
DESCRIPTION  
SYSTEM-1 supply voltage (1.2 V to 3.6 V)  
Device GND  
2
3
Output level depends on VCC1 voltage.  
Input threshold value depends on VCC2 voltage.  
GND (low level) determines B-port to A-port direction.  
SYSTEM-2 supply voltage (1.2 V to 3.6 V)  
4
B
IN  
5
DIR  
VCCB  
DIR  
6
VCC2  
Figure 2. Unidirectional Logic Level-Shifting Application  
14  
 
SN74AVC1T45  
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER  
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS  
www.ti.com  
SCES530D–DECEMBER 2003–REVISED NOVEMBER 2005  
APPLICATION INFORMATION  
Figure 3 shows the SN74AVC1T45 being used in a bidirectional logic level-shifting application. Since the  
SN74AVC1T45 does not have an output-enable (OE) pin, the system designer should take precautions to avoid  
bus contention between SYSTEM-1 and SYSTEM-2 when changing directions.  
V
CC1  
V
CC1  
V
CC2  
V
CC2  
Pullup/Pulldown  
or Bus Hold  
Pullup/Pulldown  
or Bus Hold  
I/O-1  
I/O-2  
†
†
1
2
3
6
5
4
DIR CTRL  
SYSTEM-1  
SYSTEM-2  
The following table shows data transmission from SYSTEM-1 to SYSTEM-2 and then from SYSTEM-2 to  
SYSTEM-1.  
STATE DIR CTRL  
I/O-1  
I/O-2  
DESCRIPTION  
1
H
Out  
In  
SYSTEM-1 data to SYSTEM-2  
SYSTEM-2 is getting ready to send data to SYSTEM-1. I/O-1 and I/O-2 are disabled. The  
bus-line state depends on pullup or pulldown.(1)  
2
H
Hi-Z  
Hi-Z  
DIR bit is flipped. I/O-1 and I/O-2 still are disabled. The bus-line state depends on pullup or  
pulldown.(1)  
3
4
L
L
Hi-Z  
Out  
Hi-Z  
In  
SYSTEM-2 data to SYSTEM-1  
(1) SYSTEM-1 and SYSTEM-2 must use the same conditions, i.e., both pullup or both pulldown.  
Figure 3. Bidirectional Logic Level-Shifting Application  
Enable Times  
Calculate the enable times for the SN74AVC1T45 using the following formulas:  
•
•
•
•
tPZH (DIR to A) = tPLZ (DIR to B) + tPLH (B to A)  
tPZL (DIR to A) = tPHZ (DIR to B) + tPHL (B to A)  
tPZH (DIR to B) = tPLZ (DIR to A) + tPLH (A to B)  
tPZL (DIR to B) = tPHZ (DIR to A) + tPHL (A to B)  
In a bidirectional application, these enable times provide the maximum delay from the time the DIR bit is  
switched until an output is expected. For example, if the SN74AVC1T45 initially is transmitting from A to B, then  
the DIR bit is switched; the B port of the device must be disabled before presenting it with an input. After the B  
port has been disabled, an input signal applied to it appears on the corresponding A port after the specified  
propagation delay.  
15  
 
PACKAGE OPTION ADDENDUM  
www.ti.com  
4-Nov-2005  
PACKAGING INFORMATION  
Orderable Device  
SN74AVC1T45DBVR  
SN74AVC1T45DBVRE4  
SN74AVC1T45DBVT  
SN74AVC1T45DBVTE4  
SN74AVC1T45DCKR  
SN74AVC1T45DCKRE4  
SN74AVC1T45DCKT  
SN74AVC1T45DCKTE4  
SN74AVC1T45DRLR  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
SOT-23  
DBV  
6
6
6
6
6
6
6
6
6
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SOT-23  
SOT-23  
SOT-23  
SC70  
DBV  
DBV  
DBV  
DCK  
DCK  
DCK  
DCK  
DRL  
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SC70  
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SC70  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SC70  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SOP  
4000 Green (RoHS &  
no Sb/Br)  
Call TI  
Level-1-260C-UNLIM  
SN74AVC1T45YEPR  
SN74AVC1T45YZPR  
ACTIVE  
ACTIVE  
WCSP  
WCSP  
YEP  
YZP  
6
6
3000  
3000  
TBD  
SNPB  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Pb-Free  
(RoHS)  
SNAGCU  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan  
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS  
&
no Sb/Br)  
-
please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,  
enhancements, improvements, and other changes to its products and services at any time and to discontinue  
any product or service without notice. Customers should obtain the latest relevant information before placing  
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and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI  
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