SN74AXCH8T245PWR [TI]
8 位双电源总线收发器 | PW | 24 | -40 to 125;
| 型号： | SN74AXCH8T245PWR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 8 位双电源总线收发器 | PW | 24 | -40 to 125 总线收发器 |
| 文件： | 总37页 (文件大小：1038K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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SN74AXCH8T245
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
具有可配置电压转换、三态输出和总线保持电路的
SN74AXCH8T245 8 位双电源总线收发器
1 特性
SN74AXCH8T245 器件旨在实现数据总线间的异步通
1
信。根据方向控制输入（DIR1 和 DIR2）的逻辑电
平，此器件将数据从 A 总线传输至 B 总线，或者将数
据从 B 总线传输至 A 总线。输出使能 (OE) 输入可用
于禁用输出，从而有效隔离总线。
•
通过认证且完全可配置的双电源轨设计可允许各个
端口在 0.65V 至 3.6V 的电源电压范围内运行
工作温度范围 -40°C 至 +125°C
•
•
总线保持数据输入消除了对外部上拉或下拉电阻的
需求
SN74AXCH8T245 器件旨在使控制引脚（DIR 和
OE）以 VCCA 为基准。
•
•
多向控制引脚，支持同步升降转换
从 1.8V 转换到 3.3V 时，支持高达 380Mbps 的转
换速率
有源总线保持电路会将未使用或未驱动的输入保持在有
效逻辑状态。不建议在总线保持电路上使用上拉或下拉
电阻器。如果 VCCA 或 VCCB 连上电源，则总线保持电
路在所有 A 端口和 B 端口上均始终保持工作状态，与
方向控制或输出使能无关。
•
•
•
VCC 隔离功能可在断电情况下有效隔离两条总线
局部断电模式可在断电情况下限制回流电流
兼容 SN74AVCH8T245 和 74AVCH8T245 电平转
换器
•
•
闩锁性能超出 JESD 78 II 类规范要求的 100mA
该器件完全 适用于 使用 Ioff 的不完全断电应用。当器
件断电时，Ioff 电路将会禁用输出。这会抑制电流反流
到器件中，从而防止损坏器件。
静电放电 (ESD) 保护性能超过 JESD 22 规范的要
求
–
–
8000V 人体放电模型
1000V 充电器件模型
VCC 隔离功能可确保当任一 VCC 输入电源低于 100mV
时，所有电平转换器输出都将禁用并处于高阻抗状态。
为了确保电平转换器 I/O 在上电或掉电期间处于高阻抗
状态，应将 OE 通过上拉电阻器接到 VCCA；该电阻器
的最小值取决于驱动器的灌电流能力。
2 应用
•
•
•
•
•
•
•
企业与通信
无线基础设施
楼宇自动化
器件信息(1)
数据中心交换机
企业级固态硬盘
机架式服务器
器件编号
封装
封装尺寸（标称值）
7.80mm × 4.40mm
5.50mm × 3.50mm
SN74AXCH8T245PW
SN74AXCH8T245RHL
TSSOP (24)
VQFN (24)
电子销售点 (EPOS)
(1) 如需了解所有可用封装，请参阅产品说明书末尾的可订购产品
附录。
3 说明
SN74AXCH8T245 器件是一款 8 位同相总线收发器，
可用于解决在最新电压节点（0.7V、0.8V、0.9V）上
运行的器件与在行业标准电压节点（1.8V、2.5V、
3.3V）上运行的器件之间的电压电平不匹配问题。
典型应用原理图
3.3 V
1.5 V
Processor
VCCA DIR1 DIR2
VCCB
B1
Power Management
A1
A2
A3
A4
Control Block
B2
B3
B4
B5
B6
B7
B8
该器件通过两条独立电源轨（VCCA 和 VCCB）。数据引
脚 A1 至 A8 均用于跟踪 VCCA，可承受 0.65V-3.6V 范
围内的任何电源电压。数据引脚 B1 至 B8 均用于跟踪
SN74AXCH8T245
Data Block
Interrupts
Register Map
Sensor Block
A5
A6
A7
A8
GND
GND
VCCB，可承受 0.65V-3.6V 范围内的任何电源电压。此
外，SN74AXCH8T245 还与单电源系统兼容。
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SCES876
SN74AXCH8T245
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
www.ti.com.cn
目录
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Information.................................................. 5
6.5 Electrical Characteristics........................................... 6
6.6 Switching Characteristics, VCCA = 0.7 V ................... 8
6.7 Switching Characteristics, VCCA = 0.8 V ................... 9
6.8 Switching Characteristics, VCCA = 0.9 V ................. 10
6.9 Switching Characteristics, VCCA = 1.2 V ................. 11
6.10 Switching Characteristics, VCCA = 1.5 V ............... 12
6.11 Switching Characteristics, VCCA = 1.8 V ............... 13
6.12 Switching Characteristics, VCCA = 2.5 V ............... 14
6.13 Switching Characteristics, VCCA = 3.3 V ............... 15
6.14 Operating Characteristics: TA = 25°C ................... 16
Parameter Measurement Information ................ 18
8
9
Detailed Description ............................................ 20
8.1 Overview ................................................................. 20
8.2 Functional Block Diagram ....................................... 20
8.3 Feature Description................................................. 21
8.4 Device Functional Modes........................................ 21
Application and Implementation ........................ 22
9.1 Application Information............................................ 22
9.2 Typical Application ................................................. 22
10 Power Supply Recommendations ..................... 24
11 Layout................................................................... 24
11.1 Layout Guidelines ................................................. 24
11.2 Layout Example .................................................... 24
12 器件和文档支持 ..................................................... 25
12.1 文档支持 ............................................................... 25
12.2 接收文档更新通知 ................................................. 25
12.3 社区资源................................................................ 25
12.4 商标....................................................................... 25
12.5 静电放电警告......................................................... 25
12.6 术语表 ................................................................... 25
13 机械、封装和可订购信息....................................... 26
7
4 修订历史记录
Changes from Original (August 2018) to Revision A
Page
•
•
•
已添加 向器件信息表添加了 RHL 封装................................................................................................................................... 1
Added RHL package pinout ................................................................................................................................................... 3
Added RHL package to Thermal Information table ............................................................................................................... 5
2
Copyright © 2018–2019, Texas Instruments Incorporated
SN74AXCH8T245
www.ti.com.cn
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
5 Pin Configuration and Functions
PW Package
24-Pin TSSOP
Top View
RHL Package(1)
24-Pin VQFN
Top View
VCCA
DIR1
A1
A2
A3
A4
A5
A6
A7
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
VCCB
VCCB
OE
B1
B2
B3
B4
B5
B6
B7
2
3
23
DIR1
A1
VCCB
22 OE
4
21
20
19
18
17
16
15
14
A2
B1
B2
B3
B4
B5
B6
B7
B8
5
A3
6
A4
PAD
7
A5
9
16
15
14
13
8
A6
A8
DIR2
GND
10
11
12
9
A7
B8
GND
10
11
A8
DIR2
(1) PAD - may be grounded (recommended) or left floating.
Pin Functions
PIN
I/O
DESCRIPTION
NAME
A1
PW, RHL
3
4
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
Input/output A1. Referenced to VCCA
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
A2
Input/output A2. Referenced to VCCA
Input/output A3. Referenced to VCCA
Input/output A4. Referenced to VCCA
Input/output A5. Referenced to VCCA
Input/output A6. Referenced to VCCA
Input/output A7. Referenced to VCCA
Input/output A8. Referenced to VCCA
Input/output B1. Referenced to VCCB
Input/output B2. Referenced to VCCB
Input/output B3. Referenced to VCCB
Input/output B4. Referenced to VCCB
Input/output B5. Referenced to VCCB
Input/output B6. Referenced to VCCB
Input/output B7. Referenced to VCCB
Input/output B8. Referenced to VCCB
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
21
20
19
18
17
16
15
14
2
B1
B2
B3
B4
B5
B6
B7
B8
DIR1
Direction-control signal. Referenced to VCCA.
Direction-control signal. Referenced to VCCA. See Multiple Direction Control Pins for
additional details. Tie to GND to maintain backwards compatibility with the SN74AVCH8T245
device.
DIR2
GND
11
I
12
13
—
—
Ground
Ground
Output Enable. Pull to GND to enable all outputs. Pull to VCCA to place all outputs in high-
OE
22
I
impedance mode. Referenced to VCCA
.
VCCA
1
—
—
—
A-port supply voltage. 0.65 V ≤ VCCA ≤ 3.6 V
B-port supply voltage. 0.65 V ≤ VCCB ≤ 3.6 V
B-port supply voltage. 0.65 V ≤ VCCB ≤ 3.6 V
23
24
VCCB
Copyright © 2018–2019, Texas Instruments Incorporated
3
SN74AXCH8T245
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–0.5
–50
MAX
4.2
4.2
4.2
4.2
4.2
4.2
4.2
UNIT
V
Supply voltage, VCCA
Supply voltage, VCCB
V
I/O ports (A port)
I/O ports (B port)
Control inputs
A port
Input voltage, VI(2)
V
V
Voltage applied to any output
in the high-impedance or power-off state, VO
(2)
B port
A port
VCCA + 0.2
VCCB + 0.2
(2) (3)
Voltage applied to any output in the high or low state, VO
V
B port
Input clamp current, IIK
VI < 0
mA
mA
mA
mA
°C
Output clamp current, IOK
VO < 0
–50
Continuous output current, IO
Continuous current through VCCA, VCCB, or GND
Junction Temperature, TJ
–50
50
–100
100
150
150
Storage temperature, Tstg
–65
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The output positive-voltage rating may be exceeded up to 4.2 V maximum if the output current rating is observed.
6.2 ESD Ratings
VALUE
±8000
±1000
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
4
Copyright © 2018–2019, Texas Instruments Incorporated
SN74AXCH8T245
www.ti.com.cn
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
(1)(2)(3)
MIN
0.65
MAX
3.6
UNIT
V
VCCA
VCCB
Supply voltage
Supply voltage
0.65
3.6
V
VCCI = 0.65 V - 0.75 V
VCCI = 0.76 V - 1 V
VCCI = 1.1 V - 1.95 V
VCCI = 2.3 V - 2.7 V
VCCI = 3 V - 3.6 V
VCCI × 0.70
VCCI × 0.70
VCCI × 0.65
1.6
Data inputs
2
VIH
High-level input voltage
V
VCCA = 0.65 V - 0.75 V
VCCA = 0.76 V - 1 V
VCCA = 1.1 V - 1.95 V
VCCA = 2.3 V - 2.7 V
VCCA = 3 V - 3.6 V
VCCI = 0.65 V - 0.75 V
VCCI = 0.76 V - 1 V
VCCI = 1.1 V - 1.95 V
VCCI = 2.3 V - 2.7 V
VCCI = 3 V - 3.6 V
VCCA × 0.70
VCCA × 0.70
VCCA × 0.65
1.6
Control inputs
(DIR, OE)
Referenced to VCCA
2
VCCI × 0.30
VCCI × 0.30
VCCI × 0.35
0.7
Data inputs
0.8
VIL
Low-level input voltage
V
VCCA = 0.65 V - 0.75 V
VCCA = 0.76 V - 1 V
VCCA = 1.1 V - 1.95 V
VCCA = 2.3 V - 2.7 V
VCCA = 3 V - 3.6 V
VCCA × 0.30
VCCA × 0.30
VCCA × 0.35
0.7
Control inputs
(DIR, OE)
Referenced to VCCA
0.8
VI
Input voltage(3)
Output voltage
0
0
0
3.6
V
V
(2)
Active state
Tri-state
VCCO
VO
3.6
10
Δt/Δv
Input transition rise or fall rate
Operating free-air temperature
ns/V
°C
TA
–40
125
(1) VCCI is the VCC associated with the input port.
(2) VCCO is the VCC associated with the output port.
(3) All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. See the Implications of Slow or
Floating CMOS Inputs application report.
6.4 Thermal Information
SN74AXCH8T245
THERMAL METRIC(1)
PW (TSSOP)
24 PINS
101.7
45.4
RHL (VQFN)
24 PINS
35
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
39.9
56.9
13.8
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
7.0
0.3
ψJB
56.4
13.8
RθJC(bot)
N/A
1.4
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Copyright © 2018–2019, Texas Instruments Incorporated
5
SN74AXCH8T245
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
www.ti.com.cn
6.5 Electrical Characteristics
Over recommended operating free-air temperature range (unless otherwise noted)(1)
–40°C to 85°C
MIN TYP(2) MAX
–40°C to 125°C
MIN TYP(2) MAX
VCCO – 0.1
PARAMETER
TEST CONDITIONS
VCCA
VCCB
UNIT
IOH = –100 µA
IOH = –50 µA
IOH = –200 µA
IOH = –500 µA
0.7 V - 3.6 V
0.65 V
0.76 V
0.85 V
1.1 V
0.7 V - 3.6 V
0.65 V
0.76 V
0.85 V
1.1 V
VCCO – 0.1
0.55
0.58
0.65
0.85
1.05
1.2
0.55
0.58
0.65
0.85
1.05
1.2
High-level
VOH
output
VI = VIH
IOH = -3 mA
IOH = -6 mA
IOH = -8 mA
IOH = -9 mA
IOH = -12 mA
IOL = 100 µA
IOL = 50 µA
IOL = 200 µA
IOL = 500 µA
IOL = 3 mA
IOL = 6 mA
IOL = 8 mA
IOL = 9 mA
IOL = 12 mA
V
voltage
1.4 V
1.4 V
1.65 V
2.3 V
1.65 V
2.3 V
1.75
2.3
1.75
2.3
3 V
3 V
0.7 V - 3.6 V
0.65 V
0.76 V
0.85 V
1.1 V
0.7 V - 3.6 V
0.65 V
0.76 V
0.85 V
1.1 V
0.1
0.1
0.1
0.1
0.18
0.2
0.18
0.2
Low-level
output
VOL
VI = VIL
0.25
0.35
0.45
0.55
0.7
0.25
0.35
0.45
0.55
0.7
V
voltage
1.4 V
1.4 V
1.65 V
2.3 V
1.65 V
2.3 V
3 V
3 V
VI= 0.20 V
VI= 0.23 V
VI= 0.26 V
VI= 0.39 V
VI= 0.49 V
VI= 0.58 V
VI= 0.7 V
0.65 V
0.76 V
0.85 V
1.1 V
0.65 V
0.76 V
0.85 V
1.1 V
4
8
4
7
10
10
Bus-hold
low
20
20
IBHL
µA
µA
µA
sustaining
1.4 V
1.4 V
40
30
(3)
current
1.65 V
2.3 V
1.65 V
2.3 V
55
45
90
80
VI= 0.8 V
3 V
3 V
145
–4
135
–4
VI= 0.45 V
VI= 0.53 V
VI= 0.59 V
VI= 0.71 V
VI= 0.91 V
VI= 1.07 V
VI= 1.6 V
0.65 V
0.76 V
0.85 V
1.1 V
0.65 V
0.76 V
0.85 V
1.1 V
–8
–7
–10
–20
–40
–55
–90
–145
40
–10
–20
–30
–45
–80
–135
40
Bus-hold
high
IBHH
sustaining
1.4 V
1.4 V
(4)
current
1.65 V
2.3 V
1.65 V
2.3 V
VI= 2.0 V
3 V
3 V
0.75 V
0.84 V
0.95 V
1.3 V
0.75 V
0.84 V
0.95 V
1.3 V
50
50
65
65
Bus-hold
low
105
150
205
335
480
105
150
205
335
480
IBHLO
VI= 0 to VCC
overdrive
1.6 V
1.6 V
(5)
current
1.95 V
2.7 V
1.95 V
2.7 V
3.6V
3.6V
(1) VCCO is the VCC associated with the output port.
(2) All typical values are for TA = 25°C.
(3) The bus-hold circuit can sink at least the minimum low sustaining current at VIL(MAX). IBHL should be measured after lowering VI to
GND and then raising it to VIL(MAX).
(4) The bus-hold circuit can source at least the minimum high sustaining current at VIH(MIN). IBHH should be measured after raising VI to
VCC and then lowering it to VIH(MIN).
(5) An external driver must source at least IBHLO to switch this node from low to high.
6
Copyright © 2018–2019, Texas Instruments Incorporated
SN74AXCH8T245
www.ti.com.cn
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
Electrical Characteristics (continued)
Over recommended operating free-air temperature range (unless otherwise noted)(1)
–40°C to 85°C
MIN TYP(2) MAX
–40°C to 125°C
MIN TYP(2) MAX
PARAMETER
TEST CONDITIONS
VCCA
VCCB
UNIT
0.75 V
0.84 V
0.95 V
1.3 V
0.75 V
0.84 V
0.95 V
1.3 V
–40
–50
–40
–50
–65
–65
Bus-hold
high
–105
–150
–205
–335
–480
–105
–150
–205
–335
–480
IBHHO
VI= 0 to VCC
µA
overdrive
1.6 V
1.6 V
(6)
current
1.95 V
2.7 V
1.95 V
2.7 V
3.6V
3.6V
Input
leakage
current
Control Inputs (DIR, OE):
VI = VCCA or GND
0.65 V - 3.6
V
II
0.65 V - 3.6 V
–0.5
0.5
–1
1
µA
µA
A Port:
VI or VO = 0 V - 3.6 V
Partial
power
down
0 V
0 V - 3.6 V
0 V
–8
–8
8
8
–12
–12
12
12
Ioff
B Port:
VI or VO = 0 V - 3.6 V
0 V - 3.6 V
current
A Port:
VO = VCCO or GND, VI = VCCI
or GND, OE = VIH
3.6 V
3.6 V
3.6 V
–8
–8
8
–12
–12
12
High-
impedance
state output
current
IOZ
µA
B Port:
VO = VCCO or GND, VI = VCCI
or GND, OE = VIH
3.6 V
8
12
42
0.65 V - 3.6
V
0.65 V - 3.6 V
20
VCCA supply
current
ICCA
VI = VCCI or GND, IO = 0 mA
µA
µA
0 V
3.6 V
0 V
–2
–2
–12
–12
3.6 V
13
20
13
27
40
27
0.65 V - 3.6
V
0.65 V - 3.6 V
VCCB supply
current
ICCB
VI = VCCI or GND, IO = 0 mA
0 V
3.6 V
0 V
3.6 V
Combined
supply
current
ICCA
ICCB
+
0.65 V - 3.6
V
VI = VCCI or GND, IO = 0 mA
Control Inputs (DIR, OE):
0.65 V - 3.6 V
3.3 V
30
60
µA
pF
pF
Input
Ci
3.3 V
3.3 V
4.5
7.3
4.5
7.3
capacitance VI = 3.3 V or GND
Ports A and B:
Data I/O
capacitance
Cio
OE = VCCA, VO = 1.65V DC +
1 MHz -16 dBm sine wave
3.3 V
(6) An external driver must sink at least IBHHO to switch this node from high to low.
Copyright © 2018–2019, Texas Instruments Incorporated
7
SN74AXCH8T245
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
www.ti.com.cn
6.6 Switching Characteristics, VCCA = 0.7 V
See Figure 1 and Figure 2 for test circuit and loading conditions. See Figure 3 and Figure 4 for measurement waveforms.
B-PORT SUPPLY VOLTAGE (VCCB
)
TEST
CONDITION
PARAMETER
0.7 V ± 0.05 V
0.8 V ± 0.04 V 0.9 V ± 0.045 V
1.2 V ± 0.1 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
178
178
178
178
194
194
216
216
240
240
292
292
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
115
115
159
159
194
194
179
179
240
240
180
180
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
83
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
49
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
A input to
B output
83
49
Propagation
delay
tpd
ns
132
132
194
194
158
158
240
240
125
125
94
B input to
A output
94
194
194
78
OE input to
A output
Disable
time
tdis
ns
ns
OE input to
B output
78
240
240
76
OE input to
A output
ten Enable time
OE input to
B output
76
B-PORT SUPPLY VOLTAGE (VCCB
)
TEST
CONDITION
PARAMETER
1.5 V ± 0.1 V
1.8 V ± 0.15 V 2.5 V ± 0.2 V
3.3 V ± 0.3 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
47
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
50
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
62
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
151
151
86
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
A input to
B output
47
50
62
Propagation
delay
tpd
ns
89
88
87
B input to
A output
89
88
87
86
194
194
70
194
194
69
194
194
67
194
194
101
101
240
240
552
552
OE input to
A output
tdis Disable time
ns
ns
OE input to
B output
70
69
67
240
240
69
240
240
69
240
240
84
OE input to
A output
ten Enable time
OE input to
B output
69
69
84
8
Copyright © 2018–2019, Texas Instruments Incorporated
SN74AXCH8T245
www.ti.com.cn
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
6.7 Switching Characteristics, VCCA = 0.8 V
See Figure 1 and Figure 2 for test circuit and loading conditions. See Figure 3 and Figure 4 for measurement waveforms.
B-PORT SUPPLY VOLTAGE (VCCB
)
TEST
CONDITION
PARAMETER
0.7 V ± 0.05 V
0.8 V ± 0.04 V 0.9 V ± 0.045 V
1.2 V ± 0.1 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
159
159
117
117
154
154
202
202
137
137
270
270
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
96
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
64
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
33
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
A input to
B output
96
64
33
Propagation
delay
tpd
ns
97
79
54
B input to
A output
97
79
54
154
154
165
165
137
137
160
160
154
154
144
144
137
137
104
104
154
154
65
OE input
to A output
Disable
time
tdis
ns
ns
OE input
to B output
65
137
137
55
OE input
to A output
ten Enable time
OE input
to B output
55
B-PORT SUPPLY VOLTAGE (VCCB
1.8 V ± 0.15 V 2.5 V ± 0.2 V
)
TEST
CONDITION
PARAMETER
1.5 V ± 0.1 V
3.3 V ± 0.3 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
27
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
26
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
26
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
35
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
A input to
B output
27
26
26
35
Propagation
delay
tpd
ns
44
43
42
41
B input to
A output
44
43
42
41
154
154
57
154
154
55
154
154
50
154
154
52
OE input to
A output
tdis Disable time
ns
ns
OE input to
B output
57
55
50
52
137
137
46
137
137
44
137
137
46
137
137
59
OE input to
A output
ten Enable time
OE input to
B output
46
44
46
59
Copyright © 2018–2019, Texas Instruments Incorporated
9
SN74AXCH8T245
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
www.ti.com.cn
6.8 Switching Characteristics, VCCA = 0.9 V
See Figure 1 and Figure 2 for test circuit and loading conditions. See Figure 3 and Figure 4 for measurement waveforms.
B-PORT SUPPLY VOLTAGE (VCCB
)
TEST
CONDITION
PARAMETER
0.7 V ± 0.05 V
0.8 V ± 0.04 V 0.9 V ± 0.045 V
1.2 V ± 0.1 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
133
133
84
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
79
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
53
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
23
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
A input to
output
79
53
23
Propagation
delay
tpd
ns
64
53
41
B input to
A output
84
64
53
41
130
130
193
193
128
128
257
257
130
130
157
157
128
128
149
149
130
130
137
137
128
128
94
130
130
57
OE input to
A output
Disable
time
tdis
ns
ns
OE input to
B output
57
128
128
45
OE input to
A output
ten Enable time
OE input to
B output
94
45
B-PORT SUPPLY VOLTAGE (VCCB
1.8 V ± 0.15 V 2.5 V ± 0.2 V
)
TEST
CONDITION
PARAMETER
1.5 V ± 0.1 V
3.3 V ± 0.3 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
18
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
16
MIN
MAX
15
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
18
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
A input to
B output
18
16
15
18
Propagation
delay
tpd
ns
29
25
23
22
B input to
A output
29
25
23
22
130
130
50
130
130
48
130
130
42
130
130
43
OE input to
A output
tdis Disable time
ns
ns
OE input to
B output
50
48
42
43
128
128
37
128
128
34
128
128
32
128
128
36
OE input to
A output
ten Enable time
OE input to
B output
37
34
32
36
10
Copyright © 2018–2019, Texas Instruments Incorporated
SN74AXCH8T245
www.ti.com.cn
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
6.9 Switching Characteristics, VCCA = 1.2 V
See Figure 1 and Figure 2 for test circuit and loading conditions. See Figure 3 and Figure 4 for measurement waveforms.
B-PORT SUPPLY VOLTAGE (VCCB
)
TEST
CONDITION
PARAMETER
0.7 V ± 0.05 V
0.8 V ± 0.04 V 0.9 V ± 0.045 V
1.2 V ± 0.1 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
95
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
54
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
40
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
15
15
15
15
47
47
49
49
40
40
34
34
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
A input to
B output
95
54
40
Propagation
delay
tpd
ns
49
33
23
B input to
A output
49
33
23
47
47
47
OE input to
A output
47
47
47
tdis Disable time
ns
ns
181
181
40
147
147
40
127
127
40
OE input to
B output
OE input to
A output
40
40
40
ten Enable time
221
221
132
132
81
OE input to
B output
81
B-PORT SUPPLY VOLTAGE (VCCB
1.8 V ± 0.15 V 2.5 V ± 0.2 V
MAX
)
TEST
CONDITION
PARAMETER
1.5 V ± 0.1 V
MIN
3.3 V ± 0.3 V
UNIT
MAX
11
11
12
12
47
47
42
42
39
39
25
25
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
9
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
8
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
8
A input to
B output
9
8
8
Propagation
tpd
ns
delay
10
10
47
47
40
40
40
40
22
22
8
8
B input to
A output
8
8
47
47
34
34
40
40
20
20
47
47
34
34
40
40
19
19
OE input to
A output
tdis Disable time
ns
ns
OE input to
B output
OE input to
A output
ten Enable time
OE input to
B output
Copyright © 2018–2019, Texas Instruments Incorporated
11
SN74AXCH8T245
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
www.ti.com.cn
6.10 Switching Characteristics, VCCA = 1.5 V
See Figure 1 and Figure 2 for test circuit and loading conditions. See Figure 3 and Figure 4 for measurement waveforms.
B-PORT SUPPLY VOLTAGE (VCCB
)
TEST
CONDITION
PARAMETER
0.7 V ± 0.05 V
0.8 V ± 0.04 V 0.9 V ± 0.045 V
1.2 V ± 0.1 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
90
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
44
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
29
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
12
12
11
11
37
37
44
44
25
25
29
29
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
A input to
B output
90
44
29
Propagation
delay
tpd
ns
47
27
18
B input to
A output
47
27
18
37
37
37
OE input to
A output
37
37
37
tdis Disable time
ns
ns
176
176
25
142
142
25
122
122
25
OE input to
B output
OE input to
A output
25
25
25
ten Enable time
214
214
114
114
71
OE input to
B output
71
B-PORT SUPPLY VOLTAGE (VCCB
)
TEST
CONDITION
PARAMETER
1.5 V ± 0.1 V
1.8 V ± 0.15 V 2.5 V ± 0.2 V
3.3 V ± 0.3 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
9
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
8
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
6
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
6
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
A input to
B output
9
8
6
6
Propagation
delay
tpd
ns
9
8
6
5
B input to
A output
9
8
6
5
37
37
38
38
25
25
21
21
37
37
37
37
25
25
18
18
37
37
31
31
25
25
15
15
37
37
31
31
25
25
13
13
OE input to
A output
tdis Disable time
ns
ns
OE input to
B output
OE input to
A output
ten Enable time
OE input to
B output
12
Copyright © 2018–2019, Texas Instruments Incorporated
SN74AXCH8T245
www.ti.com.cn
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
6.11 Switching Characteristics, VCCA = 1.8 V
See Figure 1 and Figure 2 for test circuit and loading conditions. See Figure 3 and Figure 4 for measurement waveforms.
B-PORT SUPPLY VOLTAGE (VCCB
)
TEST
CONDITION
PARAMETER
0.7 V ± 0.05 V
0.8 V ± 0.04 V 0.9 V ± 0.045 V
1.2 V ± 0.1 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
88
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
43
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
10
10
9
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
25
25
A input to
B output
88
43
Propagation
delay
tpd
ns
50
26
16
B input to
A output
50
26
16
9
35
35
35
35
35
42
42
20
20
27
27
OE input to
A output
35
35
35
tdis Disable time
ns
ns
174
174
20
139
139
20
119
119
20
OE input to
B output
OE input to
A output
20
20
20
ten Enable time
213
213
111
111
67
OE input to
B output
67
B-PORT SUPPLY VOLTAGE (VCCB
1.8 V ± 0.15 V 2.5 V ± 0.2 V
)
TEST
CONDITION
PARAMETER
1.5 V ± 0.1 V
3.3 V ± 0.3 V
UNIT
MIN
MAX
8
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
7
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
6
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
5
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
A input to
B output
8
7
6
5
Propagation
delay
tpd
ns
7
6
5
4
B input to
A output
7
7
5
4
35
35
36
36
20
20
19
19
35
35
35
35
20
20
16
16
35
35
30
30
20
20
13
13
35
35
29
29
20
20
11
11
OE input to
A output
Disable
time
tdis
ns
ns
OE input to
B output
OE input to
A output
ten Enable time
OE input to
B output
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6.12 Switching Characteristics, VCCA = 2.5 V
See Figure 1 and Figure 2 for test circuit and loading conditions. See Figure 3 and Figure 4 for measurement waveforms.
B-PORT SUPPLY VOLTAGE (VCCB
)
TEST
CONDITION
PARAMETER
0.7 V ± 0.05 V
0.8 V ± 0.04 V 0.9 V ± 0.045 V
1.2 V ± 0.1 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
87
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
42
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
23
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
8
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
A input to
B output
87
42
23
8
Propagation
delay
tpd
ns
62
26
15
8
B input to
A output
62
26
15
8
28
28
28
28
28
40
40
13
13
24
24
OE input to
A output
28
28
28
Disable
time
tdis
ns
ns
173
173
13
137
137
13
117
117
13
OE input to
B output
OE input to
A output
13
13
13
ten Enable time
211
211
107
107
63
OE input to
B output
63
B-PORT SUPPLY VOLTAGE (VCCB
1.8 V ± 0.15 V 2.5 V ± 0.2 V
MAX
)
TEST
CONDITION
PARAMETER
1.5 V ± 0.1 V
3.3 V ± 0.3 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
6
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
6
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
5
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
5
A input to
B output
6
6
5
5
Propagation
tpd
ns
delay
6
6
5
4
B input to
A output
6
6
5
4
28
28
34
34
13
13
16
16
28
28
33
33
13
13
14
14
28
28
28
28
13
13
10
10
28
28
28
28
13
13
9
OE input to
A output
tdis Disable time
ns
ns
OE input to
B output
OE input to
A output
ten Enable time
OE input to
B output
9
14
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6.13 Switching Characteristics, VCCA = 3.3 V
See Figure 1 and Figure 2 for test circuit and loading conditions. See Figure 3 and Figure 4 for measurement waveforms.
B-PORT SUPPLY VOLTAGE (VCCB
)
TEST
CONDITION
PARAMETER
0.7 V ± 0.05 V
0.8 V ± 0.04 V 0.9 V ± 0.045 V
1.2 V ± 0.1 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
87
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
41
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
8
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
22
22
A input to
B output
87
41
8
Propagation
delay
tpd
ns
151
151
27
36
18
8
B input to
A output
36
18
8
27
27
27
27
39
39
11
11
23
23
OE input to
A output
27
27
27
tdis Disable time
ns
ns
172
172
11
136
136
11
116
116
11
OE input to
B output
OE input to
A output
11
11
11
ten Enable time
210
210
106
106
62
OE input to
B output
62
B-PORT SUPPLY VOLTAGE (VCCB
)
TEST
CONDITION
PARAMETER
1.5 V ± 0.1 V
MAX
1.8 V ± 0.15 V 2.5 V ± 0.2 V
3.3 V ± 0.3 V
UNIT
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
5
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
4
MIN
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
MAX
4
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
5
A input to
B output
5
5
4
4
Propagation
delay
tpd
ns
6
5
5
4
B input to
A output
6
5
5
4
27
27
33
33
11
11
15
15
27
27
32
32
11
11
13
13
27
27
27
27
11
11
10
10
27
27
27
27
11
11
8
OE input to
A output
tdis Disable time
ns
ns
OE input to
B output
OE input to
A output
ten Enable time
OE input to
B output
8
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6.14 Operating Characteristics: TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
VCCA = VCCB = 0.7 V
3.0
3.0
VCCA = VCCB = 0.8 V
VCCA = VCCB = 0.9 V
VCCA = VCCB = 1.2 V
VCCA = VCCB = 1.5 V
VCCA = VCCB = 1.8 V
VCCA = VCCB = 2.5 V
VCCA = VCCB = 3.3 V
VCCA = VCCB = 0.7 V
VCCA = VCCB = 0.8 V
VCCA = VCCB = 0.9 V
VCCA = VCCB = 1.2 V
VCCA = VCCB = 1.5 V
VCCA = VCCB = 1.8 V
VCCA = VCCB = 2.5 V
VCCA = VCCB = 3.3 V
VCCA = VCCB = 0.7 V
VCCA = VCCB = 0.8 V
VCCA = VCCB = 0.9 V
VCCA = VCCB = 1.2 V
VCCA = VCCB = 1.5 V
VCCA = VCCB = 1.8 V
VCCA = VCCB = 2.5 V
VCCA = VCCB = 3.3 V
VCCA = VCCB = 0.7 V
VCCA = VCCB = 0.8 V
VCCA = VCCB = 0.9 V
VCCA = VCCB = 1.2 V
VCCA = VCCB = 1.5 V
VCCA = VCCB = 1.8 V
VCCA = VCCB = 2.5 V
VCCA = VCCB = 3.3 V
3.0
Power dissipation
CL = 0, RL = Open
3.1
CpdA capacitance per transceiver
f = 1 MHz, tr = tf = 1 ns
(A to B: outputs enabled)
pF
3.0
3.2
3.7
4.4
2.5
2.5
2.6
Power dissipation
CL = 0, RL = Open
2.6
CpdA capacitance per transceiver
f = 1 MHz, tr = tf = 1 ns
pF
pF
pF
2.6
(A to B: outputs disabled)
2.7
3.2
3.9
12.6
12.3
12.4
12.4
12.7
13.6
17.4
20.9
1.2
Power dissipation
CL = 0, RL = Open
CpdA capacitance per transceiver
f = 1 MHz, tr = tf = 1 ns
(B to A: outputs enabled)
1.1
1.1
Power dissipation
CL = 0, RL = Open
1.0
CpdA capacitance per transceiver
f = 1 MHz, tr = tf = 1 ns
1.0
(B to A: outputs disabled)
0.9
0.9
0.9
16
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Operating Characteristics: TA = 25°C (continued)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
12.6
12.4
12.4
12.4
12.6
13.6
17.2
20.8
1.4
UNIT
VCCA = VCCB = 0.7 V
VCCA = VCCB = 0.8 V
VCCA = VCCB = 0.9 V
VCCA = VCCB = 1.2 V
VCCA = VCCB = 1.5 V
VCCA = VCCB = 1.8 V
VCCA = VCCB = 2.5 V
VCCA = VCCB = 3.3 V
VCCA = VCCB = 0.7 V
VCCA = VCCB = 0.8 V
VCCA = VCCB = 0.9 V
VCCA = VCCB = 1.2 V
VCCA = VCCB = 1.5 V
VCCA = VCCB = 1.8 V
VCCA = VCCB = 2.5 V
VCCA = VCCB = 3.3 V
VCCA = VCCB = 0.7 V
VCCA = VCCB = 0.8 V
VCCA = VCCB = 0.9 V
VCCA = VCCB = 1.2 V
VCCA = VCCB = 1.5 V
VCCA = VCCB = 1.8 V
VCCA = VCCB = 2.5 V
VCCA = VCCB = 3.3 V
VCCA = VCCB = 0.7 V
VCCA = VCCB = 0.8 V
VCCA = VCCB = 0.9 V
VCCA = VCCB = 1.2 V
VCCA = VCCB = 1.5 V
VCCA = VCCB = 1.8 V
VCCA = VCCB = 2.5 V
VCCA = VCCB = 3.3 V
Power dissipation
CpdB capacitance per transceiver
(A to B: outputs enabled)
CL = 0, RL = Open
f = 1 MHz, tr = tf = 1 ns
pF
1.3
1.3
Power dissipation
CpdB capacitance per transceiver
(A to B: outputs disabled)
1.2
CL = 0, RL = Open
f = 1 MHz, tr = tf = 1 ns
1.1
pF
pF
pF
1.1
1.1
1.0
3.3
3.3
3.3
Power dissipation
CpdB capacitance per transceiver
(B to A: outputs enabled)
3.2
CL = 0, RL = Open
f = 1 MHz, tr = tf = 1 ns
3.2
3.3
3.6
4.4
2.8
2.8
2.8
Power dissipation
CpdB capacitance per transceiver
(B to A: outputs disabled)
2.8
CL = 0, RL = Open
f = 1 MHz, tr = tf = 1 ns
2.7
2.8
3.1
3.9
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7 Parameter Measurement Information
Unless otherwise noted, all input pulses are supplied by generators having the following characteristics:
•
•
•
f =1 MHz
Z0 = 50 Ω
dv / dt ≤ 1 ns/V
Measurement Point
2 X VCCO
Open
S1
RL
Output Pin
Under Test
GND
(1)
CL
RL
(1) CL includes probe and jig capacitance.
图 1. Load Circuit
VCCO
RL
CL
VTP
Parameter
tpd
S1
Open
Open
1.1 V - 3.6 V
2 kꢀ 15 pF
N/A
N/A
0.65 V - 0.95 V 20 kꢀ 15 pF
3 V - 3.6 V 2 kꢀ 15 pF
1.65 V - 2.7 V 2 kꢀ 15 pF
1.1 V - 1.6 V
0.65 V - 0.95 V 20 kꢀ 15 pF
3 V - 3.6 V 2 kꢀ 15 pF
1.65V - 2.7 V 2 kꢀ 15 pF
1.1 V - 1.6 V 2 kꢀ 15 pF
0.65 V - 0.95 V 20 kꢀ 15 pF
2 X VCCO
2 X VCCO
0.3 V
0.15 V
0.1 V
0.1 V
(1)
ten(1), tdis
2 kꢀ 15 pF 2 X VCCO
2 X VCCO
GND
0.3 V
GND
0.15 V
(2)
ten(2), tdis
GND
GND
0.1 V
0.1 V
(1) Output waveform on the conditions that input is driven to a valid Logic Low.
(2) Output waveform on the condition that input is driven to a valid Logic High.
图 2. Load Circuit Conditions
(1)
VCCI
VCCI / 2
VCCI / 2
An, Bn Input
GND
tpd
tpd
(2)
VOH
VCCO / 2
VCCO / 2
Bn, An Output
(2)
VOL
(1) VCCI is the supply pin associated with the input port.
(2) VOH and VOL are typical output voltage levels with specified RL, CL, and S1.
图 3. Propagation Delay
18
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Parameter Measurement Information (接下页)
VCCA
OE
VCCA / 2
VCCA / 2
GND
tdis
ten
(3)
VCCO
Output(1)
Output(2)
VCCO / 2
VOL + VTP
(4)
VOL
(4)
VOH
VOH - VTP
VCCO / 2
GND
(1) Output waveform on the condition that input is driven to a valid Logic Low.
(2) Output waveform on the condition that input is driven to a valid Logic High.
(3) VCCO is the supply pin associated with the output port.
(4) VOH and VOL are typical output voltage levels with specified RL, CL, and S1.
图 4. Enable Time And Disable Time
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8 Detailed Description
8.1 Overview
The SN74AXCH8T245 device is an 8-bit, dual-supply non-inverting transceiver with bidirectional voltage level
translation. The I/O pins labeled with A and the control pins (DIR1, DIR2, and OE) are supported by VCCA, and
the I/O pins labeled with B are supported by VCCB. Both the A port and the B port are able to accept I/O voltages
ranging from 0.65 V to 3.6 V.
8.2 Functional Block Diagram
OE
VCCA
Control Block To Enable or
Disable Outputs (Note: Inputs
on each buffer are always
DIR1
VCCB
enabled)
DIR2
GND
B1
B2
B3
B4
B5
B6
B7
B8
A1
A2
A3
A4
A5
A6
A7
A8
图 5. Functional Block Diagram
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8.3 Feature Description
8.3.1 Up-Translation and Down-Translation From 0.65 V to 3.6 V
Both supply pins are configurable over the full 0.65 V to 3.6 V voltage range, which makes the device suitable for
translating between any of the low voltage nodes (0.7 V, 0.8 V, 0.9 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V).
8.3.2 Multiple Direction Control Pins
Two control pins are used to configure the 8 data I/Os. I/O channels 1 through 4 are grouped together and I/O
channels 5 through 8 are banked together. The benefit of this is to permit simultaneous up-translation and down-
translation within one device. This eliminates the need for multiple devices, where each device can only provide
up-translation or down-translation sequentially. Simultaneous up and down translation is supported when both
VCCA and VCCB are at least 1.40 V.
8.3.3 Bus-Hold Circuitry
Active bus-hold circuitry holds unused or undriven data inputs at a valid logic state, which helps with board space
savings and reduced component costs. Use of pull-up or pull-down resistors with the bus-hold circuitry is not
recommended. See the Bus-Hold Circuit application note for more details. (SCLA015).
Note that the bus-hold circuitry always remains active when the corresponding supply is present (i.e. B port bus-
hold circuits are active when VCCB is present, and A port bus-hold circuits are active when VCCA is present). The
bus hold circuitry is also active even when the device is in a partial power down state or when the output enable
pin is used to place all outputs into high impedance.
8.3.4 Ioff Supports Partial-Power-Down Mode Operation
This feature is to limit the leakage current of an I/O pin being driven to a voltage as large as 3.6 V while having
its corresponding power supply rail powered down. This is represented by the Ioff parameter in the Electrical
Characteristics table.
8.4 Device Functional Modes
All control inputs are referenced to VCCA and must be driven to a valid Logic High or Logic Low (that is, not
floating) to assure proper device operation and to prevent excessive power consumption. 表 1 summarizes the
possible modes of device operation based on the configuration of the control inputs.
表 1. Function Table(1)
CONTROL INPUTS
Signal Direction
OE
H
L
DIR1
DIR2
Bits 1:4
Bits 5:8
X
L
X
L
Disabled (Hi-Z)
B to A
L
L
H
L
B to A
A to B
A to B
B to A
L
H
H
A to B
L
H
(1) Input circuits of the data I/Os are always active and must be driven to a valid logic level.
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9 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The SN74AXCH8T245 device can be used in level-translation applications for interfacing devices or systems
operating at different voltage nodes. 图 6 depicts an application in which the SN74AXCH8T245 device is up-
translating a 0.7 V input to a 3.3 V output to interface between a system controller and a peripheral device.
9.2 Typical Application
0.7 V
3.3 V
0.1 µF
0.1 µF
10
kΩ
10
kΩ
VCCA
VCCB
OE
DIR1
DIR2
GND
10
kΩ
Controller
SN74AXCH8T245
Peripheral
A1
A2
A3
A4
A5
A6
A7
A8
B1
B2
B3
B4
B5
B6
B7
B8
图 6. Typical Application Schematic
22
版权 © 2018–2019, Texas Instruments Incorporated
SN74AXCH8T245
www.ti.com.cn
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
Typical Application (接下页)
9.2.1 Design Requirements
For this design example, use the parameters listed in 表 2.
表 2. Design Parameters
DESIGN PARAMETERS
Input voltage range
EXAMPLE VALUE
0.65 V to 3.6 V
0.65 V to 3.6 V
Output voltage range
9.2.2 Detailed Design Procedure
To begin the design process, determine the following:
•
Input voltage range
–
Use the supply voltage of the device that is driving the SN74AXCH8T245 device to determine the input
voltage range. For a valid logic high the value must exceed the VIH of the input port. For a valid logic low
the value must be less than the VIL of the input port.
•
Output voltage range
–
Use the supply voltage of the device that the SN74AXCH8T245 device is driving to determine the output
voltage range.
9.2.3 Application Curve
图 7. Translation Up (0.7 V to 3.3 V) at 2.5 MHz
版权 © 2018–2019, Texas Instruments Incorporated
23
SN74AXCH8T245
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
www.ti.com.cn
10 Power Supply Recommendations
Always apply a ground reference to the GND pins first. However, there are no additional requirements for power
supply sequencing.
This device was designed with various power supply sequencing methods in mind to help prevent unintended
triggering of downstream devices. For more information regarding the power up glitch performance of the AXC
family of level translators, see the Power Sequencing for AXC Family of Devices application report.
11 Layout
11.1 Layout Guidelines
To assure reliability of the device, follow common printed-circuit board layout guidelines.
•
•
•
Use bypass capacitors on power supplies.
Use short trace lengths to avoid excessive loading.
Place pads on the signal paths for loading capacitors or pullup resistors to help adjust rise and fall times of
signals depending on the system requirements.
11.2 Layout Example
LEGEND
Polygonal Copper Pour
VIA to Power Plane (Inner Layer)
VIA to GND Plane (Inner Layer)
Bypass Capacitor
VCCA
Bypass
Capacitor
1
2
3
4
5
6
7
8
9
VCCA
DIR1
A1
24
23
22
21
20
19
18
17
16
15
14
13
VCCB
VCCB
OE
B1
From Source
From Source
From Source
From Source
From Source
From Source
From Source
From Source
To Destination
A2
To Destination
To Destination
A3
B2
A4
B3
SN74AXCH8T245
(PW Package)
To Destination
To Destination
A5
B4
A6
B5
To Destination
To Destination
A7
B6
10
11
12
A8
B7
To Destination
DIR2
GND
B8
GND
图 8. SN74AXCH8T245 Device Layout Example
24
版权 © 2018–2019, Texas Instruments Incorporated
SN74AXCH8T245
www.ti.com.cn
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
12 器件和文档支持
12.1 文档支持
12.1.1 相关文档
请参阅如下相关文档：
德州仪器 (TI)，《慢速或浮点 CMOS 输入的影响》应用报告
德州仪器 (TI)，《AXC 系列器件电源定序》 应用报告
12.2 接收文档更新通知
要接收文档更新通知，请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我 进行注册，即可每周接收产
品信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
12.3 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在
e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。
设计支持
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。
12.4 商标
E2E is a trademark of Texas Instruments.
12.5 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
12.6 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、缩写和定义。
版权 © 2018–2019, Texas Instruments Incorporated
25
SN74AXCH8T245
ZHCSIL3A –AUGUST 2018–REVISED JANUARY 2019
www.ti.com.cn
13 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此产品说明书的浏览器版本，请查阅左侧的导航栏。
26
版权 © 2018–2019, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
SN74AXCH8T245PWR
SN74AXCH8T245RHLR
ACTIVE
ACTIVE
TSSOP
VQFN
PW
24
24
2000 RoHS & Green
3000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
AH8T245
AH8T245
RHL
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74AXCH8T245PWR TSSOP
SN74AXCH8T245RHLR VQFN
PW
24
24
2000
3000
330.0
330.0
16.4
12.4
6.95
3.8
8.3
5.8
1.6
1.2
8.0
8.0
16.0
12.0
Q1
Q1
RHL
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74AXCH8T245PWR
SN74AXCH8T245RHLR
TSSOP
VQFN
PW
24
24
2000
3000
356.0
367.0
356.0
367.0
35.0
35.0
RHL
Pack Materials-Page 2
PACKAGE OUTLINE
PW0024A
TSSOP - 1.2 mm max height
S
C
A
L
E
2
.
0
0
0
SMALL OUTLINE PACKAGE
SEATING
PLANE
C
6.6
6.2
TYP
A
0.1 C
PIN 1 INDEX AREA
22X 0.65
24
1
2X
7.15
7.9
7.7
NOTE 3
12
B
13
0.30
24X
4.5
4.3
NOTE 4
0.19
1.2 MAX
0.1
C A B
0.25
GAGE PLANE
0.15
0.05
(0.15) TYP
SEE DETAIL A
0.75
0.50
0 -8
A
20
DETAIL A
TYPICAL
4220208/A 02/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0024A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
SYMM
24X (1.5)
(R0.05) TYP
24
1
24X (0.45)
22X (0.65)
SYMM
12
13
(5.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
METAL
EXPOSED METAL
EXPOSED METAL
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
15.000
(PREFERRED)
SOLDER MASK DETAILS
4220208/A 02/2017
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0024A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
24X (1.5)
SYMM
(R0.05) TYP
24
1
24X (0.45)
22X (0.65)
SYMM
12
13
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
4220208/A 02/2017
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
VQFN - 1 mm max height
RHL0024A
PLASTIC QUAD FLATPACK- NO LEAD
A
3.6
3.4
B
PIN 1 INDEX AREA
5.6
5.4
C
1 MAX
SEATING PLANE
0.08 C
0.05
0.00
2.05±0.1
2X 1.5
SYMM
0.5
0.3
24X
(0.1) TYP
13
12
18X 0.5
11
14
21
SYMM
2X
4.05±0.1
4.5
23
2
0.30
24X
0.18
0.1
0.05
24
1
PIN 1 ID
(OPTIONAL)
C A B
C
4X (0.2)
2X (0.55)
4225250/A 09/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
VQFN - 1 mm max height
RHL0024A
PLASTIC QUAD FLATPACK- NO LEAD
(3.3)
(2.05)
2X (1.5)
SYMM
1
24
24X (0.6)
24X (0.24)
2X (0.4)
23
2
18X (0.5)
2X (1.105)
6X (0.67)
(4.05)
25
SYMM
4.6
4.4
(5.3)
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
(Ø 0.2) VIA
TYP
(R0.05) TYP
11
14
13
12
4X
(0.775)
4X (0.2)
2X (0.55)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 18X
SOLDER MASK
OPENING
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
EXPOSED METAL
EXPOSED METAL
METAL
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4225250/A 09/2019
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
VQFN - 1 mm max height
RHL0024A
PLASTIC QUAD FLATPACK- NO LEAD
(3.3)
(2.05)
2X (1.5)
SYMM
SOLDER MASK EDGE
TYP
1
24
24X (0.6)
24X (0.24)
23
2
18X (0.5)
25
SYMM
4.6
4.4
(5.3)
4X
(1.34)
METAL TYP
(R0.05) TYP
11
14
13
12
2X (0.84)
6X (0.56)
4X (0.2)
2X (0.55)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD
80% PRINTED COVERAGE BY AREA
SCALE: 18X
4225250/A 09/2019
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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