SN74BCT29843NT [TI]
9-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS; 具有三态输出的9位总线接口D类锁存器
| 型号： | SN74BCT29843NT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 9-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS |
| 文件： | 总5页 (文件大小：74K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74BCT29843
9-BIT BUS-INTERFACE D-TYPE LATCH
WITH 3-STATE OUTPUTS
SCBS022C – FEBRUARY 1989 – REVISED NOVEMBER 1993
DW OR NT PACKAGE
(TOP VIEW)
• BiCMOS Process With CMOS Inputs and
TTL Outputs Substantially Reduces
Standby Current
OE
1D
2D
3D
4D
5D
6D
7D
8D
V
CC
1
2
3
4
5
6
7
8
9
24
• Input Has 50 kΩ
• Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic 300-mil DIPs (NT)
23 1Q
22 2Q
21 3Q
20 4Q
19 5Q
18 6Q
17 7Q
16 8Q
15 9Q
14 PRE
13 LE
description
The SN74BCT29843 features 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. It is particularly
suitable for implementing wider buffer registers,
I/O ports, bidirectional bus drivers with parity, and
working registers.
9D 10
CLR 11
GND 12
The nine latches are transparent D-type latches. When the latch-enable (LE) input is high, the Q outputs are
complementary to the noninverting data (D) inputs.
A buffered output-enable (OE) input can be used to place the nine outputs in either a normal logic state (high
or low level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without
need for interface or pull-up components.
The output enable (OE) does not affect the internal operation of the flip-flops. Old data can be retained or new
data can be entered while the outputs are in the high-impedance state.
The SN74BCT29843 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
OUTPUT
Q
PRE
L
CLR
X
OE
L
LE
X
D
X
X
L
H
L
H
L
L
X
H
H
L
H
H
L
L
H
H
L
H
X
X
H
H
H
L
Q
0
X
X
H
X
Z
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74BCT29843
9-BIT BUS-INTERFACE D-TYPE LATCH
WITH 3-STATE OUTPUTS
SCBS022C – FEBRUARY 1989 – REVISED NOVEMBER 1993
†
logic symbol
logic diagram (positive logic)
1
1
OE
OE
EN
S2
R
14
11
13
14
PRE
PRE
CLR
LE
11
13
CLR
LE
C1
2
23
22
21
20
19
18
17
16
15
1D
2D
3D
4D
5D
6D
7D
8D
9D
1D
2
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
S
3
23
C1
1Q
4
2
1D
1D
5
R
6
7
8
9
10
To Eight Other Channels
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
I
Voltage range applied to any output in the disabled or power-off state, V . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
O
Voltage range applied to any output in the high state, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to V
O
CC
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA
IK
I
Current into any output in the low state, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
O
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only, and
functional operation of the device at these or any other conditions beyond those indicated in the “recommended operating conditions” section of
this specification is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
recommended operating conditions
MIN NOM
MAX
UNIT
V
V
V
V
Supply voltage
4.5
2
5
5.5
CC
IH
IL
High-level input voltage
Low-level input voltage
Input clamp current
V
0.8
–18
–24
48
V
I
I
I
mA
mA
mA
°C
IK
High-level output current
Low-level output current
Operating free-air temperature
OH
OL
T
A
0
70
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74BCT29843
9-BIT BUS-INTERFACE D-TYPE LATCH
WITH 3-STATE OUTPUTS
SCBS022C – FEBRUARY 1989 – REVISED NOVEMBER 1993
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
PARAMETER
TEST CONDITIONS
I = –18 mA
MIN TYP
MAX
UNIT
V
V
V
V
V
= 4.5 V,
= 4.5 V
–1.2
V
IK
CC
I
I
I
I
= –15 mA
= –24 mA
= 48 mA
2.4
2
3.2
OH
OH
OL
V
OH
OL
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 4.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
0.35
0.55
0.1
–75
–0.2
–275
35
V
I
I
I
I
I
I
I
V = 7 V
I
mA
µA
I
V = 2.7 V
I
–10
–75
IH
IL
V = 0.4 V
I
mA
mA
mA
mA
mA
‡
V
O
= 0
OS
Outputs open
Outputs open
Outputs open
24
3
CCL
CCH
CCZ
7
3
7
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
MIN
7
MAX
UNIT
PRE low
t
w
Pulse duration
CLR low
5
ns
LE high
4
High or low
PRE or CLR inactive
High or low
1.5
2
t
t
Setup time, data before LE↓
Hold time, data after LE↓
ns
ns
su
3.5
h
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C = 50 pF (unless otherwise noted) (see Note 2)
L
V
T
= 5 V,
= 25°C
CC
A
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
MIN
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
2
TYP
4.5
5.7
6
MAX
7
t
t
t
t
t
t
t
t
t
t
t
t
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
2
8
9
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
Q
Q
Q
Q
Q
Q
ns
ns
ns
ns
ns
ns
D
8
8
10
10
12
12
12
12
15
15
8
LE
6
8
6
8
PRE
CLR
OE
6
10
10
10
13
13
7
6
6
10
10
5
2
2
2
2
OE
2
5
7
2
8
NOTE 2: Load circuits and voltage waveforms are shown in Section 1.
2–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2–4
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Copyright 1998, Texas Instruments Incorporated
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