SN74BCT544DW-00 [TI]
BCT/FBT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24;型号: | SN74BCT544DW-00 |
厂家: | TEXAS INSTRUMENTS |
描述: | BCT/FBT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24 信息通信管理 光电二极管 输出元件 逻辑集成电路 |
文件: | 总12页 (文件大小:313K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN54BCT544, SN74BCT544
OCTAL REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS039B – NOVEMBER 1988 – REVISED NOVEMBER 1993
SN54BCT544 . . . JT OR W PACKAGE
SN74BCT544 . . . DW OR NT PACKAGE
(TOP VIEW)
• State-of-the-Art BiCMOS Design
Significantly Reduces I
CCZ
• ESD Protection Exceeds 2000 V
Per MIL-STD-883C, Method 3015
LEBA
OEBA
A1
1
2
3
4
5
6
7
8
9
10
24
V
CC
• Power-Up High-Impedance State
• 3-State Inverting Outputs
• Back-to-Back Registers for Storage
23 CEBA
22 B1
21 B2
20 B3
19 B4
18 B5
17 B6
16 B7
A2
A3
A4
A5
A6
A7
A8
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK) and Flatpacks (W), and
Plastic and Ceramic 300-mil DIPs (JT, NT)
15
B8
description
CEAB 11
GND 12
14 LEAB
13 OEAB
The ′BCT544 octal registered transceiver
contains two sets of D-type latches for temporary
storage of data flowing in either direction.
Separate latch-enable (LEAB or LEBA) and
output-enable (OEAB or OEBA) inputs are
provided for each register to permit independent
control in either direction of data flow.
SN54BCT544 . . . FK PACKAGE
(TOP VIEW)
The A-to-B enable (CEAB) input must be low in
order to enter data from A or to output data from
B. If CEAB is low and LEAB is low, the A-to-B
latches are transparent; a subsequent low-to-high
transitionofLEABputstheAlatchesinthestorage
mode. With CEAB and OEAB both low, the 3-state
B outputs are active and reflect the inverted data
present at the output of the A latches. Data flow
from B to A is similar, but requires using the CEBA,
LEBA, and OEBA inputs.
4
3
2
1
28 27 26
25
5
6
7
8
9
A2
A3
A4
NC
A5
A6
A7
B2
B3
B4
24
23
22 NC
21 B5
20 B6
19 B7
10
11
12 13 14 15 16 17 18
The SN54BCT544 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74BCT544 is characterized for
operation from 0°C to 70°C.
NC – No internal connection
†
FUNCTION TABLE
INPUTS
OUTPUT
B
CEAB
LEAB
OEAB
A
X
X
X
L
H
L
L
L
L
X
X
H
L
X
H
L
Z
Z
‡
B
0
L
H
L
L
L
H
†
‡
A-to-B data flow is shown; B-to-A flow control is the same
except that it uses CEBA, LEBA, and OEBA.
Output level before the indicated steady-state input
conditions were established.
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54BCT544, SN74BCT544
OCTAL REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS039B – NOVEMBER 1988 – REVISED NOVEMBER 1993
†
logic symbol
2
OEBA
23
1EN3
G1
CEBA
1
1C5
2EN4
G2
LEBA
13
OEAB
11
CEAB
14
2C6
LEAB
3
22
A1
5D
4
B1
3
6D
21
20
19
4
B2
B3
B4
A2
5
A3
6
A4
7
18
17
16
A5
B5
B6
B7
8
A6
9
A7
15
10
B8
A8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
2
OEBA
23
CEBA
1
LEBA
13
OEAB
11
CEAB
14
LEAB
C1
1D
3
A1
22
B1
C1
1D
To Seven Other Channels
Pin numbers shown are for the DW, JT, NT, and W packages.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54BCT544, SN74BCT544
OCTAL REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS039B – NOVEMBER 1988 – REVISED NOVEMBER 1993
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
CC
Input voltage range:Control inputs (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 5.5 V
Voltage range applied to any output in the disabled or power-off state, V . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
O
Voltage range applied to any output in the high state, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to V
O
CC
Input clamp current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA
Current into any output in the low state: SN54BCT544 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74BCT544 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Operating free-air temperature range: SN54BCT544 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74BCT544 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input negative voltage rating may be exceeded if the input clamp-current rating is observed.
recommended operating conditions
SN54BCT544
SN74BCT544
MIN NOM MAX
UNIT
MIN NOM
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
IH
IL
High-level input voltage
Low-level input voltage
Input clamp current
0.8
–18
–12
48
0.8
–18
–15
64
V
I
I
I
mA
mA
mA
°C
IK
High-level output current
Low-level output current
Operating free-air temperature
OH
OL
T
A
–55
125
0
70
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54BCT544, SN74BCT544
OCTAL REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS039B – NOVEMBER 1988 – REVISED NOVEMBER 1993
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54BCT544
SN74BCT544
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
= 4.5 V,
= 4.5 V
I = –18 mA
–1.2
–1.2
V
IK
CC
I
I
I
I
I
I
I
= –3 mA
= –12 mA
= –15 mA
= –3 mA
= 48 mA
= 64 mA
2.4
2
3.3
3.2
2.4
3.3
3.1
OH
OH
OH
OH
OL
OL
CC
V
OH
V
2
V
V
= 4.75 V,
= 4.5 V
2.7
CC
0.38
0.55
V
OL
V
CC
0.42
0.55
0.4
I
I
I
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V
= 5.5 V
= 5.5 V
= 5 V,
V = 5.5 V
I
0.4
20
mA
µA
I
‡
V = 2.7 V
I
20
IH
‡
V = 0.5 V
I
–0.6
–225
11
–0.6
–225
11
mA
mA
mA
mA
mA
pF
IL
§
V
O
= 0
–100
–100
OS
7
43
9
7
43
9
CCH
CCL
CCZ
68
68
15
15
C
C
V = 2.5 V or 0.5 V
I
6
6
i
= 5 V,
V
O
= 2.5 V or 0.5 V
16
16
pF
io
†
‡
§
All typical values are at V
For I/O ports, the parameters I and I include the off-state output current.
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
= 5 V, T = 25°C.
A
IH IL
CC
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
V
T
= 5 V,
= 25°C
CC
A
SN54BCT544 SN74BCT544
UNIT
MIN
7
MAX
MIN
8
MAX
MIN
7
MAX
t
w
t
su
t
h
Pulse duration, LEAB or LEBA low
Setup time, data before LEAB or LEBA↑
Hold time, data after LEAB or LEBA↑
ns
ns
ns
High or low
High or low
5
5.5
1
5
1
1
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54BCT544, SN74BCT544
OCTAL REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS039B – NOVEMBER 1988 – REVISED NOVEMBER 1993
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C = 50 pF, R = 500 Ω (unless otherwise noted) (see Note 2)
L
L
V
T
= 5 V,
= 25°C
CC
A
SN54BCT544 SN74BCT544
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
2.4
3
MAX
7.6
MIN
2.4
3
MAX
10.3
8.9
MIN
2.4
3
MAX
9.7
t
t
t
t
t
t
t
t
t
t
PLH
PHL
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
A or B
B or A
A
ns
ns
ns
ns
ns
7.6
8.5
3.5
4.8
3.5
4.8
3
10.3
10.2
10.3
10.3
10.1
11.8
7.5
3.5
4.8
3.5
4.8
3
14.2
12.7
14.4
12.8
13.1
14.2
8.9
3.5
4.8
3.5
4.8
3
13.3
12.3
13.4
12.4
12.7
13.9
8.5
LEBA
LEAB
B
A or B
A or B
OE or CE
OE or CE
5.1
2.8
2.3
5.1
2
5.1
2.8
2.3
7.2
2.3
9
8.2
NOTE 2: Load circuits and voltage waveforms are shown in Section 1.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
SOIC
SOIC
PDIP
LCCC
CDIP
CFP
Drawing
DW
DW
NT
SN74BCT544DW
SN74BCT544DWR
SN74BCT544NT
SNJ54BCT544FK
SNJ54BCT544JT
SNJ54BCT544W
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
24
24
24
28
24
24
TBD
TBD
TBD
TBD
TBD
TBD
Call TI
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Call TI
Call TI
FK
JT
W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MCER004A – JANUARY 1995 – REVISED JANUARY 1997
JT (R-GDIP-T**)
CERAMIC DUAL-IN-LINE
24 LEADS SHOWN
PINS **
A
24
28
DIM
13
24
1.280
(32,51) (37,08)
1.460
A MAX
1.240
(31,50) (36,58)
1.440
B
A MIN
B MAX
B MIN
0.300
(7,62)
0.291
(7,39)
1
12
0.070 (1,78)
0.030 (0,76)
0.245
(6,22)
0.285
(7,24)
0.320 (8,13)
0.290 (7,37)
0.015 (0,38) MIN
0.100 (2,54) MAX
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.014 (0,36)
0.008 (0,20)
0.100 (2,54)
4040110/C 08/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP3-T24, GDIP4-T28, and JEDEC MO-058 AA, MO-058 AB
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MCFP007 – OCTOBER 1994
W (R-GDFP-F24)
CERAMIC DUAL FLATPACK
0.375 (9,53)
0.340 (8,64)
Base and Seating Plane
0.006 (0,15)
0.004 (0,10)
0.045 (1,14)
0.026 (0,66)
0.090 (2,29)
0.045 (1,14)
0.395 (10,03)
0.360 (9,14)
0.360 (9,14)
0.240 (6,10)
0.360 (9,14)
0.240 (6,10)
0.019 (0,48)
0.015 (0,38)
1
24
0.050 (1,27)
0.640 (16,26)
0.490 (12,45)
0.030 (0,76)
0.015 (0,38)
12
13
30° TYP
1.115 (28,32)
0.840 (21,34)
4040180-5/B 03/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Falls within MIL-STD-1835 GDFP2-F24 and JEDEC MO-070AD
E. Index point is provided on cap for terminal identification only.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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