SN74BCT646 [TI]
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS; 八路总线收发器和寄存器具有三态输出
| 型号： | SN74BCT646 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS |
| 文件： | 总9页 (文件大小：132K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54BCT646, SN74BCT646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS037C – AUGUST 1989 – REVISED NOVEMBER 1993
SN54BCT646 . . . JT OR W PACKAGE
SN74BCT646 . . . DW OR NT PACKAGE
(TOP VIEW)
• State-of-the-Art BiCMOS Design
Significantly Reduces I
CCZ
• ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
CLKAB
SAB
DIR
A1
V
CC
1
24
23
22
21
20
19
18
17
16
15
14
13
CLKBA
SBA
OE
B1
2
3
• Bus Transceivers/Registers
4
A2
5
• Independent Registers and Enables for
A3
B2
6
A and B Buses
A4
B3
7
• Multiplexed Real-Time and Stored Data
• Power-Up High-Impedance Mode
A5
B4
8
A6
B5
9
• Package Options Include Plastic
A7
A8
GND
B6
B7
B8
10
11
12
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK) and Flatpacks (W), and
Plastic and Ceramic 300-mil DIPs (JT, NT)
SN54BCT646 . . . FK PACKAGE
(TOP VIEW)
description
These devices consist of bus transceiver circuits,
D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the
inputbusorfromtheinternalregisters. Dataonthe
A or B bus is clocked into the registers on the
low-to-high transition of the appropriate clock
(CLKAB or CLKBA) input. Figure 1 illustrates the
four fundamental bus-management functions that
can be performed with the ′BCT646.
4
3
2
1 28 27 26
A1
A2
A3
NC
A4
A5
A6
OE
24 B1
25
5
6
23
22
21
20
19
7
B2
NC
B3
B4
B5
8
9
Output-enable (OE) and direction-control (DIR)
inputs are provided to control the transceiver
functions. In the transceiver mode, data present at
the high-impedance port may be stored in either
register or in both.
10
11
12 13 14 15 16 17 18
NC – No internal connection
The select-control (SAB and SBA) inputs can
multiplex stored and real-time (transparent mode)
data. The direction control (DIR) determines which bus will receive data when OE is low. In the isolation mode
(OE high), A data may be stored in one register and/or B data may be stored in the other register.
When an output function is disabled, the input function is still enabled and may be used to store and transmit
data. Only one of the two buses, A or B, may be driven at a time.
The SN54BCT646 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74BCT646 is characterized for operation from 0°C to 70°C.
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54BCT646, SN74BCT646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS037C – AUGUST 1989 – REVISED NOVEMBER 1993
21
OE
L
3
1
23
2
22
SBA
21
OE
L
3
DIR
1
23
2
22
SBA
DIR CLKAB CLKBA SAB
CLKAB CLKBA SAB
L
X
X
X
L
H
X
X
L
X
REAL-TIME TRANSFER
BUS B TO BUS A
REAL-TIME TRANSFER
BUS A TO BUS B
21
3
1
23
2
22
21
OE
L
3
DIR
L
1
23
2
22
SBA
H
DIR CLKAB CLKBA SAB
SBA
X
CLKAB CLKBA SAB
OE
X
X
X
X
X
↑
X
X
X
↑
X
X
L
L
X
H
X
H
X
X
L
H
X
X
↑
↑
STORAGE FROM
A, B, OR A AND B
TRANSFER STORED DATA
TO A AND/OR B
Figure 1. Bus-Management Functions
Pin numbers shown are for the DW, JT, NT, and W packages.
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54BCT646, SN74BCT646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS037C – AUGUST 1989 – REVISED NOVEMBER 1993
FUNCTION TABLE
DATA I/O
INPUTS
OPERATION OR FUNCTION
OE
X
X
H
H
L
DIR
X
CLKAB
CLKBA
SAB
X
SBA
X
A1 THRU A8
B1 THRU B8
†
†
†
↑
X
Input
Unspecified
Store A, B unspecified
Store B, A unspecified
Store A and B data
†
X
X
↑
X
X
Unspecified
Input
X
↑
H or L
X
↑
H or L
X
X
X
Input
Input
X
X
X
Input disabled
Output
Input disabled
Input
Isolation, hold storage
Real-time B data to A bus
Stored B data to A bus
Real-time A data to B bus
Stored A data to B bus
L
X
L
L
L
X
H or L
X
X
H
Output
Input
L
H
H
X
L
X
Input
Output
L
H or L
X
H
X
Input
Output
†
The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled;
i.e., data at the bus pins will be stored on every low-to-high transition of the clock inputs.
‡
logic symbol
21
3
G3
OE
DIR
3 EN1 [BA]
3 EN2 [AB]
23
22
1
CLKBA
SBA
C4
G5
CLKAB
SAB
C6
2
G7
20
4D
2
B1
5
5
≥1
4
A1
1
1
6D
7
7
≥1
1
5
19
18
17
16
15
14
13
B2
B3
B4
B5
B6
B7
B8
A2
A3
A4
A5
A6
A7
A8
6
7
8
9
10
11
‡
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, JT, NT, and W packages.
2–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54BCT646, SN74BCT646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS037C – AUGUST 1989 – REVISED NOVEMBER 1993
logic diagram (positive logic)
21
OE
3
DIR
23
CLKBA
22
SBA
1
CLKAB
2
SAB
One of Eight
Channels
1D
C1
4
A1
20
B1
1D
C1
To Seven Other Channels
Pin numbers shown are for the DW, JT, NT, and W packages.
2–4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54BCT646, SN74BCT646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS037C – AUGUST 1989 – REVISED NOVEMBER 1993
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
CC
Input voltage range: Control inputs (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 5.5 V
Voltage range applied to any output in the disabled or power-off state, V . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
O
Voltage range applied to any output in the high state, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to V
O
CC
Current into any output in the low state: SN54BCT646 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74BCT646 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Operating free-air temperature range: SN54BCT646 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74BCT646 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
recommended operating conditions
SN54BCT646
MIN NOM MAX
SN74BCT646
UNIT
MIN NOM
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
IH
IL
High-level input voltage
Low-level input voltage
Input clamp current
0.8
–18
–12
48
0.8
–18
–15
64
V
I
I
I
mA
mA
mA
°C
IK
High-level output current
Low-level output current
Operating free-air temperature
OH
OL
T
A
–55
125
0
70
2–5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54BCT646, SN74BCT646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS037C – AUGUST 1989 – REVISED NOVEMBER 1993
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54BCT646
SN74BCT646
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
= 4.5 V,
= 4.5 V
I = –18 mA
–1.2
–1.2
V
IK
CC
I
I
I
I
I
I
= –3 mA
= –12 mA
= –15 mA
= 48 mA
= 64 mA
2.4
2
3.3
3.2
2.4
2
3.3
3.1
OH
OH
OH
OL
OL
V
OH
CC
0.38
0.55
V
OL
V
CC
V
CC
V
CC
V
CC
= 4.5 V
= 5.5 V,
= 5.5 V,
= 5.5 V,
V
0.42
0.55
1
A or B port
1
1
I
I
I
V = 5.5 V
I
mA
µA
mA
I
Control inputs
A or B port
1
70
70
‡
V = 2.7 V
I
IH
Control inputs
A or B port
20
20
–0.7
–0.7
–0.7
–0.7
–225
67
‡
V = 0.5 V
I
IL
Control inputs
§
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5 V,
V = 0
O
–100
–225 –100
mA
mA
mA
mA
pF
OS
A or B port
V = GND
I
42
5.6
10
6
67
9
42
5.6
10
6
CCL
CCH
CCZ
A or B port
A or B port
Control inputs
A or B port
V = 4.5 V
I
9
V = GND
I
16
16
C
C
V = 2.5 V or 0.5 V
I
i
= 5 V,
V
O
= 2.5 V or 0.5 V
12
14
pF
io
†
‡
§
All typical values are at V
For I/O ports, the parameters I and I include the off-state output current.
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
= 5 V, T = 25°C.
A
CC
IH
IL
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
V
T
= 5 V,
= 25°C
CC
A
SN54BCT646 SN7BCTT646
UNIT
MIN
0
MAX
MIN
0
MAX
MIN
0
MAX
f
t
t
t
Clock frequency
83
83
83
MHz
ns
clock
Pulse duration, CLK high or low
Setup time, A or B before CLKAB↑ or CLKBA↑
Hold time, A or B after CLKAB↑ or CLKBA↑
6
6
6
w
6
7
6
ns
su
h
0.5
0.5
0.5
ns
2–6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54BCT646, SN74BCT646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS037C – AUGUST 1989 – REVISED NOVEMBER 1993
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C = 50 pF (unless otherwise noted) (see Note 2)
L
V
T
= 5 V,
= 25°C
CC
A
SN54BCT646 SN74BCT646
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
83
TYP
MAX
MIN
83
MAX
MIN
83
MAX
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
MHz
ns
max
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
PZH
PZL
PHZ
PLZ
3.6
3.9
3.1
3.7
4.5
3.3
3.9
4.7
4
7
7
9.4
9.2
3.6
3.9
3.1
3.7
4.5
3.3
3.9
4.7
4
12.4
11.5
11.1
12.1
15.2
9.8
3.6
3.9
3.1
3.7
4.5
3.3
3.9
4.7
4
11.2
10.6
9.5
CLKBA or CLKAB
A or B
A or B
B or A
A or B
A or B
A or B
A or B
A or B
A or B
6
8.1
ns
ns
ns
ns
ns
ns
ns
6.8
8.8
6
8.9
10.5
13.8
9.1
†
11.2
8.1
SAB or SBA
(with A or B high)
†
7.7
8.3
7.9
8.8
7.2
7
10.2
10.8
10.7
11.8
9.4
13.3
13.7
14
12
SAB or SBA
(with A or B low)
12.9
13.2
14.4
10.9
10.5
13.1
14.6
12.6
11.8
OE
4.6
4
4.6
4
15.4
12
4.6
4
OE
DIR
DIR
3.4
2.8
3.8
3.8
3.2
9.3
3.4
2.8
3.8
3.8
3.2
11.6
14
3.4
2.8
3.8
3.8
3.2
7.8
8.9
8.4
7.3
10.7
11.9
10.7
9.9
15.6
13.2
12.6
†
These parameters are measured with the internal output state of the storage register opposite to that of the bus input.
NOTE 2: Load circuits and voltage waveforms are shown in Section 1.
2–7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2–8
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
相关型号：
SN74BCT646JT
BCT/FBT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CDIP24, 0.300 INCH, CERAMIC, DIP-24
TI
©2020 ICPDF网 联系我们和版权申明