SN74CBT3383 [TI]

10-BIT FET BUS-EXCHANGE SWITCHES; 10位FET总线交换开关系列
SN74CBT3383
型号: SN74CBT3383
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

10-BIT FET BUS-EXCHANGE SWITCHES
10位FET总线交换开关系列

开关
文件: 总5页 (文件大小:70K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN54CBT3383, SN74CBT3383  
10-BIT FET BUS-EXCHANGE SWITCHES  
SCDS003J – NOVEMBER 1992 – REVISED MAY 1999  
SN54CBT3383 . . . JT OR W PACKAGE  
SN74CBT3383 . . . DB, DBQ, DGV, DW, OR PW PACKAGE  
(TOP VIEW)  
Functionally Equivalent to QS3383 and  
QS3L383  
5-Switch Connection Between Two Ports  
BE  
1B1  
1A1  
1A2  
1B2  
2B1  
2A1  
2A2  
2B2  
V
CC  
1
2
3
4
5
6
7
8
9
24  
23  
22  
21  
TTL-Compatible Input Levels  
5B2  
5A2  
5A1  
Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DB, DBQ), Thin Very Small-Outline (DGV),  
and Thin Shrink Small-Outline (PW)  
Packages, Ceramic DIPs (JT), and Ceramic  
Flat (W) Package  
20 5B1  
4B2  
19  
18 4A2  
17 4A1  
16 4B1  
15 3B2  
14 3A2  
13 BX  
description  
3B1 10  
3A1 11  
GND 12  
The ’CBT3383 devices provide ten bits of  
high-speed TTL-compatible bus switching or  
exchanging. The low on-state resistance of the  
switch allows connections to be made with  
minimal propagation delay.  
The devices operate as a 10-bit bus switch or a 5-bit bus exchanger, which provides swapping of the A and B  
pairs of signals. The bus-exchange function is selected when BX is high. The switches are connected when BE  
is low.  
The SN54CBT3383 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74CBT3383 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
INPUTS  
INPUTS/OUTPUTS  
BE  
BX  
L
1A1–5A1  
1B1–5B1  
1B2–5B2  
Z
1A2–5A2  
1B2–5B2  
1B1–5B1  
Z
L
L
H
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54CBT3383, SN74CBT3383  
10-BIT FET BUS-EXCHANGE SWITCHES  
SCDS003J – NOVEMBER 1992 – REVISED MAY 1999  
logic diagram (positive logic)  
3
2
5
1A1  
1B1  
1B2  
4
1A2  
21  
20  
23  
5A1  
5B1  
5B2  
22  
5A2  
1
BE  
13  
BX  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
I
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA  
IK I/O  
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104°C/W  
JA  
DBQ package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W  
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139°C/W  
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54CBT3383, SN74CBT3383  
10-BIT FET BUS-EXCHANGE SWITCHES  
SCDS003J – NOVEMBER 1992 – REVISED MAY 1999  
recommended operating conditions (see Note 3)  
SN54CBT3383 SN74CBT3383  
UNIT  
MIN  
4.5  
2
MAX  
MIN  
4.5  
2
MAX  
V
V
V
Supply voltage  
5.5  
5.5  
V
V
CC  
IH  
IL  
High-level control input voltage  
Low-level control input voltage  
Operating free-air temperature  
0.8  
0.8  
70  
V
T
A
–55  
125  
0
°C  
NOTE 3: All unused control inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
SN54CBT3383  
SN74CBT3383  
PARAMETER  
TEST CONDITIONS  
I = –18 mA  
UNIT  
MIN TYP  
MAX  
–1.2  
±5  
MIN TYP  
MAX  
–1.2  
±1  
V
V
V
V
V
= 4.5 V,  
= 5.5 V,  
= 5.5 V,  
V
IK  
CC  
CC  
CC  
CC  
I
I
I
V = 5.5 V or GND  
I
µA  
µA  
I
I
O
= 0,  
V = V or GND  
I CC  
50  
50  
CC  
= 5.5 V, One input at 3.4 V,  
or GND  
I  
CC  
Control inputs  
Control inputs  
2.5  
2.5  
mA  
pF  
Other inputs at V  
CC  
V = 3 V or 0  
I
3
6
C
C
i
V = 2.5 V  
I
5
V
= 3 V or 0,  
= 2.5 V,  
BE = V  
O
O
CC  
CC  
pF  
io(OFF)  
§
V
BE = V  
6
I = 64 mA  
I
5
9.2  
5
5
7
7
V = 0  
I
V
CC  
= 4.5 V  
I = 30 mA  
I
r
on  
V = 2.4 V,  
I
I = 15 mA  
I
10  
17  
10  
15  
§
All typical values are at V  
= 5 V, T = 25°C.  
A
CC  
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V  
or GND.  
CC  
Measured by the voltage drop between the input terminal and the output terminal at the indicated current through the switch. On-state resistance  
is determined by the lowest voltage of the two (A or B) terminals.  
switching characteristics over recommended operating free-air temperature range, C = 50 pF  
L
(unless otherwise noted) (see Figure 1)  
SN54CBT3383 SN74CBT3383  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
MAX  
MIN  
MAX  
t
t
t
t
A or B  
BX  
B or A  
A or B  
A or B  
A or B  
1.5  
0.25  
ns  
ns  
ns  
ns  
pd  
pd  
en  
1
1
1
10.2  
10.8  
8.2  
1
1
1
9.2  
8.6  
7.5  
BE  
BE  
dis  
Thepropagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when  
driven by an ideal voltage source (zero output impedance).  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54CBT3383, SN74CBT3383  
10-BIT FET BUS-EXCHANGE SWITCHES  
SCDS003J – NOVEMBER 1992 – REVISED MAY 1999  
PARAMETER MEASUREMENT INFORMATION  
7 V  
Open  
TEST  
S1  
S1  
500 Ω  
t
Open  
7 V  
pd  
/t  
From Output  
Under Test  
t
PLZ PZL  
/t  
GND  
t
Open  
PHZ PZH  
C
= 50 pF  
L
500 Ω  
(see Note A)  
Output  
Control  
(low-level  
enabling)  
3 V  
0 V  
1.5 V  
1.5 V  
LOAD CIRCUIT  
t
PZL  
t
PLZ  
Output  
Waveform 1  
S1 at 7 V  
3.5 V  
3 V  
0 V  
1.5 V  
Input  
V
+ 0.3 V  
1.5 V  
1.5 V  
OL  
(see Note B)  
V
OL  
t
PHZ  
t
PZH  
t
t
PHL  
PLH  
Output  
Waveform 2  
S1 at Open  
(see Note B)  
V
OH  
V
V
OH  
V
OH  
– 0.3 V  
1.5 V  
Output  
1.5 V  
1.5 V  
0 V  
OL  
VOLTAGE WAVEFORMS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
PROPAGATION DELAY TIMES  
C includes probe and jig capacitance.  
L
NOTES: A.  
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time with one transition per measurement.  
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
PHL  
are the same as t  
.
dis  
PLZ  
PZL  
PLH  
PHZ  
PZH  
are the same as t  
.
en  
are the same as t .  
pd  
Figure 1. Load Circuit and Voltage Waveforms  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
BE FULLY AT THE CUSTOMER’S RISK.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 1999, Texas Instruments Incorporated  

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