SN74CBT6800ADBQR [TI]

10-BIT FET BUS SWITCH WITH PRECHARGED OUTPUTS; 具有预充电输出的10位FET总线开关
SN74CBT6800ADBQR
型号: SN74CBT6800ADBQR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

10-BIT FET BUS SWITCH WITH PRECHARGED OUTPUTS
具有预充电输出的10位FET总线开关

开关 输出元件
文件: 总14页 (文件大小:476K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN74CBT6800A  
10-BIT FET BUS SWITCH  
WITH PRECHARGED OUTPUTS  
SCDS005N – MARCH 1993 – REVISED MARCH 2001  
DB, DBQ, DGV, DW, OR PW PACKAGE  
(TOP VIEW)  
5-Switch Connection Between Two Ports  
TTL-Compatible Input Levels  
Outputs Are Precharged by Bias Voltage to  
Minimize Signal Distortion During Live  
Insertion  
ON  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
V
CC  
B1  
2
3
B2  
B3  
B4  
B5  
B6  
B7  
B8  
B9  
4
description  
5
6
The SN74CBT6800A provides ten bits of  
high-speed TTL-compatible bus switching. The  
low on-state resistance of the switch allows  
bidirectional connections to be made while adding  
near-zero propagation delay. The device also  
precharges the B port to a user-selectable  
bias voltage (BIASV) to minimize live-insertion  
noise.  
7
8
9
10  
11  
12  
A9  
A10  
GND  
B10  
BIASV  
The SN74CBT6800A is organized as one 10-bit switch with a single enable (ON) input. When ON is low, the  
switch is on, and port A is connected to port B. When ON is high, the switch between port A and port B is open.  
When ON is high or V  
is 0 V, B port is precharged to BIASV through the equivalent of a 10-kresistor.  
CC  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
Tube  
SN74CBT6800ADW  
SN74CBT6800ADWR  
SN74CBT6800ADBR  
SN74CBT6800ADBQR  
SN74CBT6800APWR  
SN74CBT6800ADGVR  
SOIC – DW  
SSOP – DB  
CBT6800A  
Tape and reel  
Tape and reel  
CT6800A  
CBT6800A  
CT6800A  
CT6800A  
–40°C to 85°C  
SSOP (QSOP) – DBQ Tape and reel  
TSSOP – PW  
TVSOP – DGV  
Tape and reel  
Tape and reel  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
FUNCTION TABLE  
INPUT  
FUNCTION  
ON  
L
A port = B port  
A port = Z  
B port = BIASV  
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2001, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74CBT6800A  
10-BIT FET BUS SWITCH  
WITH PRECHARGED OUTPUTS  
SCDS005N MARCH 1993 REVISED MARCH 2001  
logic diagram (positive logic)  
13  
23  
BIASV  
B1  
2
A1  
11  
14  
A10  
B10  
1
ON  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
CC  
Bias voltage range, BIASV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
I
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
IK  
I
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W  
JA  
DBQ package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61°C/W  
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W  
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46°C/W  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
stg  
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
recommended operating conditions (see Note 3)  
MIN  
4
MAX  
UNIT  
V
V
CC  
Supply voltage  
5.5  
BIASV Supply voltage  
1.3  
2
V
V
CC  
V
V
High-level control input voltage  
Low-level control input voltage  
Operating free-air temperature  
V
IH  
0.8  
85  
V
IL  
T
A
40  
°C  
NOTE 3: All unused control inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74CBT6800A  
10-BIT FET BUS SWITCH  
WITH PRECHARGED OUTPUTS  
SCDS005N MARCH 1993 REVISED MARCH 2001  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
PARAMETER  
TEST CONDITIONS  
I = 18 mA  
MIN TYP  
MAX  
1.2  
±5  
UNIT  
V
V
V
V
V
V
V
= 4.5 V,  
= 5.5 V,  
= 4.5 V,  
= 5.5 V,  
= 5.5 V,  
IK  
CC  
CC  
CC  
CC  
CC  
I
I
I
I
V = 5.5 V or GND  
I
µA  
mA  
µA  
mA  
pF  
I
BIASV = 2.4 V,  
V
O
= 0  
0.25  
O
I
O
= 0,  
V = V  
I
or GND  
50  
CC  
CC  
I  
CC  
Control inputs  
One input at 3.4 V,  
Other inputs at V  
or GND  
2.5  
CC  
C
C
Control inputs V = 3 V or 0  
3.5  
4.5  
i
I
V
O
= 3 V or 0,  
Switch off  
pF  
o(OFF)  
V
= 4 V,  
CC  
V
I
= 2.4 V,  
I = 15 mA  
I
11  
20  
TYP at V  
= 4 V  
CC  
§
I = 64 mA  
I
3
3
6
7
7
r
on  
V = 0  
I
V
CC  
= 4.5 V  
I = 30 mA  
I
V = 2.4 V,  
I
I = 15 mA  
I
15  
§
All typical values are at V  
= 5 V (unless otherwise noted), T = 25°C.  
A
CC  
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V  
or GND.  
CC  
Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by  
the lower of the voltages of the two (A or B) terminals.  
switching characteristics over recommended operating free-air temperature range, C = 50 pF  
L
(unless otherwise noted) (see Figure 1)  
V
= 5 V  
CC  
± 0.5 V  
V
= 4 V  
TEST  
CONDITIONS  
FROM  
(INPUT)  
TO  
(OUTPUT)  
CC  
PARAMETER  
UNIT  
MIN  
MAX  
MIN  
MAX  
0.25  
5.1  
5.6  
5
t
t
t
t
t
A or B  
ON  
B or A  
A or B  
0.35  
6
ns  
ns  
pd  
2
2
1
2
BIASV = GND  
BIASV = 3 V  
BIASV = GND  
BIASV = 3 V  
PZH  
PZL  
PHZ  
PLZ  
6
5.5  
5.5  
ON  
A or B  
ns  
5.9  
Thepropagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when  
driven by an ideal voltage source (zero output impedance).  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74CBT6800A  
10-BIT FET BUS SWITCH  
WITH PRECHARGED OUTPUTS  
SCDS005N MARCH 1993 REVISED MARCH 2001  
PARAMETER MEASUREMENT INFORMATION  
7 V  
Open  
GND  
TEST  
S1  
S1  
500 Ω  
t
Open  
7 V  
From Output  
Under Test  
pd  
t
/t  
PLZ PZL  
t
/t  
Open  
PHZ PZH  
C
= 50 pF  
L
500 Ω  
(see Note A)  
Output  
Control  
(low-level  
enabling)  
3 V  
1.5 V  
1.5 V  
LOAD CIRCUIT  
0 V  
t
t
PLZ  
PZL  
Output  
Waveform 1  
S1 at 7 V  
3.5 V  
3 V  
0 V  
1.5 V  
Input  
1.5 V  
1.5 V  
V
V
+ 0.3 V  
OL  
(see Note B)  
V
OL  
OH  
t
t
PZH  
PHZ  
t
t
PHL  
PLH  
Output  
Waveform 2  
S1 at Open  
(see Note B)  
V
V
V
OH  
0.3 V  
OH  
1.5 V  
Output  
1.5 V  
1.5 V  
0 V  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
NOTES: A.  
C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time with one transition per measurement.  
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
are the same as t  
are the same as t  
are the same as t  
.
dis  
en  
.
pd  
PLZ  
PZL  
PLH  
PHZ  
PZH  
PHL  
.
Figure 1. Load Circuit and Voltage Waveforms  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
28-May-2007  
PACKAGING INFORMATION  
Orderable Device  
SN74CBT6800ADBQR  
SN74CBT6800ADBQRE4  
SN74CBT6800ADBQRG4  
SN74CBT6800ADBR  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
SSOP/  
QSOP  
DBQ  
24  
24  
24  
24  
24  
24  
24  
24  
24  
24  
24  
24  
24  
24  
24  
24  
24  
24  
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
SSOP/  
QSOP  
DBQ  
DBQ  
DB  
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
SSOP/  
QSOP  
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
SSOP  
SSOP  
SSOP  
TVSOP  
TVSOP  
TVSOP  
SOIC  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74CBT6800ADBRE4  
SN74CBT6800ADBRG4  
SN74CBT6800ADGVR  
SN74CBT6800ADGVRE4  
SN74CBT6800ADGVRG4  
SN74CBT6800ADW  
DB  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
DB  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
DGV  
DGV  
DGV  
DW  
DW  
DW  
DW  
DW  
DW  
PW  
PW  
PW  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74CBT6800ADWE4  
SN74CBT6800ADWG4  
SN74CBT6800ADWR  
SN74CBT6800ADWRE4  
SN74CBT6800ADWRG4  
SN74CBT6800APWR  
SN74CBT6800APWRE4  
SN74CBT6800APWRG4  
SOIC  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SOIC  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SOIC  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SOIC  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SOIC  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TSSOP  
TSSOP  
TSSOP  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
28-May-2007  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Mar-2008  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) W1 (mm)  
(mm) (mm) Quadrant  
SN74CBT6800ADBQR  
SN74CBT6800ADBR  
SSOP/  
QSOP  
DBQ  
24  
2500  
330.0  
16.4  
6.5  
9.0  
2.1  
8.0  
16.0  
Q1  
SSOP  
DB  
DGV  
DW  
PW  
24  
24  
24  
24  
2000  
2000  
2000  
2000  
330.0  
330.0  
330.0  
330.0  
16.4  
12.4  
24.4  
16.4  
8.2  
7.0  
8.8  
5.6  
2.5  
1.6  
2.7  
1.6  
12.0  
8.0  
16.0  
12.0  
24.0  
16.0  
Q1  
Q1  
Q1  
Q1  
SN74CBT6800ADGVR TVSOP  
SN74CBT6800ADWR  
SN74CBT6800APWR  
SOIC  
10.75  
6.95  
15.7  
8.3  
12.0  
8.0  
TSSOP  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Mar-2008  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SN74CBT6800ADBQR  
SN74CBT6800ADBR  
SN74CBT6800ADGVR  
SN74CBT6800ADWR  
SN74CBT6800APWR  
SSOP/QSOP  
SSOP  
DBQ  
DB  
24  
24  
24  
24  
24  
2500  
2000  
2000  
2000  
2000  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
33.0  
33.0  
29.0  
41.0  
33.0  
TVSOP  
SOIC  
DGV  
DW  
PW  
TSSOP  
Pack Materials-Page 2  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000  
DGV (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
24 PINS SHOWN  
0,23  
0,13  
M
0,07  
0,40  
24  
13  
0,16 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
0°ā8°  
0,75  
1
12  
0,50  
A
Seating Plane  
0,08  
0,15  
0,05  
1,20 MAX  
PINS **  
14  
16  
20  
24  
38  
48  
56  
DIM  
A MAX  
A MIN  
3,70  
3,50  
3,70  
3,50  
5,10  
4,90  
5,10  
4,90  
7,90  
7,70  
9,80  
9,60  
11,40  
11,20  
4073251/E 08/00  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.  
D. Falls within JEDEC: 24/48 Pins – MO-153  
14/16/20/56 Pins – MO-194  
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