SN74F1056SC [TI]
8-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY; 8位肖特基势垒二极管总线端接阵列
| 型号： | SN74F1056SC |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 8-BIT SCHOTTKY BARRIER DIODE BUS-TERMINATION ARRAY |
| 文件： | 总5页 (文件大小：78K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74F1056
8-BIT SCHOTTKY BARRIER DIODE
BUS-TERMINATION ARRAY
SDFS085A – AUGUST 1992 – REVISED JULY 1997
SC PACKAGE
(TOP VIEW)
Designed to Reduce Reflection Noise
Repetitive Peak Forward Current 300 mA
8-Bit Array Structure Suited for
Bus-Oriented Systems
D01
D02
D03
D04
GND
GND
D05
D06
D07
1
2
3
4
5
6
7
8
9
description
This Schottky barrier diode bus-termination array
is designed to reduce reflection noise on memory
bus lines. This device consists of an 8-bit
high-speed Schottky diode array suitable for a
clamp to GND.
D08 10
The SN74F1056 is characterized for operation
from 0°C to 70°C.
D PACKAGE
(TOP VIEW)
NC
D01
D02
D03
D04
D05
D06
D07
D08
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
GND
GND
GND
GND
GND
NC
schematic diagrams
SC Package
D Package
1
1
D01
D01
D02
2
2
3
4
5
6
7
8
D02
15
GND
GND
GND
GND
GND
GND
3
D03
D03
D04
D05
D06
D07
14
13
12
11
6
GND
4
D04
7
D05
5
GND
8
D06
9
D07
10
10
D08
D08
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74F1056
8-BIT SCHOTTKY BARRIER DIODE
BUS-TERMINATION ARRAY
SDFS085A – AUGUST 1992 – REVISED JULY 1997
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Steady-state reverse voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
R
Continuous forward current, I : Any D terminal from GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
F
Total through all GND terminals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 mA
Repetitive peak forward current, I
(see Note 1): Any D terminal from GND . . . . . . . . . . . . . . . . . . 300 mA
Total through all GND terminals . . . . . . . . . . . . . . . 1.2 A
FRM
Continuous total power dissipation at (or below) 25°C free-air temperature . . . . . . . . . . . . . . . . . . . . . 500 mW
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: These values apply for t ≤ 100 µs, duty cycle ≤ 20%.
w
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
single-diode operation (see Note 2)
‡
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
2
UNIT
I
R
Static reverse current
V
R
= 7 V
µA
I
I
I
= 18 mA
= 50 mA
= 200 mA
0.8
1
1
F
F
F
V
V
Static forward voltage
Peak forward voltage
Total capacitance
V
V
F
1.2
1.23
3
FM
V
= 0,
f = 1 MHz
f = 1 MHz
3.75
3
R
R
C
pF
t
V
= 2 V,
2.5
‡
All typical values are at T = 25°C.
A
NOTE 2: Test conditions and limits apply separately to each of the diodes. The diodes not under test are open-circuited during the measurement
of these characteristics.
multiple-diode operation
‡
PARAMETER
TEST CONDITIONS
Total GND current = 1.2 A, See Note 3
MIN TYP
MAX
UNIT
I
x
Internal crosstalk current
10
50
µA
‡
All typical values are at T = 25°C.
A
NOTE 3: I is measured under the following conditions with one diode static, all others switching:
x
Switching diodes: t = 100 µs, duty cycle = 20%
w
Static diode: V = 5 V
R
The static diode input current is the internal crosstalk current I .
x
switching characteristics, T = 25°C
A
PARAMETER
TEST CONDITIONS
= 10 mA,
MIN
MIN
TYP
MAX
UNIT
t
rr
Reverse recovery time
I
F
= 10 mA,
I
I
= 1 mA,
R = 100 Ω
L
5
7
ns
RM(REC)
R(REC)
undershoot characteristics
PARAMETER
TEST CONDITIONS
TYP
MAX
UNIT
t = 2 ns, t = 50 ns, V = 5 V, V = 0, Z = 25 Ω, Z = 50 Ω,
L = 36-inch coax
f
w
IH IL
S
O
V
US
Undershoot voltage
0.6
0.7
V
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74F1056
8-BIT SCHOTTKY BARRIER DIODE
BUS-TERMINATION ARRAY
SDFS085A – AUGUST 1992 – REVISED JULY 1997
APPLICATION INFORMATION
Large negative transients occurring at the inputs of memory devices (DRAMs, SRAMs, EPROMs, etc.) or on the
CLOCK lines of many clocked devices can result in improper operation of the devices. The SN74F1056 diode
termination array helps suppress negative transients caused by transmission-line reflections, crosstalk, and
switching noise.
Diode terminations have several advantages when compared to resistor termination schemes. Split resistor or
Thevenin equivalent termination can cause a substantial increase in power consumption. The use of a single resistor
togroundtoterminatealineusuallyresultsindegradationoftheoutputhighlevel, resultinginreducednoiseimmunity.
Series damping resistors placed on the outputs of the driver reduce negative transients, but they also can increase
propagation delays down the line, as a series resistor reduces the output drive capability of the driving device. Diode
terminations have none of these drawbacks.
The operation of the diode arrays in reducing negative transients is explained in the following figures. The diode
conducts current when the voltage reaches a negative value large enough for the diode to turn on. Suppression of
negative transients is tracked by the current-voltage characteristic curve for that diode. A typical current versus
voltage plot for the SN74F1056 is shown in Figure 1.
To illustrate how the diode arrays act to reduce negative transients at the end of a transmission line, the test setup
in Figure 2(a) was evaluated. The resulting waveforms with and without the diode are shown in Figure 2(b).
The maximum effectiveness of the diode arrays in suppressing negative transients occurs when the diode arrays are
placed at the end of a line and/or the end of a long stub branching off a main transmission line. The diodes also can
be used to reduce the negative transients that occur due to discontinuities in the middle of a line. An example of this
is a slot in a backplane that is provided for an add-on card.
DIODE FORWARD CURRENT
vs
DIODE FORWARD VOLTAGE
–100
T
A
= 25°C
–90
–80
–70
–60
–50
–40
–30
Variable 1:
V
IN
–Ch 1
Linear Sweep:
Start
Stop
Step
0.000 V
–2.000 V
–0.010 V
Constants:
V
V
–Vs1
–Vs2
3.5000 V
0.0000 V
HI
LO
–20
–10
0
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
V
F
– Forward Voltage – V
Figure 1. Current Versus Voltage for the SN74F1056
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74F1056
8-BIT SCHOTTKY BARRIER DIODE
BUS-TERMINATION ARRAY
SDFS085A – AUGUST 1992 – REVISED JULY 1997
APPLICATION INFORMATION
Z
= 50 Ω
O
Length = 36 in.
S1
Z
S
= 25Ω
(a) UNDERSHOOT TEST SETUP
1.03610 µs
1.06110 µs
1.08610 µs
S1 Open
S1 Closed
Vmarker 1
–2.6 V
Vmarker 2
Ch 1
= 2.000 V/div
Offset = 2.340 V
Timebase = 5.00 ns/div
Vmarker 1 = 0.0000 V
Vmarker 2 = –600.00 mV
Delay = 1.06110 µs
Delta V = –600.0 mV
(b) OSCILLOSCOPE DISPLAY
Figure 2. Undershoot Test Setup and Oscilloscope Display
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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