SN74F174A [TI]

HEX D-TYPE FLIP-FLOP WITH CLEAR; 六路D型触发器与Clear
SN74F174A
型号: SN74F174A
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

HEX D-TYPE FLIP-FLOP WITH CLEAR
六路D型触发器与Clear

触发器
文件: 总5页 (文件大小:71K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN74F174A  
HEX D-TYPE FLIP-FLOP  
WITH CLEAR  
SDFS029B – D2932, MARCH 1987 – REVISED OCTOBER 1993  
D OR N PACKAGE  
(TOP VIEW)  
Contains Six Flip-Flops With Single-Rail  
Outputs  
Buffered Clock and Direct Clear Inputs  
Applications Include:  
Buffer/Storage Registers  
Shift Registers  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
CLR  
1Q  
1D  
2D  
2Q  
3D  
3Q  
GND  
CC  
6Q  
6D  
5D  
5Q  
4D  
4Q  
CLK  
Pattern Generators  
Fully Buffered Outputs for Maximum  
Isolation From External Disturbances  
Package Options Include Plastic  
Small-Outline Packages and Standard  
Plastic 300-mil DIPs  
description  
This monolithic, positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic with a  
direct clear (CLR) input. Information at the data (D) inputs meeting the setup time requirements is transferred  
to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level  
and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either  
the high or low level, the D-input signal has no effect at the output.  
The SN74F174A is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
Q
CLR  
H
CLK  
D
X
H
L
L
Q
0
H
H
H
L
L
L
X
X
logic symbol  
1
9
R
CLR  
CLK  
C1  
3
2
5
1D  
2D  
3D  
4D  
5D  
6D  
1D  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
4
6
7
11  
13  
14  
10  
12  
15  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74F174A  
HEX D-TYPE FLIP-FLOP  
WITH CLEAR  
SDFS029B – D2932, MARCH 1987 – REVISED OCTOBER 1993  
logic diagram (positive logic)  
9
CLK  
1
CLR  
3
1D  
1D  
C1  
2
1Q  
R
Four Identical Channels  
Not Shown  
14  
6D  
1D  
C1  
R
15  
6Q  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 V to 7 V  
I
Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA to 5 mA  
Voltage applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to V  
CC  
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA  
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C  
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTE 1: The input-voltage ratings may be exceeded provided the input-current ratings are observed.  
recommended operating conditions  
MIN NOM  
MAX  
UNIT  
V
V
V
V
Supply voltage  
4.5  
2
5
5.5  
CC  
IH  
IL  
High-level input voltage  
Low-level input voltage  
Input clamp current  
V
0.8  
18  
–1  
V
I
I
I
mA  
mA  
mA  
°C  
IK  
High-level output current  
Low-level output current  
Operating free-air temperature  
OH  
OL  
20  
T
A
0
70  
2–2  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74F174A  
HEX D-TYPE FLIP-FLOP  
WITH CLEAR  
SDFS029B – D2932, MARCH 1987 – REVISED OCTOBER 1993  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN TYP  
MAX  
UNIT  
V
V
V
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 4.5 V,  
I = – 18 mA  
– 1.2  
V
IK  
I
= 4.5 V,  
= 4.75 V,  
= 4.5 V,  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
I
I
I
= – 1 mA  
= – 1 mA  
= 20 mA  
2.5  
2.7  
3.4  
0.3  
OH  
OH  
OL  
V
OH  
OL  
0.5  
0.1  
V
I
I
I
I
I
I
V = 7 V  
I
mA  
µA  
I
V = 2.7 V  
I
20  
IH  
IL  
V = 0.5 V  
I
– 0.6  
– 150  
45  
mA  
mA  
mA  
mA  
V
O
= 0  
– 60  
OS  
See Note 2  
See Note 3  
30  
39  
CCH  
CCL  
55  
All typical values are at V  
= 5 V, T = 25°C.  
A
CC  
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.  
NOTES: 2. I  
is measured with all outputs open, all data inputs and enable input at 4.5 V, and the clock input at 4.5 V after being momentarily  
CCH  
grounded.  
is measured with all outputs open, all data inputs and enable input at 0 V, and the clock input at 4.5 V after being momentarily  
3.  
I
CCL  
grounded.  
timing requirements  
V
T
= 5 V,  
= 25°C  
V
= 4.5 V to 5.5 V,  
CC  
A
CC  
T = MIN to MAX  
A
§
UNIT  
MIN  
0
MAX  
MIN  
0
MAX  
f
t
Clock frequency  
Pulse duration  
100  
80  
MHz  
clock  
CLK high  
4
4
CLK low  
6
6
ns  
w
CLR low  
5
5
Data high or low  
CLR high¶  
Data high or low  
4.5  
5
4.5  
5
t
t
ns  
ns  
Setup time before CLK↑  
Hold time after CLK↑  
su  
0.5  
1
h
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.  
Inactive-state setup time is also referred to as recovery time.  
switching characteristics (see Note 4)  
V
C
R
= 5 V,  
= 50 pF,  
= 500 ,  
= 25°C  
V
C
R
= 4.5 V to 5.5 V,  
= 50 pF,  
CC  
L
L
CC  
L
L
FROM  
PARAMETER  
TO  
(OUTPUT)  
= 500,  
= MIN to MAX  
UNIT  
(INPUT)  
§
T
A
T
A
MIN  
100  
2.7  
TYP  
140  
4.5  
MAX  
MIN  
80  
MAX  
f
MHz  
ns  
max  
PLH  
PHL  
PHL  
t
t
t
8
10  
14  
2.7  
3.3  
4.2  
9
11  
15  
CLK  
CLR  
Any Q  
Any Q  
3.4  
4.2  
4.2  
6.3  
ns  
NOTE 4: Load circuits and waveforms are shown in Section 1.  
2–3  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
2–4  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
BE FULLY AT THE CUSTOMER’S RISK.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 1998, Texas Instruments Incorporated  

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