SN74F374 [TI]
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS; 八路边沿触发D型触发器具有三态输出
| 型号： | SN74F374 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| 文件： | 总5页 (文件大小：77K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54F374, SN74F374
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDFS077A – D2932, MARCH 1987 – REVISED OCTOBER 1993
SN54F374 . . . J PACKAGE
SN74F374 . . . DB, DW, OR N PACKAGE
(TOP VIEW)
• Eight D-Type Flip-Flops in a Single Package
• 3-State Bus-Driving True Outputs
• Full Parallel Access for Loading
• Buffered Control Inputs
• Package Options Include Plastic
Small-Outline (SOIC) and Shrink
Small-Outline (SSOP) Packages, Ceramic
Chip Carriers, and Plastic and Ceramic
DIPs
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
V
CC
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
8Q
8D
7D
7Q
6Q
6D
13 5D
12 5Q
11 CLK
description
These 8-bit flip-flops feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
GND 10
SN54F374 . . . FK PACKAGE
(TOP VIEW)
The eight flip-flops of the ′F374 are edge-triggered
D-type flip-flops. On the positive transition of the
clock (CLK) input, the Q outputs are set to thelogic
levels that were set up at the data (D) inputs.
3
2
1
20 19
18
2D
2Q
3Q
3D
4D
8D
7D
7Q
6Q
4
5
6
7
8
17
16
15
A buffered output enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low) or a high-impedance state. In
the high-impedance state, the outputs neither
load nor drive the bus lines significantly. The
high-impedance state and the increased drive
provide the capability to drive bus lines without
need for interface or pullup components.
14 6D
9 10 11 12 13
The output enable (OE) input does not affect internal operations of the flip-flop. Old data can be retained or new
data can be entered while the outputs are in the high-impedance state.
The SN74F374 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54F374 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74F374 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
Q
OE
L
CLK
D
H
L
↑
↑
H
L
L
L
H or L
X
X
X
Q
0
H
Z
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54F374, SN74F374
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDFS077A – D2932, MARCH 1987 – REVISED OCTOBER 1993
†
logic symbol
logic diagram (positive logic)
1
1
OE
OE
EN
C1
11
11
CLK
CLK
C1
1D
2
1Q
3
3
1D
4
2
5
1D
1D
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
2D
7
6
3D
8
9
4D
13
12
15
16
19
5D
14
To Seven Other Channels
6D
17
7D
18
8D
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.2 V to 7 V
I
Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA to 5 mA
Voltage range applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V
Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
CC
Current into any output in the low state: SN54F374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA
SN74F374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 mA
Operating free-air temperature range: SN54F374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
SN74F374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.
recommended operating conditions
SN54F374
SN74F374
UNIT
MIN NOM
MAX
MIN NOM
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
IH
IL
High-level input voltage
Low-level input voltage
Input clamp current
0.8
–18
– 3
0.8
–18
– 3
24
V
I
I
I
mA
mA
mA
°C
IK
High-level output current
Low-level output current
Operating free-air temperature
OH
OL
20
T
A
–55
125
0
70
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54F374, SN74F374
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDFS077A – D2932, MARCH 1987 – REVISED OCTOBER 1993
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54F374
SN74F374
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
V
= 4.5 V,
= 4.5 V
= 4.75 V,
= 4.5 V
I = –18 mA
–1.2
–1.2
V
IK
CC
CC
CC
CC
I
I
I
I
I
I
= – 1 mA
= – 3 mA
= – 1 mA to –3 mA
= 20 mA
2.5
2.4
3.4
3.3
2.5
2.4
2.7
3.4
3.3
OH
OH
OH
OL
OL
V
OH
V
0.3
0.5
V
OL
V
= 24 mA
0.35
0.5
50
I
I
I
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
V
V
= 2.7 V
50
–50
0.1
µA
µA
OZH
OZL
I
O
= 0.5 V
–50
0.1
O
V = 7 V
I
mA
µA
V = 2.7 V
I
20
20
IH
V = 0.5 V
I
– 0.6
–150
86
– 0.6
–150
86
mA
mA
mA
IL
‡
V
O
= 0
–60
–60
OS
See Note 2
55
55
CCZ
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
is measured with OE at 4.5 V and all other inputs grounded.
NOTE 2:
I
CCZ
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
V
T
= 5 V,
= 25°C
CC
A
SN54F374
SN74F374
UNIT
′F374
MIN
0
MAX
MIN
0
MAX
60
MIN
0
MAX
70
f
t
Clock frequency
Pulse duration
100
MHz
ns
clock
CLK high
CLK low
High
7
7
7
w
6
6
6
2
2.5
2
2
t
t
ns
ns
Setup time, data before CLK↑
Hold time, data after CLK↑
su
2
2
Low
High
2
2
2
h
Low
2
2.5
2
2–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54F374, SN74F374
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDFS077A – D2932, MARCH 1987 – REVISED OCTOBER 1993
switching characteristics (see Note 3)
V
C
R
= 5 V,
= 50 pF,
= 500 Ω,
= 25°C
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
CC
L
L
= 500Ω,
FROM
(INPUT)
TO
(OUTPUT)
†
PARAMETER
UNIT
T
A
T
A
= MIN to MAX
′F374
SN54F374
SN74F374
MIN
100
3.2
3.2
1.2
1.2
1.2
1.2
TYP
MAX
MIN
60
MAX
MIN
70
MAX
f
MHz
ns
max
PLH
PHL
PZH
t
t
6.1
6.1
8.6
5.4
4.9
3.9
8.5
8.5
11.5
7.5
7
3.2
3.2
1.2
1.2
1.2
1.2
10.5
11
3.2
3.2
1.2
1.2
1.2
1.2
10
10
CLK
Q
Q
Q
t
14
10
8
12.5
8.5
8
ns
ns
OE
OE
t
PZL
t
PHZ
t
5.5
7.5
6.5
PLZ
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 3: Load circuits and waveforms are shown in Section 1.
2–4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
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Copyright 1998, Texas Instruments Incorporated
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