SN74F541NE4 [TI]
OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS; 八路缓冲器/驱动器,具有三态输出型号: | SN74F541NE4 |
厂家: | TEXAS INSTRUMENTS |
描述: | OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
文件: | 总13页 (文件大小:461K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN54F541, SN74F541
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SDFS021A – D3126, JANUARY 1989 – REVISED OCTOBER 1993
SN54F541 . . . J PACKAGE
SN74F541 . . . DW OR N PACKAGE
(TOP VIEW)
• 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
• Data Flow-Through Pinout (All Inputs on
Opposite Side From Outputs)
OE1
A1
V
CC
OE2
Y1
1
2
3
4
5
6
7
8
9
10
20
19
18
17
• Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Plastic and Ceramic DIPs
A2
A3
Y2
A4
16 Y3
description
15
14
13
12
11
A5
Y4
Y5
Y6
Y7
Y8
A6
The ′F541 octal buffer/line driver is ideal for driving
bus lines or buffering memory address registers.
The device features inputs and outputs on
opposite sides of the package to facilitate
printed-circuit-board layout.
A7
A8
GND
The 3-state control gate is a 2-input AND gate with
active-low inputs so that if either output enable
(OE1 or OE2) input is high, all eight outputs are in
the high-impedance state.
SN54F541 . . . FK PACKAGE
(TOP VIEW)
The SN54F541 is characterized for operation over
the full military temperature range of –55°C to
125°C. The SN74F251 is characterized for
operation from 0°C to 70°C.
3
2
1
20 19
18
Y1
Y2
Y3
Y4
Y5
A3
A4
A5
A6
A7
4
5
6
7
8
17
16
15
14
9 10 11 12 13
FUNCTION TABLE
INPUTS
OUTPUT
Y
OE1
L
OE2
L
A
L
L
H
Z
Z
L
L
H
X
X
H
X
X
H
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54F541, SN74F541
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SDFS021A – D3126, JANUARY 1989 – REVISED OCTOBER 1993
†
logic symbol
logic diagram (positive logic)
1
OE1
1
&
OE1
OE2
19
EN
19
OE2
2
18
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
A1
Y1
1
A1
A2
A3
A4
A5
A6
A7
A8
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
To Seven Other Channels
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.2 V to 7 V
I
Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA to 5 mA
Voltage range applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V
Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
CC
Current into any output in the low state: SN54F541 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74F541 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Operating free-air temperature range: SN54F541 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
SN74F541 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.
recommended operating conditions
SN54F541
SN74F541
UNIT
MIN NOM
MAX
MIN NOM
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
IH
IL
High-level input voltage
Low-level input voltage
Input clamp current
0.8
–18
– 12
48
0.8
–18
– 15
64
V
I
I
I
mA
mA
mA
°C
IK
High-level output current
Low-level output current
Operating free-air temperature
OH
OL
T
A
–55
125
0
70
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54F541, SN74F541
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SDFS021A – D3126, JANUARY 1989 – REVISED OCTOBER 1993
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54F541
SN74F541
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
= 4.5 V,
= 4.5 V
I = –18 mA
–1.2
–1.2
V
IK
CC
I
I
I
I
I
I
I
= – 3 mA
= – 12 mA
= – 15 mA
= – 3 mA
= 48 mA
= 64 mA
= 2.7 V
2.4
2
3.3
3.2
2.4
3.3
3.1
OH
OH
OH
OH
OL
OL
CC
V
OH
V
2
V
V
= 4.75 V,
= 4.5 V
2.7
CC
0.38
0.55
V
OL
V
CC
0.42
0.55
50
I
I
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
V
50
–50
0.1
µA
µA
OZH
OZL
I
O
O
V
= 0.5 V
–50
0.1
V = 7 V
I
mA
µA
V = 2.7 V
I
20
20
IH
V = 0.5 V
I
– 0.6
– 0.6
–225
35
mA
mA
IL
‡
V
O
= 0
–100
–225 –100
OS
Outputs high
Outputs low
28
62
40
35
75
55
28
62
40
I
V
CC
= 5.5 V
75
mA
CC
Outputs disabled
55
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
switching characteristics (see Note 2)
V
C
R
= 5 V,
= 50 pF,
= 500 Ω,
= 25°C
V
C
R
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
L
CC
L
L
= 500Ω,
= MIN to MAX
FROM
(INPUT)
TO
(OUTPUT)
§
PARAMETER
UNIT
T
A
T
A
′F541
TYP
3.3
SN54F541
SN74F541
MIN
1.5
1.5
3
MAX
5.5
5.5
8
MIN
1
MAX
MIN
1.5
1.5
2.5
3
MAX
t
t
6.5
6.5
10
10
7
6
6
PLH
PHL
PZH
Any A
ns
ns
ns
Y
Y
Y
2.7
1
t
5.8
1.7
2.2
1
9.5
9.5
6.5
6
OE
OE
t
3.5
1.5
1.5
6.1
8.5
6
PZL
t
3.4
1.5
1.5
PHZ
t
2.9
5.5
1
7.5
PLZ
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 2: Load circuits and waveforms are shown in Section 1.
2–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2–4
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
CFP
Drawing
5962-9175301M2A
5962-9175301MRA
5962-9175301MSA
SN74F541DW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
FK
J
20
20
20
20
1
1
1
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB
A42
N / A for Pkg Type
N / A for Pkg Type
W
SOIC
DW
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74F541DWE4
SN74F541DWR
SN74F541DWRE4
SN74F541N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
PDIP
SO
DW
DW
DW
N
20
20
20
20
20
20
20
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74F541NE4
SN74F541NSR
SN74F541NSRE4
N
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
NS
NS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SNJ54F541FK
SNJ54F541J
SNJ54F541W
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CFP
FK
J
20
20
20
1
1
1
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB
A42
N / A for Pkg Type
N / A for Pkg Type
W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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