SN74FB2041ARCRG3 [TI]
7-BIT TTL/BTL TRANSCEIVER; 7位TTL / BTL收发器型号: | SN74FB2041ARCRG3 |
厂家: | TEXAS INSTRUMENTS |
描述: | 7-BIT TTL/BTL TRANSCEIVER |
文件: | 总10页 (文件大小:149K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN74FB2041A
7-BIT TTL/BTL TRANSCEIVER
SCBS172M – NOVEMBER 1991 – REVISED MARCH 2002
Compatible With IEEE Std 1194.1-1991
(BTL)
High-Impedance State During Power Up
and Power Down
TTL A Port, Backplane Transceiver Logic
(BTL) B Port
B-Port Biasing Network Preconditions the
Connector and PC Trace to the BTL
High-Level Voltage
Open-Collector B-Port Outputs Sink
100 mA
TTL-Input Structures Incorporate Active
Clamping to Aid in Line Termination
BIAS V
Pin Minimizes Signal Distortion
CC
During Live Insertion or Withdrawal
RC PACKAGE
(TOP VIEW)
52 51 50 49 48 47 46 45 44 43 42 41 40
1
39
38
37
36
35
34
33
32
31
30
29
28
27
GND
2AI1
2AI2
2AO2
GND
2AO3
GND
2AI3
GND
2B1
2
3
GND
2B2
GND
2B3
GND
3B1
GND
3B2
4
5
6
7
8
9
3AI1
10
11
12
13
3AO1
GND
3AO2
GND
GND
3B3
GND
14 15 16 17 18 19 20 21 22 23 24 25 26
description
The SN74FB2041A is a 7-bit transceiver designed to translate signals between TTL and backplane transceiver
logic (BTL) environments. The device is specifically designed to be compatible with IEEE Std 1194.1-1991.
The B port operates at BTL signal levels. The open-collector B ports are specified to sink 100 mA. Two output
enables (OEB and OEB) are provided for the B outputs. When OEB is high and OEB is low, the B port is active
and reflects the inverse of the data present at the A-input pins. When OEB is low, OEB is high, or V
is less
CC
than 2.1 V, the B port is turned off. The enable/disable logic partitions the device as two 3-bit sections and one
1-bit section.
The A port operates at TTL signal levels and has split input and output pins. The A outputs reflect the inverse
of the data at the B port when the A-port output enable (OEA) is high. When OEA is low or when V
than 2.1 V, the A outputs are in the high-impedance state.
is less
CC
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74FB2041A
7-BIT TTL/BTL TRANSCEIVER
SCBS172M – NOVEMBER 1991 – REVISED MARCH 2002
description (continued)
The pins TMS, TCK, TDI, and TDO are nonfunctional, i.e., not intended for use with the IEEE Std 1149.1 (JTAG)
test bus. TMS and TCK are not connected and TDI is shorted to TDO.
BIAS V
establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when V
is not connected.
CC
CC
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
0°C to 70°C QFP – RC Tube
SN74FB2041ARC
FB2041A
†
Package drawings, standard packing quantities, thermal data,
symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
FUNCTION
OEB
L
OEB
X
OEA
L
Isolation
X
H
L
L
X
H
B data to AO bus
X
H
H
H
L
L
AI data to B bus
H
L
H
AI data to B bus, B data to AO bus
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74FB2041A
7-BIT TTL/BTL TRANSCEIVER
SCBS172M – NOVEMBER 1991 – REVISED MARCH 2002
functional block diagram
46
45
47
OEB
1OEB
1OEA
1AI1
40
51
50
1B1
1AO1
25
20
2
2OEB
2OEA
2AI1
38
2B1
52
2AO1
36
3
4
2B2
2AI2
2AO2
34
8
6
2B3
2AI3
2AO3
26
24
9
3OEB
3OEA
3AI1
32
3B1
10
3AO1
30
14
12
3B2
3AI2
3AO2
28
18
16
3B3
3AI3
3AO3
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74FB2041A
7-BIT TTL/BTL TRANSCEIVER
SCBS172M – NOVEMBER 1991 – REVISED MARCH 2002
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V : Except B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.2 V to 7 V
I
B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.2 V to 3.5 V
Voltage range applied to any B output in the disabled or power-off state, V . . . . . . . . . . . . . . –0.5 V to 3.5 V
O
Voltage range applied to any output in the high state, V : A port . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
CC
Input clamp current, I : Except B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40 mA
IK
B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA
Current applied to any single output in the low state, I : A port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 mA
O
B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA
Package thermal impedance, θ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44°C/W
JA
stg
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 2)
MIN NOM
MAX
5.5
UNIT
V
CC,
BIAS V
,
Supply voltage
4.5
5
V
CC
BG V
CC
B port
1.62
2
2.3
V
High-level input voltage
Low-level input voltage
V
V
IH
IL
Except B port
B port
0.75
1.47
0.8
–18
–3
V
Except B port
I
I
Input clamp current
mA
mA
IK
High-level output current
AO port
AO port
B port
OH
OL
24
I
Low-level output current
mA
100
70
T
A
Operating free-air temperature
0
°C
NOTE 2: To ensure proper device operation, all unused inputs must be terminated as follows: A and control inputs to V (5 V) or GND, and
CC
B inputs to GND only. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74FB2041A
7-BIT TTL/BTL TRANSCEIVER
SCBS172M – NOVEMBER 1991 – REVISED MARCH 2002
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
PARAMETER
B port
TEST CONDITIONS
I = –18 mA
MIN TYP
MAX
–1.2
–0.5
UNIT
V
V
V
V
= 4.5 V,
= 4.5 V,
= 4.5 V,
= 4.5 V,
CC
CC
CC
CC
I
V
V
V
IK
Except B port
AO port
I = –40 mA
I
I
I
I
I
= –3 mA
= 24 mA
= 80 mA
= 100 mA
2.5
3.3
V
OH
OH
OL
OL
OL
AO port
0.35
0.5
1.1
V
OL
0.75
V
V
CC
= 4.5 V
B port
1.15
50
I
I
Except B port
Except B port
Except B port
B port
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
V = 5.5 V
I
µA
µA
I
‡
= 5.5 V,
V = 2.7 V
I
50
IH
= 5.5 V,
V = 0.5 V
I
–50
–100
100
50
‡
I
IL
µA
= 5.5 V,
V = 0.75 V
I
I
I
I
I
I
I
B port
= 0 to 5.5 V,
= 5.5 V,
V
O
V
O
V
O
V
O
V
O
V
O
= 2.1 V
µA
µA
µA
µA
µA
mA
OH
AO port
= 2.7 V
OZH
OZL
AO port
= 5.5 V,
= 0.5 V
–50
50
AO port
= 0 to 2.1 V,
= 2.1 V to 0,
= 5.5 V,
= 0.5 V to 2.7 V
= 0.5 V to 2.7 V
= 0
OZPU
OZPD
AO port
–50
–180
45
§
AO port
–30
OS
AI port to B port
B port to AO port
AI port
I
V
CC
= 5.5 V,
I = 0
O
mA
CC
65
3
3
C
C
C
V = 0.5 V or 2.5 V
I
pF
pF
pF
i
Control inputs
AO port
V
V
V
= 0.5 V or 2.5 V
5.5
o
io
O
= 0 to 4.5 V
5
5
B port per
IEEE Std 1194.1-1991
CC
CC
= 4.5 V to 5.5 V
†
‡
§
All typical values are at V
For I/O ports, the parameters I and I include the off-state output current.
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
= 5 V, T = 25°C.
A
IH IL
CC
live-insertion specifications over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS
= 0 to 2 V,
l
MIN
MAX
450
10
UNIT
µA
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 0 to 4.5 V
= 4.5 V to 5.5 V
= 0,
I
(BIAS V
CC
)
V
V (BIAS V ) = 4.5 V to 5.5 V
CC
CC
B
V
B port
B port
V (BIAS V ) = 5 V
1.62
2.1
V
O
I
CC
= 0,
V
B
= 1 V,
V (BIAS V ) = 4.5 V to 5.5 V
l CC
–1
I
O
= 0 to 5.5 V,
= 0 to 2.2 V,
OEB = 0 to 0.8 V
OEB = 0 to 5 V
100
100
µA
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74FB2041A
7-BIT TTL/BTL TRANSCEIVER
SCBS172M – NOVEMBER 1991 – REVISED MARCH 2002
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
V
T
= 5 V,
= 25°C
CC
A
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
MIN
2.3
2.6
2
TYP
3.9
4.1
3.6
3.8
4.6
4.7
4.3
4.2
3.2
2.8
2.4
3.8
0.5
0.4
1.6
1.4
MAX
5.1
5
t
t
t
t
t
t
t
t
t
t
t
t
t
t
2
2.5
1.7
2
5.6
5.3
5.3
6.4
6.3
6.2
5.8
6.4
5.2
5
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
sk(p)
sk(o)
AI
ns
ns
ns
ns
ns
ns
B
4.8
4.9
5.8
6
AO
B
2.3
3
2.6
3.1
2.6
2.5
1.5
1
OEB
B
3.1
2.7
2.7
1.5
1.1
1
5.6
5.3
5.2
5
OEB
OEA
B
AO
3.9
5.6
1
4.2
5.8
OEA
AO
2.2
1.7
†
†
Pulse skew, AI to B or B to AO
Output skew, AI to B or B to AO
Rise time, 1.3 V to 1.8 V, B outputs
Fall time, 1.8 V to 1.3 V, B outputs
B-port input pulse rejection
ns
ns
1
1
1
2.4
2.3
1
1
1
2.5
2.4
t
t
ns
ns
t
(pr)
†
Skew values are applicable for through mode only.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74FB2041A
7-BIT TTL/BTL TRANSCEIVER
SCBS172M – NOVEMBER 1991 – REVISED MARCH 2002
PARAMETER MEASUREMENT INFORMATION
2.1 V
16.5 Ω
7 V
Open
S1
500 Ω
From Output
Under Test
From Output
Under Test
Test
Point
C
= 50 pF
C = 30 pF
L
(see Note A)
L
500 Ω
(see Note A)
LOAD CIRCUIT FOR A OUTPUTS
LOAD CIRCUIT FOR B OUTPUTS
3 V
0 V
TEST
S1
Input
1.5 V
1.5 V
t
/t
Open
7 V
PLH PHL
/t
t
PLZ PZL
t
/t
Open
PHZ PZH
t
t
PLH
PHL
V
V
OH
3 V
0 V
Output
1.55 V
1.55 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (A TO B)
t
t
PLZ
PZL
Output
Waveform 1
S1 at 7 V
3.5 V
2 V
1 V
V
V
+ 0.3 V
Input
1.55 V
1.55 V
OL
(see Note B)
V
OL
OH
t
t
PHZ
PZH
t
t
PLH
PHL
Output
Waveform 2
S1 at Open
(see Note B)
V
V
V
OH
– 0.3 V
OH
Output
1.5 V
1.5 V
≈0 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (B TO A)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES (A PORT)
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: TTL inputs: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns,
O
r
t ≤ 2.5 ns; BTL inputs: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
f
O
r
f
Figure 1. Load Circuits and Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
QFP
QFP
Drawing
SN74FB2041ARC
ACTIVE
ACTIVE
RC
52
52
96
TBD
CU SNPB
CU SN
Level-2-240C-1YR
SN74FB2041ARCG3
RC
96 Green (RoHS &
no Sb/Br)
Level-3-260C-168 HR
SN74FB2041ARCR
ACTIVE
ACTIVE
QFP
QFP
RC
RC
52
52
500
TBD
CU SNPB
CU SN
Level-2-240C-1YR
SN74FB2041ARCRG3
500 Green (RoHS &
no Sb/Br)
Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MQFP003 – OCTOBER 1994
RC (S-PQFP-G52)
PLASTIC QUAD FLATPACK
0,38
0,22
M
0,13
0,65
39
27
40
26
52
14
0,16 NOM
1
13
7,80 TYP
10,20
SQ
9,80
Gage Plane
13,45
SQ
12,95
0,25
0,05 MIN
0°–7°
2,20
1,80
1,03
0,73
Seating Plane
0,10
2,45 MAX
4040151/ B 03/95
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-022
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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