SN74GTLPH32945ZKER [TI]
32-BIT LVTTL-TO-GTLP BUS TRANSCEIVER; 32位LVTTL至GTLP总线收发器
| 型号： | SN74GTLPH32945ZKER |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 32-BIT LVTTL-TO-GTLP BUS TRANSCEIVER |
| 文件： | 总15页 (文件大小：283K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74GTLPH32945
32-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
www.ti.com
SCES293C–OCTOBER 1999–REVISED JUNE 2005
FEATURES
•
•
LVTTL Outputs (–24 mA/24 mA)
•
•
•
•
Member of the Texas Instruments Widebus+™
Family
GTLP Rise and Fall Times Designed for
Optimal Data-Transfer Rate and Signal
Integrity in Distributed Loads
TI-OPC™ Circuitry Limits Ringing on
Unevenly Loaded Backplanes
•
Ioff, Power-Up 3-State, and BIAS VCC Support
Live Insertion
OEC™ Circuitry Improves Signal Integrity and
Reduces Electromagnetic Interference
•
•
Bus Hold on A-Port Data Inputs
Bidirectional Interface Between GTLP Signal
Levels and LVTTL Logic Levels
Distributed VCC and GND Pins Minimize
High-Speed Switching Noise
•
•
LVTTL Interfaces Are 5-V Tolerant
Medium-Drive GTLP Outputs (50 mA)
•
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
DESCRIPTION/ORDERING INFORMATION
The SN74GTLPH32945 is a medium-drive, 32-bit bus transceiver that provides LVTTL-to-GTLP and
GTLP-to-LVTTL signal-level translation. It is partitioned as four 8-bit transceivers. The device provides a
high-speed interface between cards operating at LVTTL logic levels and a backplane operating at GTLP signal
levels. High-speed (about three times faster than standard TTL or LVTTL) backplane operation is a direct result
of GTLP's reduced output swing (<1 V), reduced input threshold levels, improved differential input, OEC circuitry,
and TI-OPC circuitry. Improved GTLP OEC and TI-OPC circuits minimize bus-settling time and have been
designed and tested using several backplane models. The medium drive allows incident-wave switching in
heavily loaded backplanes with equivalent load impedance down to 19 Ω.
GTLP is the Texas Instruments derivative of the Gunning Transceiver Logic (GTL) JEDEC standard JESD 8-3.
The ac specification of the SN74GTLPH32945 is given only at the preferred higher noise margin GTLP, but the
user has the flexibility of using this device at either GTL (VTT = 1.2 V and VREF = 0.8 V) or GTLP (VTT = 1.5 V and
VREF = 1 V) signal levels.
Normally, the B port operates at GTLP signal levels. The A-port and control inputs operate at LVTTL logic levels,
but are 5-V tolerant and are compatible with TTL and 5-V CMOS inputs. VREF is the B-port differential input
reference voltage.
This device is fully specified for live-insertion applications using Ioff, power-up 3-state, and BIAS VCC. The Ioff
circuitry disables the outputs, preventing damaging current backflow through the device when it is powered
down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power
down, which prevents driver conflict. The BIAS VCC circuitry precharges and preconditions the B-port input/output
connections, preventing disturbance of active data on the backplane during card insertion or removal, and
permits true live-insertion capability.
This GTLP device features TI-OPC circuitry, which actively limits overshoot caused by improperly terminated
backplanes, unevenly distributed cards, or empty slots during low-to-high signal transitions. This improves signal
integrity, which allows adequate noise margin to be maintained at higher frequencies.
Active bus-hold circuitry holds unused or undriven LVTTL data inputs at a valid logic state. Use of pullup or
pulldown resistors with the bus-hold circuitry is not recommended.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMMER
TOP-SIDE MARKING
GM45
–40°C to 85°C
LFBGA – GKE Tape and reel
SN74GTLPH32945KR
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus+, TI-OPC, OEC are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1999–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74GTLPH32945
32-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
www.ti.com
SCES293C–OCTOBER 1999–REVISED JUNE 2005
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, the output-enable (OE) input should be tied to VCC
through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the
driver.
GKE PACKAGE
(TOP VIEW)
1
2
3
4
5
6
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
TERMINAL ASSIGNMENTS
1
2
3
4
1OE
5
6
A
B
C
D
E
F
1A2
1A4
1A6
1A8
2A2
2A4
2A6
2A7
3A2
3A4
3A6
3A8
4A2
4A4
4A6
4A7
1A1
1A3
1A5
1A7
2A1
2A3
2A5
2A8
3A1
3A3
3A5
3A7
4A1
4A3
4A5
4A8
1DIR
GND
1VCC
GND
GND
1VCC
GND
2DIR
3DIR
GND
2VCC
GND
GND
2VCC
GND
4DIR
1B1
1B3
1B5
1B7
2B1
2B3
2B5
2B8
3B1
3B3
3B5
3B7
4B1
4B3
4B5
4B8
1B2
1B4
1B6
1B8
2B2
2B4
2B6
2B7
3B2
3B4
3B6
3B8
4B2
4B4
4B6
4B7
GND
1BIAS VCC
GND
GND
1VREF
GND
G
H
J
2OE
3OE
K
L
GND
2BIAS VCC
GND
M
N
P
R
T
GND
2VREF
GND
4OE
2
SN74GTLPH32945
32-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
www.ti.com
SCES293C–OCTOBER 1999–REVISED JUNE 2005
FUNCTIONAL DESCRIPTION
The SN74GTLPH32945 is a medium-drive (50-mA), 32-bit bus transceiver partitioned as four 8-bit segments and
is designed for asynchronous communication between data buses. The device transmits data from the A port to
the B port or from the B port to the A port, depending on the logic level at the direction-control (DIR) input. OE
can be used to disable the device so the buses are effectively isolated. Data polarity is noninverting.
For A-to-B data flow, when OE is low and DIR is high, the B outputs take on the logic value of the A inputs.
When OE is high, the outputs are in the high-impedance state.
The data flow for B to A is similar to that of A to B, except OE and DIR are low.
FUNCTION TABLE
INPUTS
OUTPUT
MODE
Isolation
OE
H
DIR
X
Z
L
L
B data to A port
A data to B port
True transparent
L
H
LOGIC DIAGRAM (POSITIVE LOGIC)
A3
A2
1DIR
1A1
A4
A5
1OE
1B1
F4
1V
REF
To Seven Other Channels
H3
E2
2DIR
2A1
H4
E5
2OE
2B1
To Seven Other Channels
(1) 1VCC and 1BIAS VCC are associated with these channels.
3
SN74GTLPH32945
32-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
www.ti.com
SCES293C–OCTOBER 1999–REVISED JUNE 2005
LOGIC DIAGRAM (POSITIVE LOGIC) (CONTINUED)(1)
J3
J2
3DIR
3A1
J4
J5
3OE
3B1
P4
2V
REF
To Seven Other Channels
T3
N2
4DIR
4A1
T4
N5
4OE
4B1
To Seven Other Channels
(1) 2VCC and 2BIAS VCC are associated with these channels.
4
SN74GTLPH32945
32-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
www.ti.com
SCES293C–OCTOBER 1999–REVISED JUNE 2005
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
BIAS VCC
–0.5
4.6
V
A-port and control inputs
–0.5
–0.5
–0.5
–0.5
7
4.6
7
VI
Input voltage range(2)
V
V
B port and VREF
A port
Voltage range applied to any output in the
high-impedance or power-off state(2)
VO
B port
4.6
48
A port
IO
IO
Current into any output in the low state
mA
B port
100
48
Current into any A-port output in the high state(3)
Continuous current through each VCC or GND
Input clamp current
mA
mA
mA
mA
°C/W
°C
±100
–50
–50
40
IIK
VI < 0
VO < 0
IOK
θJA
Tstg
Output clamp current
Package thermal impedance(4)
Storage temperature range
–65
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3) This current flows only when the output is in the high state and VO > VCC
.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
5
SN74GTLPH32945
32-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
www.ti.com
SCES293C–OCTOBER 1999–REVISED JUNE 2005
Recommended Operating Conditions(1)(2)(3)(4)
MIN
NOM
MAX
UNIT
VCC
BIAS VCC
,
Supply voltage
3.15
3.3
3.45
V
GTL
1.14
1.35
0.74
0.87
1.2
1.5
0.8
1
1.26
1.65
0.87
1.1
VTT
Termination voltage
V
V
V
V
V
GTLP
GTL
VREF
Reference voltage
Input voltage
GTLP
B port
VTT
5.5
VI
Except B port
B port
VCC
VREF + 0.05
2
VIH
VIL
High-level input voltage
Low-level input voltage
Except B port
B port
VREF – 0.05
Except B port
0.8
–18
–24
24
IIK
Input clamp current
mA
mA
IOH
High-level output current
A port
A port
IOL
Low-level output current
mA
B port
50
∆t/∆v
∆t/∆VCC
TA
Input transition rise or fall rate
Power-up ramp rate
Outputs enabled
10
ns/V
µs/V
°C
20
Operating free-air temperature
–40
85
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
(2) Proper connection sequence for use of the B-port I/O precharge feature is GND and BIAS VCC = 3.3 V first, I/O second, and VCC = 3.3 V
last, because the BIAS VCC precharge circuitry is disabled when any VCC pin is connected. The control and VREF inputs can be
connected anytime, but normally are connected during the I/O stage. If B-port precharge is not required, any connection sequence is
acceptable but, generally, GND is connected first.
(3) VTT and RTT can be adjusted to accommodate backplane impedances if the dc recommended IOL ratings are not exceeded.
(4) VREF can be adjusted to optimize noise margins, but normally is two-thirds VTT. TI-OPC circuitry is enabled in the A-to-B direction and is
activated when VTT > 0.7 V above VREF. If operated in the A-to-B direction, VREF should be set to within 0.6 V of VTT to minimize current
drain.
6
SN74GTLPH32945
32-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
www.ti.com
SCES293C–OCTOBER 1999–REVISED JUNE 2005
Electrical Characteristics
over recommended operating free-air temperature range for GTLP (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP(1)
MAX UNIT
VIK
VCC = 3.15 V,
II = –18 mA
IOH = –100 µA
IOH = –12 mA
IOH = –24 mA
IOL = 100 µA
IOL = 12 mA
IOL = 24 mA
IOL = 100 µA
IOL = 10 mA
IOL = 40 mA
IOL = 50 mA
VI = 0 or 5.5 V
VO = VCC
–1.2
V
VCC = 3.15 V to 3.45 V,
VCC – 0.2
VOH
A port
2.4
2
V
VCC = 3.15 V
VCC = 3.15 V to 3.45 V,
VCC = 3.15 V
0.2
0.4
0.5
0.2
0.2
0.4
0.55
±10
10
A port
VOL
VCC = 3.15 V to 3.45 V,
V
B port
VCC = 3.15 V
II
Control inputs
VCC = 3.45 V,
VCC = 3.45 V
µA
µA
A port
(2)
IOZH
B port
VO = 1.5 V
10
(2)
(3)
(4)
IOZL
IBHL
IBHH
A and B ports
A port
VCC = 3.45 V,
VCC = 3.15 V,
VCC = 3.15 V,
VCC = 3.45 V,
VCC = 3.45 V,
VO = GND
–10
µA
µA
µA
µA
µA
VI = 0.8 V
75
–75
A port
VI = 2 V
(5)
IBHLO
IBHHO
A port
VI = 0 to VCC
VI = 0 to VCC
Outputs high
Outputs low
Outputs disabled
500
(6)
A port
–500
100
100
100
VCC = 3.45 V, IO = 0,
VI (A-port or control inputs) = VCC or GND,
VI (B port) = VTT or GND
ICC
A or B port
mA
VCC = 3.45 V, One A-port or control input at VCC – 0.6 V,
Other A-port or control inputs at VCC or GND
(7)
∆ICC
1
mA
pF
Ci
Control inputs
A port
VI = 3.15 V or 0
VO = 3.15 V or 0
VO = 1.5 V or 0
4.5
7.5
7.5
5
9
9
Cio
pF
B port
(1) All typical values are at VCC = 3.3 V, TA = 25°C.
(2) For I/O ports, the parameters IOZH and IOZL include the input leakage current.
(3) The bus-hold circuit can sink at least the minimum low sustaining current at VILmax. IBHL should be measured after lowering VIN to GND
and then raising it to VILmax.
(4) The bus-hold circuit can source at least the minimum high sustaining current at VIHmin. IBHH should be measured after raising VIN to VCC
and then lowering it to VIHmin.
(5) An external driver must source at least IBHLO to switch this node from low to high.
(6) An external driver must sink at least IBHHO to switch this node from high to low.
(7) This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
Hot-Insertion Specifications for A Port
over recommended operating free-air temperature range
PARAMETER
Ioff
TEST CONDITIONS
BIAS VCC = 0,
MIN
MAX UNIT
VCC = 0,
VI or VO = 0 to 5.5 V
OE = 0
10
±30
±30
µA
µA
µA
IOZPU
VCC = 0 to 1.5 V,
VCC = 1.5 V to 0,
VO = 0.5 V to 3 V,
VO = 0.5 V to 3 V,
IOZPD
OE = 0
7
SN74GTLPH32945
32-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
www.ti.com
SCES293C–OCTOBER 1999–REVISED JUNE 2005
Live-Insertion Specifications for B Port
over recommended operating free-air temperature range
PARAMETER
Ioff
TEST CONDITIONS
MIN
MAX UNIT
VCC = 0,
BIAS VCC = 0,
BIAS VCC = 0,
BIAS VCC = 0,
VI or VO = 0 to 1.5 V
10
±30
±30
5
µA
µA
µA
mA
µA
V
IOZPU
VCC = 0 to 1.5 V,
VCC = 1.5 V to 0,
VCC = 0 to 3.15 V
VCC = 3.15 V to 3.45 V
VCC = 0,
VO = 0.5 V to 1.5 V, OE = 0
VO = 0.5 V to 1.5 V, OE = 0
IOZPD
ICC (BIAS VCC
)
BIAS VCC = 3.15 V to 3.45 V,
VO (B port) = 0 to 1.5 V
10
VO
IO
BIAS VCC = 3.3 V,
IO = 0
0.95
–1
1.05
VCC = 0,
BIAS VCC = 3.15 V to 3.45 V,
VO (B port) = 0.6 V
µA
Switching Characteristics
over recommended ranges of supply voltage and operating free-air temperature,
VTT = 1.5 V and VREF = 1 V for GTLP (see Figure 1)
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN TYP(1)
MAX
UNIT
tPLH
tPHL
ten
2.1
2.1
2
6.3
6.3
6.9
6.9
A
B
B
ns
OE
ns
tdis
tr
2
Rise time, B outputs (20% to 80%)
Fall time, B outputs (80% to 20%)
2.5
2.1
ns
ns
tf
tPLH
tPHL
ten
2.1
2.1
0.3
0.3
5.3
5.3
5.7
5.7
B
A
A
ns
ns
OE
tdis
(1) All typical values are at VCC = 3.3 V, TA = 25°C.
8
SN74GTLPH32945
32-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
www.ti.com
SCES293C–OCTOBER 1999–REVISED JUNE 2005
PARAMETER MEASUREMENT INFORMATION
1.5 V
25 Ω
6 V
Open
GND
S1
500 Ω
From Output
Under Test
TEST
/t
S1
Open
6 V
From Output
Under Test
Test
Point
t
t
t
PLH PHL
C = 50 pF
L
500 Ω
/t
PLZ PZL
(see Note A)
C = 30 pF
L
(see Note A)
/t
GND
PHZ PZH
LOAD CIRCUIT FOR A OUTPUTS
LOAD CIRCUIT FOR B OUTPUTS
3 V
0 V
1.5 V
1.5 V
Input
t
t
PHL
PLH
V
V
OH
1 V
1 V
Output
3 V
OL
Output
Control
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
(A port to B port)
0 V
3 V
t
t
PLZ
PZL
Output
Waveform 1
S1 at 6 V
1.5 V
0 V
1 V
1 V
1.5 V
1.5 V
Input
V
OL
+ 0.3 V
(see Note B)
V
OL
OH
t
t
PHL
t
t
PLH
PZH
PHZ
Output
Waveform 2
S1 at GND
V
V
OH
V
OH
− 0.3 V
1.5 V
1.5 V
Output
V
OL
≈0 V
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
(B port to A port)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
(A port)
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≈ 10 MHz, Z = 50 Ω, t ≈ 2 ns, t ≈ 2 ns.
O
r
f
D. The outputs are measured one at a time, with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
9
SN74GTLPH32945
32-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
www.ti.com
SCES293C–OCTOBER 1999–REVISED JUNE 2005
Distributed-Load Backplane Switching Characteristics
The preceding switching characteristics table shows the switching characteristics of the device into a lumped
load (Figure 1). However, the designer's backplane application probably is a distributed load. The physical
representation is shown in Figure 2. This backplane, or distributed load, can be approximated closely to a
resistor inductance capacitance (RLC) circuit, as shown in Figure 3. This device has been designed for optimum
performance in this RLC circuit. The following switching characteristics table shows the switching characteristics
of the device into the RLC load, to help the designer better understand the performance of the GTLP device in
this typical backplane. See www.ti.com/sc/gtlp for more information.
1.5 V
1.5 V
Z
O
= 70 Ω
0.25”
2”
2”
0.25
”
Conn.
Conn.
Conn.
Conn.
1”
1”
1”
1”
Rcvr
Rcvr
Rcvr
Drvr
Slot 1
Slot 2
Slot 9
Slot 10
Figure 2. Medium-Drive Test Backplane
1.5 V
19 Ω
L = 19 nH
L
From Output
Under Test
Test
Point
C = 9 pF
L
Figure 3. Medium-Drive RLC Network
10
SN74GTLPH32945
32-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
www.ti.com
SCES293C–OCTOBER 1999–REVISED JUNE 2005
Switching Characteristics
over recommended ranges of supply voltage and operating free-air temperature,
VTT = 1.5 V and VREF = 1 V for GTLP (see Figure 3)
FROM
TO
(OUTPUT)
PARAMETER
(INPUT)
TYP(1) UNIT
tPLH
4.3
ns
A
B
B
tPHL
4.3
ten
OE
tdis
5
ns
4.4
tr
tf
Rise time, B outputs (20% to 80%)
Fall time, B outputs (80% to 20%)
1
2
ns
ns
(1) All typical values are at VCC = 3.3 V, TA = 25°C. All values are derived from TI-SPICE models.
11
PACKAGE OPTION ADDENDUM
www.ti.com
11-Sep-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SN74GTLPH32945KR
NRND
LFBGA
LFBGA
GKE
96
96
1000
TBD
SNPB
Level-3-220C-168 HR
Level-3-260C-168 HR
SN74GTLPH32945ZKER
ACTIVE
ZKE
1000 Green (RoHS &
no Sb/Br)
SNAGCU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,
improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
Customers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s
standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this
warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily
performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should
provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask
work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services
are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such
products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under
the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is
accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an
unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Information of third parties
may be subject to additional restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service
voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business
practice. TI is not responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would
reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement
specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications
of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related
requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any
applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its
representatives against any damages arising out of the use of TI products in such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is
solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in
connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products
are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any
non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
Data Converters
DSP
Applications
Audio
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/audio
Automotive
Broadband
Digital Control
Military
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
interface.ti.com
logic.ti.com
Logic
Power Mgmt
Microcontrollers
RFID
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lpw
Telephony
Low Power
Wireless
Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2007, Texas Instruments Incorporated
相关型号：
©2020 ICPDF网 联系我们和版权申明