SN74HC05DBRG4 [TI]
HEX INVERTERS WITH OPEN-DRAIN OUTPUTS; 具有漏极开路输出六路反向器
| 型号： | SN74HC05DBRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | HEX INVERTERS WITH OPEN-DRAIN OUTPUTS |
| 文件： | 总16页 (文件大小：617K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54HC05, SN74HC05
HEX INVERTERS
WITH OPEN-DRAIN OUTPUTS
SCLS080D – MARCH 1984 – REVISED AUGUST 2003
Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
Typical t = 8 ns
pd
4-mA Output Drive at 5 V
Low Power Consumption, 20-µA Max I
Low Input Current of 1 µA Max
CC
SN54HC05 . . . FK PACKAGE
(TOP VIEW)
SN54HC05 . . . J OR W PACKAGE
SN74HC05 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
1A
1Y
V
CC
13 6A
1
2
3
4
5
6
7
14
3
2
1
20 19
18
6Y
NC
5A
2A
NC
2Y
4
5
6
7
8
12
11
10
9
2A
6Y
5A
5Y
4A
4Y
17
16
2Y
3A
15 NC
14
9 10 11 12 13
NC
3A
3Y
5Y
8
GND
NC – No internal connection
description/ordering information
The ’HC05 devices contain six independent inverters. They perform the Boolean function
Y = A in positive logic. The open-drain outputs require pullup resistors to perform correctly. They may be
connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP – N
SOIC – D
Tube of 25
Tube of 50
Reel of 2500
Reel of 250
Reel of 2000
Reel of 2000
Reel of 2000
Reel of 250
Tube of 25
Tube of 150
Tube of 55
SN74HC05N
SN74HC05N
SN74HC05D
SN74HC05DR
SN74HC05DT
SN74HC05NSR
SN74HC05DBR
SN74HC05PWR
SN74HC05PWT
SNJ54HC05J
SNJ54HC05W
SNJ54HC05FK
HC05
–40°C to 85°C
SOP – NS
HC05
HC05
SSOP – DB
TSSOP – PW
HC05
CDIP – J
CFP – W
LCCC – FK
SNJ54HC05J
SNJ54HC05W
SNJ54HC05FK
–55°C to 125°C
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HC05, SN74HC05
HEX INVERTERS
WITH OPEN-DRAIN OUTPUTS
SCLS080D – MARCH 1984 – REVISED AUGUST 2003
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H
L
L
H
logic diagram (positive logic)
A
Y
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
IK
I
CC
Output clamp current, I
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
JA
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54HC05
SN74HC05
MIN NOM
UNIT
MIN NOM
MAX
MAX
V
V
Supply voltage
2
1.5
5
6
2
1.5
5
6
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
High-level input voltage
= 4.5 V
= 6 V
3.15
4.2
3.15
4.2
V
V
IH
= 2 V
0.5
1.35
1.8
0.5
1.35
1.8
V
IL
Low-level input voltage
= 4.5 V
= 6 V
V
V
Input voltage
0
0
V
V
0
0
V
V
V
V
I
CC
CC
Output voltage
O
CC
CC
V
CC
V
CC
V
CC
= 2 V
1000
500
400
125
1000
500
400
85
∆t/∆v
Input transition rise/fall time
= 4.5 V
= 6 V
ns
T
A
Operating free-air temperature
–55
–40
°C
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HC05, SN74HC05
HEX INVERTERS
WITH OPEN-DRAIN OUTPUTS
SCLS080D – MARCH 1984 – REVISED AUGUST 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
TYP
SN54HC05
MIN MAX
SN74HC05
MIN MAX
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
MAX
0.5
0.1
0.1
0.1
0.26
0.26
100
2
I
V = V or V
IH
,
IL
V
O
= V
CC
6 V
2 V
0.01
10
0.1
0.1
0.1
0.4
0.4
1000
40
5
0.1
µA
OH
I
0.002
0.001
0.001
0.17
0.15
0.1
I
= 20 µA
4.5 V
6 V
0.1
OL
V
OL
V = V or V
0.1
V
I
IH
IL
I
I
= 4 mA
4.5 V
6 V
0.33
0.33
1000
20
OL
= 5.2 mA
OL
I
I
V = V
I
or 0
6 V
nA
µA
pF
I
CC
CC
V = V
I
or 0,
I
O
= 0
6 V
CC
C
2 V to 6 V
3
10
10
10
i
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
60
13
10
45
9
SN54HC05
MIN MAX
SN74HC05
MIN MAX
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
CC
MIN
MAX
115
23
2 V
4.5 V
6 V
175
35
145
29
t
t
t
A
A
Y
Y
Y
ns
PLH
PHL
f
20
30
25
2 V
85
130
26
105
21
4.5 V
6 V
17
ns
ns
8
14
22
18
2 V
38
8
75
110
22
95
4.5 V
6 V
15
19
6
13
19
16
operating characteristics, T = 25°C
A
PARAMETER
TEST CONDITIONS
TYP
UNIT
C
Power dissipation capacitance per inverter
No load
20
pF
pd
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HC05, SN74HC05
HEX INVERTERS
WITH OPEN-DRAIN OUTPUTS
SCLS080D – MARCH 1984 – REVISED AUGUST 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
R
= 1 kΩ
L
V
CC
Test
Point
From Output
Under Test
Input
50%
50%
0 V
C
= 50 pF
L
t
t
PLH
PHL
90%
(see Note A)
V
V
OH
In-Phase
Output
50%
10%
10%
LOAD CIRCUIT
OL
t
f
t
PHL
90%
V
t
CC
PLH
10%
90%
t
90%
V
V
OH
Input
50%
10%
50%
10%
Out-of-Phase
Output
50%
10%
0 V
OL
t
r
f
t
f
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
C includes probe and test-fixture capacitance.
L
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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Copyright © 2007, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
15-Oct-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
CDIP
SOIC
Drawing
5962-88718012A
5962-8871801CA
SN54HC05J
ACTIVE
ACTIVE
ACTIVE
ACTIVE
FK
J
20
14
14
14
1
1
1
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42
A42
N / A for Pkg Type
N / A for Pkg Type
J
SN74HC05D
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74HC05DBR
SN74HC05DBRE4
SN74HC05DBRG4
SN74HC05DE4
SN74HC05DG4
SN74HC05DR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
SSOP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
DB
DB
DB
D
14
14
14
14
14
14
14
14
14
14
14
14
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74HC05DRE4
SN74HC05DRG4
SN74HC05DT
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74HC05DTE4
SN74HC05DTG4
SN74HC05N
D
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
N
25
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74HC05N3
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
14
14
TBD
Call TI
Call TI
SN74HC05NE4
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74HC05NSR
SN74HC05NSRE4
SN74HC05NSRG4
SN74HC05PWR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
NS
NS
14
14
14
14
14
14
14
14
14
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
NS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
PW
PW
PW
PW
PW
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74HC05PWRE4
SN74HC05PWRG4
SN74HC05PWT
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74HC05PWTE4
SN74HC05PWTG4
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
15-Oct-2009
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
no Sb/Br)
SNJ54HC05FK
SNJ54HC05J
ACTIVE
ACTIVE
LCCC
CDIP
FK
J
20
14
1
1
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
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information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
SN74HC05DBR
SN74HC05DR
SN74HC05DR
SN74HC05NSR
SN74HC05PWR
SSOP
SOIC
SOIC
SO
DB
D
14
14
14
14
14
2000
2500
2500
2000
2000
330.0
330.0
330.0
330.0
330.0
16.4
16.4
16.4
16.4
12.4
8.2
6.5
6.5
8.2
7.0
6.6
9.0
2.5
2.1
2.1
2.5
1.6
12.0
8.0
16.0
16.0
16.0
16.0
12.0
Q1
Q1
Q1
Q1
Q1
D
9.0
8.0
NS
PW
10.5
5.6
12.0
8.0
TSSOP
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74HC05DBR
SN74HC05DR
SN74HC05DR
SN74HC05NSR
SN74HC05PWR
SSOP
SOIC
SOIC
SO
DB
D
14
14
14
14
14
2000
2500
2500
2000
2000
346.0
333.2
346.0
346.0
346.0
346.0
345.9
346.0
346.0
346.0
33.0
28.6
33.0
33.0
29.0
D
NS
PW
TSSOP
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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