SN74HC138QPWRQ1 [TI]

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS;
SN74HC138QPWRQ1
型号: SN74HC138QPWRQ1
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

驱动 输入元件 光电二极管 逻辑集成电路
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SN74HC138-Q1  
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS  
SCLS533A − AUGUST 2003 − REVISED SEPTEMBER 2008  
D OR PW PACKAGE  
(TOP VIEW)  
D
D
Qualified for Automotive Applications  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
A
B
VCC  
Y0  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
D
Targeted Specifically for High-Speed  
Memory Decoders and Data-Transmission  
Systems  
C
Y1  
G2A  
G2B  
G1  
Y7  
GND  
Y2  
12 Y3  
D
D
D
D
D
D
D
2-V to 6-V V Operation  
11  
10  
9
CC  
Y4  
Y5  
Y6  
Outputs Can Drive Up To 10 LSTTL Loads  
Low Power Consumption, 80-µA Max I  
CC  
Typical t = 15 ns  
pd  
4-mA Output Drive at 5 V  
Low Input Current of 1 µA Max  
Incorporate Three Enable Inputs to Simplify  
Cascading and/or Data Reception  
description/ordering information  
The SN74HC138 is designed to be used in high-performance memory-decoding or data-routing applications  
requiring very short propagation delay times. In high-performance memory systems, this decoder can be used  
to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable  
circuit, the delay times of this decoder and the enable time of the memory usually are less than the typical access  
time of the memory. This means that the effective system delay introduced by the decoders is negligible.  
The conditions at the binary-select inputs at the three enable inputs select one of eight output lines. Two  
active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.  
A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one  
inverter. An enable input can be used as a data input for demultiplexing applications.  
{
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
SOIC − D  
Tape and reel  
Tape and reel  
SN74HC138QDRQ1  
SN74HC138QPWRQ1  
HC138Q1  
HC138Q1  
−40°C to 125°C  
TSSOP − PW  
For the most current package and ordering information, see the Package Option Addendum at the end of this  
document, or see the TI web site at www.ti.com.  
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2008, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74HC138-Q1  
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS  
SCLS533A − AUGUST 2003 − REVISED SEPTEMBER 2008  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
ENABLE  
SELECT  
G1  
X
G2A  
H
X
X
L
G2B  
X
H
X
L
C
X
X
X
L
B
X
X
X
L
A
X
X
X
L
Y0  
H
H
H
L
Y1  
H
H
H
H
L
Y2  
H
H
H
H
H
L
Y3  
H
H
H
H
H
H
L
Y4  
H
H
H
H
H
H
H
L
Y5  
H
H
H
H
H
H
H
H
L
Y6  
H
H
H
H
H
H
H
H
H
L
Y7  
H
H
H
H
H
H
H
H
H
H
L
X
L
H
H
H
H
H
H
H
H
L
L
L
L
H
L
H
H
H
H
H
H
H
L
L
L
H
H
L
H
H
H
H
H
H
L
L
L
H
L
H
H
H
H
H
L
L
H
H
H
H
H
H
H
H
L
L
L
H
L
H
H
H
L
L
H
H
H
H
L
L
H
H
logic diagram (positive logic)  
15  
14  
13  
12  
11  
10  
9
Y0  
Y1  
Y2  
Y3  
1
A
2
B
3
C
Y4  
Y5  
6
G1  
Y6  
Y7  
4
G2A  
7
5
G2B  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74HC138-Q1  
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS  
SCLS533A − AUGUST 2003 − REVISED SEPTEMBER 2008  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
CC  
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
IK  
I
I
CC  
Output clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
OK  
O
O
CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA  
O
O
CC  
Continuous current through V or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
CC  
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W  
JA  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
Storage temperature range, T  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
recommended operating conditions (see Note 3)  
MIN NOM  
MAX  
UNIT  
V
Supply voltage  
2
1.5  
5
6
V
CC  
IH  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
= 4.5 V  
= 6 V  
3.15  
4.2  
V
High-level input voltage  
V
V
= 2 V  
0.5  
1.35  
1.8  
= 4.5 V  
= 6 V  
V
IL  
Low-level input voltage  
V
V
Input voltage  
0
0
V
CC  
V
CC  
V
V
I
Output voltage  
O
V
CC  
V
CC  
V
CC  
= 2 V  
1000  
500  
400  
125  
= 4.5 V  
= 6 V  
t/v  
Input transition rise/fall time  
ns  
T
A
Operating free-air temperature  
−40  
°C  
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74HC138-Q1  
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS  
SCLS533A − AUGUST 2003 − REVISED SEPTEMBER 2008  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
A
= 25°C  
PARAMETER  
TEST CONDITIONS  
V
CC  
MIN  
MAX  
UNIT  
MIN  
TYP  
MAX  
2 V  
4.5 V  
6 V  
1.9 1.998  
4.4 4.499  
5.9 5.999  
1.9  
4.4  
5.9  
3.7  
5.2  
I
= −20 µA  
OH  
V
V
V = V or V  
V
OH  
I
IH  
IL  
I
I
= −4 mA  
4.5 V  
6 V  
3.98  
5.48  
4.3  
5.8  
OH  
= −5.2 mA  
OH  
2 V  
0.002  
0.001  
0.001  
0.17  
0.15  
0.1  
0.1  
0.1  
0.1  
0.26  
0.26  
100  
8
0.1  
0.1  
4.5 V  
6 V  
I
OL  
= 20 µA  
0.1  
V = V or V  
V
OL  
I
IH  
IL  
I
I
= 4 mA  
4.5 V  
6 V  
0.4  
OL  
= 5.2 mA  
0.4  
OL  
I
I
V = V or 0  
6 V  
1000  
160  
10  
nA  
µA  
pF  
I
I
CC  
V = V or 0,  
I
O
= 0  
6 V  
CC  
I
CC  
C
2 V to 6 V  
3
10  
i
switching characteristics over recommended operating free-air temperature range, CL = 50 pF  
(unless otherwise noted) (see Figure 1)  
T
A
= 25°C  
TYP  
67  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
V
MIN  
MAX  
UNIT  
CC  
MIN  
MAX  
180  
36  
2 V  
4.5 V  
6 V  
270  
54  
18  
A, B, or C  
Enable  
Any Y  
Any Y  
Any  
15  
31  
46  
t
pd  
ns  
2 V  
66  
155  
31  
235  
47  
4.5 V  
6 V  
18  
15  
26  
40  
2 V  
38  
75  
110  
22  
t
t
4.5 V  
6 V  
8
15  
ns  
6
13  
19  
operating characteristics, TA = 25°C  
PARAMETER  
TEST CONDITIONS  
TYP  
UNIT  
C
Power dissipation capacitance  
No load  
85  
pF  
pd  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74HC138-Q1  
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS  
SCLS533A − AUGUST 2003 − REVISED SEPTEMBER 2008  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
From Output  
Under Test  
Test  
Point  
Input  
50%  
50%  
0 V  
C = 50 pF  
(see Note A)  
L
t
t
PHL  
PLH  
V
V
OH  
In-Phase  
Output  
90%  
t
90%  
50%  
10%  
50%  
10%  
LOAD CIRCUIT  
OL  
t
r
f
f
t
t
PLH  
PHL  
V
CC  
V
V
OH  
90%  
t
90%  
Input  
50%  
10%  
50%  
10%  
90%  
90%  
t
Out-of-Phase  
Output  
50%  
10%  
50%  
10%  
0 V  
OL  
t
r
f
t
r
VOLTAGE WAVEFORM  
INPUT RISE AND FALL TIMES  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES  
NOTES: A. C includes probe and test-fixture capacitance.  
L
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following  
characteristics: PRR 1 MHz, Z = 50 , t = 6 ns, t = 6 ns.  
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.  
D. and t are the same as t  
t
.
pd  
PLH  
PHL  
Figure 1. Load Circuit and Voltage Waveforms  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
24-Jan-2013  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package Qty  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Top-Side Markings  
Samples  
Drawing  
(1)  
(2)  
(3)  
(4)  
SN74HC138QDRG4Q1  
ACTIVE  
SOIC  
D
16  
2500  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
Level-1-260C-UNLIM  
-40 to 125 HC138Q1  
SN74HC138QDRQ1  
OBSOLETE  
ACTIVE  
SOIC  
D
16  
16  
TBD  
Call TI  
Call TI  
-40 to 125 HC138Q1  
-40 to 125 HC138Q1  
SN74HC138QPWRG4Q1  
TSSOP  
PW  
2000  
2000  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
Level-1-260C-UNLIM  
SN74HC138QPWRQ1  
ACTIVE  
TSSOP  
PW  
16  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
Level-3-260C-168 HR  
-40 to 125 HC138Q1  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) Only one of markings shown within the brackets will appear on the physical device.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
24-Jan-2013  
OTHER QUALIFIED VERSIONS OF SN74HC138-Q1 :  
Catalog: SN74HC138  
Military: SN54HC138  
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
Military - QML certified for Military and Defense Applications  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Mar-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
SN74HC138QPWRG4Q1 TSSOP  
SN74HC138QPWRQ1 TSSOP  
PW  
PW  
16  
16  
2000  
2000  
330.0  
330.0  
12.4  
12.4  
6.9  
6.9  
5.6  
5.6  
1.6  
1.6  
8.0  
8.0  
12.0  
12.0  
Q1  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Mar-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SN74HC138QPWRG4Q1  
SN74HC138QPWRQ1  
TSSOP  
TSSOP  
PW  
PW  
16  
16  
2000  
2000  
367.0  
367.0  
367.0  
367.0  
35.0  
35.0  
Pack Materials-Page 2  
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