SN74HC253DG4 [TI]
HC SERIES, DUAL 4 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16, GREEN, PLASTIC, MS-012AC, SOIC-16;
| 型号： | SN74HC253DG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | HC SERIES, DUAL 4 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16, GREEN, PLASTIC, MS-012AC, SOIC-16 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总19页 (文件大小：1010K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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SCLS133E − DECEMBER 1982 − REVISED SEPTEMBER 2003
SN54HC253 . . . J OR W PACKAGE
SN74HC253 . . . D, DB, N, OR NS PACKAGE
(TOP VIEW)
D
D
D
D
D
D
D
D
3-State Version of ’HC153
Wide Operating Voltage Range of 2 V to 6 V
High-Current Inverting Outputs Drive Up To
15 LSTTL Loads
1OE
B
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
2OE
Low Power Consumption, 80-µA Max I
Typical t = 9 ns
pd
6-mA Output Drive at 5 V
CC
1C3
1C2
1C1
1C0
1Y
A
2C3
2C2
2C1
2C0
2Y
Low Input Current of 1 µA Max
Permit Multiplexing From n Lines to One
Line
GND
D
Perform Parallel-to-Serial Conversion
SN54HC253 . . . FK PACKAGE
(TOP VIEW)
description/ordering information
Each of these data selectors/multiplexers
contains inverters and drivers to supply full binary
decoding data selection to the AND-OR gates.
Separate output-control inputs are provided for
each of the two 4-line sections.
3
2
1
20 19
18
1C3
1C2
NC
A
4
5
6
7
8
2C3
17
16 NC
The 3-state outputs can interface with and drive
data lines of bus-organized systems. With all but
one of the common outputs disabled (in the
high-impedance state), the low impedance of the
single enabled output drives the bus line to a high
or low logic level. Each output has its own
output-enable (OE) input. The outputs are
disabled when their respective OE is high.
15
14
1C1
1C0
2C2
2C1
9 10 11 12 13
NC − No internal connection
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
SOIC − D
Tube of 25
Tube of 40
Reel of 2500
Reel of 250
Reel of 2000
Reel of 2000
Tube of 25
Tube of 150
Tube of 55
SN74HC253N
SN74HC253N
SN74HC253D
SN74HC253DR
SN74HC253DT
SN74HC253NSR
SN74HC253DBR
SNJ54HC253J
SNJ54HC253W
SNJ54HC253FK
HC253
−40°C to 85°C
SOP − NS
SSOP − DB
CDIP − J
HC253
HC253
SNJ54HC253J
SNJ54HC253W
SNJ54HC253FK
CFP − W
−55°C to 125°C
LCCC − FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
ꢒ ꢛ ꢦ ꢞ ꢝꢩ ꢤꢣ ꢡꢢ ꢣꢝ ꢟꢦ ꢨꢚ ꢠꢛ ꢡ ꢡꢝ ꢖꢏ ꢍꢎ ꢗꢔ ꢰ ꢎꢇꢱꢂ ꢇꢂꢈ ꢠꢨꢨ ꢦꢠ ꢞ ꢠ ꢟꢥ ꢡꢥꢞ ꢢ ꢠ ꢞ ꢥ ꢡꢥ ꢢꢡꢥ ꢩ
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢂ ꢇꢈ ꢀꢁ ꢉ ꢃ ꢄꢅꢆ ꢂ ꢇ
ꢊ ꢋꢌꢍ ꢃ ꢎꢍ ꢏ ꢁꢐ ꢑꢒ ꢓ ꢎꢍꢏ ꢁ ꢐ ꢊꢌꢑꢌ ꢀ ꢐꢍ ꢐ ꢅꢑꢒ ꢔꢀꢕ ꢖꢋ ꢍꢑ ꢏꢗ ꢍꢐ ꢘꢐꢔꢀ
ꢙꢏ ꢑ ꢄ ꢇ ꢎꢀꢑꢌꢑ ꢐ ꢒꢋꢑ ꢗ ꢋꢑꢀ
SCLS133E − DECEMBER 1982 − REVISED SEPTEMBER 2003
FUNCTION TABLE
INPUTS
OUTPUT
Y
†
SELECT
DATA
OE
B
X
L
A
X
L
C0
X
L
C1
X
X
X
L
C2
X
X
X
X
X
L
C3
X
X
X
X
X
X
X
L
H
L
L
L
L
L
L
L
L
Z
L
L
L
H
X
X
X
X
X
X
H
L
L
H
H
L
L
H
X
X
X
X
H
L
H
H
H
H
L
H
X
X
H
L
H
H
H
H
†
Select inputs A and B are common to both sections.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SCLS133E − DECEMBER 1982 − REVISED SEPTEMBER 2003
logic diagram (positive logic)
14
A
2
B
1
1OE
6
1C0
TG
TG
TG
TG
TG
5
1C1
7
1Y
4
1C2
TG
3
1C3
15
2OE
10
TG
TG
TG
TG
2C0
TG
11
2C1
9
2Y
12
2C2
TG
13
2C3
Pin numbers shown are for the D, DB, J, N, NS, and W packages.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢊ ꢋꢌꢍ ꢃ ꢎꢍ ꢏ ꢁꢐ ꢑꢒ ꢓ ꢎꢍꢏ ꢁ ꢐ ꢊꢌꢑꢌ ꢀ ꢐꢍ ꢐ ꢅꢑꢒ ꢔꢀꢕ ꢖꢋ ꢍꢑ ꢏꢗ ꢍꢐ ꢘꢐꢔꢀ
ꢙꢏ ꢑ ꢄ ꢇ ꢎꢀꢑꢌꢑ ꢐ ꢒꢋꢑ ꢗ ꢋꢑꢀ
SCLS133E − DECEMBER 1982 − REVISED SEPTEMBER 2003
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
IK
I
CC
Output clamp current, I
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
JA
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54HC253
MIN NOM
SN74HC253
MIN NOM
UNIT
MAX
MAX
V
V
Supply voltage
2
1.5
5
6
2
1.5
5
6
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
= 4.5 V
= 6 V
3.15
4.2
3.15
4.2
High-level input voltage
V
V
IH
= 2 V
0.5
1.35
1.8
0.5
1.35
1.8
= 4.5 V
= 6 V
V
IL
Low-level input voltage
V
V
Input voltage
0
0
V
V
0
0
V
V
V
V
I
CC
CC
Output voltage
O
CC
CC
V
CC
V
CC
V
CC
= 2 V
1000
500
400
125
1000
500
400
85
= 4.5 V
= 6 V
∆t/∆v
Input transition rise/fall time
ns
T
A
Operating free-air temperature
−55
−40
°C
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢙ ꢏꢑ ꢄ ꢇ ꢎꢀꢑꢌꢑ ꢐ ꢒ ꢋꢑ ꢗꢋ ꢑ
SCLS133E − DECEMBER 1982 − REVISED SEPTEMBER 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
SN54HC253
SN74HC253
A
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
TYP
MAX
MIN
1.9
4.4
5.9
3.7
5.2
MAX
MIN
1.9
MAX
2 V
4.5 V
6 V
1.9 1.998
4.4 4.499
5.9 5.999
4.4
I
= −20 µA
OH
5.9
V
V = V or V
IH
V
OH
OL
I
IL
IL
I
I
= −6 mA
4.5 V
6 V
3.98
5.48
4.3
5.8
3.84
5.34
OH
= −7.8 mA
OH
2 V
0.002
0.001
0.001
0.17
0.15
0.1
0.1
0.1
0.1
0.26
0.26
100
0.5
8
0.1
0.1
0.1
0.1
4.5 V
6 V
I
= 20 µA
OL
0.1
0.1
V
V = V or V
V
I
IH
I
I
= 6 mA
4.5 V
6 V
0.4
0.33
0.33
1000
5
OL
= 7.8 mA
0.4
OL
I
I
I
V = V
I
or 0
6 V
1000
10
nA
µA
µA
pF
I
CC
V
O
= V
or 0
6 V
0.01
OZ
CC
CC
V = V
I
or 0,
I
O
= 0
6 V
160
10
80
CC
C
2 V to 6 V
3
10
10
i
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
62
19
16
54
16
13
28
11
SN54HC253
SN74HC253
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
CC
MIN
MAX
150
30
MIN
MAX
225
45
MIN
MAX
190
38
2 V
4.5 V
6 V
A or B
Any Y
26
38
32
t
pd
ns
2 V
126
28
210
42
175
35
Data
(Any C)
4.5 V
6 V
Y
Y
Y
Y
23
36
30
2 V
100
20
150
30
125
25
4.5 V
6 V
t
t
t
OE
OE
ns
ns
ns
en
dis
t
9
17
26
21
2 V
21
14
12
28
8
135
30
203
45
170
38
4.5 V
6 V
35
38
31
2 V
60
90
75
4.5 V
6 V
12
18
15
6
10
15
13
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢂ ꢇꢈ ꢀꢁ ꢉ ꢃ ꢄꢅꢆ ꢂ ꢇ
ꢊ ꢋꢌꢍ ꢃ ꢎꢍ ꢏ ꢁꢐ ꢑꢒ ꢓ ꢎꢍꢏ ꢁ ꢐ ꢊꢌꢑꢌ ꢀ ꢐꢍ ꢐ ꢅꢑꢒ ꢔꢀꢕ ꢖꢋ ꢍꢑ ꢏꢗ ꢍꢐ ꢘꢐꢔꢀ
ꢙꢏ ꢑ ꢄ ꢇ ꢎꢀꢑꢌꢑ ꢐ ꢒꢋꢑ ꢗ ꢋꢑꢀ
SCLS133E − DECEMBER 1982 − REVISED SEPTEMBER 2003
switching characteristics over recommended operating free-air temperature range, C = 150 pF
L
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
76
SN54HC253
SN74HC253
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
CC
MIN
MAX
235
47
MIN
MAX
355
71
MIN
MAX
295
59
2 V
4.5 V
6 V
23
A or B
Any Y
20
41
60
51
t
pd
ns
2 V
68
220
44
335
67
275
55
Data
(Any C)
4.5 V
6 V
20
Y
Y
Y
17
38
57
51
2 V
44
185
37
280
56
230
46
4.5 V
6 V
16
t
t
OE
ns
ns
en
14
32
48
40
2 V
45
210
42
315
63
265
53
4.5 V
6 V
17
t
13
36
53
45
operating characteristics, T = 25°C
A
PARAMETER
TEST CONDITIONS
TYP
UNIT
C
Power dissipation capacitance per multiplexer
No load
45
pF
pd
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢄ
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ꢂ
ꢇ
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ꢙ ꢏꢑ ꢄ ꢇ ꢎꢀꢑꢌꢑ ꢐ ꢒ ꢋꢑ ꢗꢋ ꢑ
SCLS133E − DECEMBER 1982 − REVISED SEPTEMBER 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
PARAMETER
R
C
L
S1
S2
L
50 pF
or
150 pF
t
S1
S2
Open
Closed
Closed
Open
PZH
Test
Point
t
t
1 kΩ
1 kΩ
en
R
t
L
PZL
From Output
Under Test
t
t
Open
Closed
Open
PHZ
PLZ
50 pF
C
dis
L
Closed
(see Note A)
50 pF
or
150 pF
t
or t
−−
Open
Open
pd
t
LOAD CIRCUIT
V
CC
Input
50%
50%
0 V
t
t
PLH
PHL
90%
V
V
OH
In-Phase
Output
90%
50%
10%
50%
10%
OL
t
Output
Control
(Low-Level
Enabling)
t
r
f
f
V
CC
t
t
PLH
PHL
90%
50%
50%
V
V
OH
90%
t
0 V
Out-of-Phase
Output
50%
10%
50%
10%
t
t
PLZ
PZL
OL
t
≈V
CC
≈V
CC
r
Output
Waveform 1
(See Note B)
50%
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
10%
V
OL
OH
t
t
PZH
PHZ
V
CC
V
Output
Waveform 2
(See Note B)
90%
t
90%
90%
Input
50%
10%
50%
10%
50%
0 V
≈0 V
t
r
f
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
NOTES: A.
C includes probe and test-fixture capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
.
dis
PLZ
PZL
PLH
PHZ
PZH
PHL
are the same as t
.
en
are the same as t .
pd
Figure 1. Load Circuit and Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
5962-88682012A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
5962-
88682012A
SNJ54HC
253FK
5962-8868201EA
ACTIVE
CDIP
J
16
1
TBD
TBD
A42
N / A for Pkg Type
-55 to 125
5962-8868201EA
SNJ54HC253J
SN54HC253J
SN74HC253D
ACTIVE
ACTIVE
CDIP
SOIC
J
16
16
1
A42
N / A for Pkg Type
-55 to 125
-40 to 85
SN54HC253J
D
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
HC253
SN74HC253DBR
SN74HC253DBRE4
SN74HC253DBRG4
SN74HC253DE4
SN74HC253DG4
SN74HC253DR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
SSOP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
DB
DB
DB
D
16
16
16
16
16
16
16
16
16
16
16
16
2000
2000
2000
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
HC253
HC253
HC253
HC253
HC253
HC253
HC253
HC253
HC253
HC253
HC253
SN74HC253N
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
D
40
Green (RoHS
& no Sb/Br)
D
2500
2500
2500
250
250
250
25
Green (RoHS
& no Sb/Br)
SN74HC253DRE4
SN74HC253DRG4
SN74HC253DT
D
Green (RoHS
& no Sb/Br)
D
Green (RoHS
& no Sb/Br)
D
Green (RoHS
& no Sb/Br)
SN74HC253DTE4
SN74HC253DTG4
SN74HC253N
D
Green (RoHS
& no Sb/Br)
D
Green (RoHS
& no Sb/Br)
N
Pb-Free
(RoHS)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
SN74HC253NE4
SN74HC253NSR
SN74HC253NSRE4
SN74HC253NSRG4
SNJ54HC253FK
ACTIVE
PDIP
SO
N
16
16
16
16
20
25
Pb-Free
(RoHS)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
POST-PLATE
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
SN74HC253N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
NS
NS
NS
FK
2000
2000
2000
1
Green (RoHS
& no Sb/Br)
-40 to 85
HC253
HC253
HC253
SO
Green (RoHS
& no Sb/Br)
-40 to 85
SO
Green (RoHS
& no Sb/Br)
-40 to 85
LCCC
TBD
-55 to 125
5962-
88682012A
SNJ54HC
253FK
SNJ54HC253J
ACTIVE
CDIP
J
16
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-8868201EA
SNJ54HC253J
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54HC253, SN74HC253 :
Catalog: SN74HC253
•
Automotive: SN74HC253-Q1, SN74HC253-Q1
•
Enhanced Product: SN74HC253-EP, SN74HC253-EP
•
Military: SN54HC253
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Enhanced Product - Supports Defense, Aerospace and Medical Applications
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74HC253DBR
SN74HC253DR
SN74HC253NSR
SSOP
SOIC
SO
DB
D
16
16
16
2000
2500
2000
330.0
330.0
330.0
16.4
16.4
16.4
8.2
6.5
8.2
6.6
2.5
2.1
2.5
12.0
8.0
16.0
16.0
16.0
Q1
Q1
Q1
10.3
10.5
NS
12.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74HC253DBR
SN74HC253DR
SN74HC253NSR
SSOP
SOIC
SO
DB
D
16
16
16
2000
2500
2000
367.0
333.2
367.0
367.0
345.9
367.0
38.0
28.6
38.0
NS
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
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concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
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Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
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non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
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Applications
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Copyright © 2013, Texas Instruments Incorporated
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