SN74HC4040DWR [TI]

12 BIT ASYNCHRONOUS BINARY COUNTERS; 12位异步二进制计数器
SN74HC4040DWR
型号: SN74HC4040DWR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

12 BIT ASYNCHRONOUS BINARY COUNTERS
12位异步二进制计数器

计数器 触发器 逻辑集成电路 光电二极管
文件: 总17页 (文件大小:605K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢀꢁꢂ ꢃ ꢄꢅ ꢃ ꢆꢃ ꢆ ꢇ ꢀꢁ ꢈꢃ ꢄꢅ ꢃꢆ ꢃꢆ  
ꢉ ꢊ ꢋꢌꢍ ꢎ ꢏꢀ ꢐꢁꢅꢄꢑ ꢒꢁ ꢒꢓ ꢀ ꢌꢍ ꢁꢏꢑꢐ ꢅꢒ ꢓ ꢁꢎ ꢔꢑ ꢀ  
SCLS160D − DECEMBER 1982 − REVISED SEPTEMBER 2003  
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
Outputs Can Drive Up To 10 LSTTL Loads  
D
D
D
Typical t = 12 ns  
pd  
4-mA Output Drive at 5 V  
Low Power Consumption, 80-µA Max I  
Low Input Current of 1 µA Max  
CC  
SN54HC4040 . . . FK PACKAGE  
(TOP VIEW)  
SN54HC4040 . . . J OR W PACKAGE  
SN74HC4040 . . . D, DB, N, NS, OR PW PACKAGE  
(TOP VIEW)  
Q
Q
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
L
3
2
1
20 19  
18  
Q
Q
Q
Q
F
E
K
J
H
I
Q
Q
Q
Q
4
5
6
7
8
J
E
Q
Q
17  
16  
15  
14  
H
G
G
NC  
NC  
Q
D
C
Q
I
CLR  
Q
D
Q
CLR  
CLK  
Q
C
Q
9 10 11 12 13  
B
GND  
Q
A
NC − No internal connection  
description/ordering information  
The ’HC4040 devices are 12-stage asynchronous binary counters, with the outputs of all stages available  
externally. A high level at the clear (CLR) input asynchronously clears the counter and resets all outputs low.  
The count is advanced on a high-to-low transition at the clock (CLK) input. Applications include time-delay  
circuits, counter controls, and frequency-dividing circuits.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
PDIP − N  
PACKAGE  
Tube of 25  
Tube of 40  
SN74HC4040N  
SN74HC4040N  
SN74HC4040D  
Reel of 2500  
Reel of 250  
Reel of 2000  
Reel of 2000  
Tube of 90  
SN74HC4040DR  
SN74HC4040DT  
SN74HC4040NSR  
SN74HC4040DBR  
SN74HC4040PW  
SN74HC4040PWR  
SN74HC4040PWT  
SNJ54HC4040J  
SNJ54HC4040W  
SNJ54HC4040FK  
SOIC − D  
HC4040  
SOP − NS  
HC4040  
HC4040  
−40°C to 85°C  
SSOP − DB  
Reel of 2000  
Reel of 250  
Tube of 25  
TSSOP − PW  
HC4040  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54HC4040J  
SNJ54HC4040W  
SNJ54HC4040FK  
Tube of 150  
Tube of 55  
−55°C to 125°C  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢒ ꢘ ꢣ ꢛ ꢚꢦ ꢡꢠ ꢞꢟ ꢠꢚ ꢜꢣ ꢥꢗ ꢝꢘ ꢞ ꢞꢚ ꢭꢍ ꢮꢋ ꢕꢑ ꢯ ꢋꢰꢱꢂ ꢰꢂꢇ ꢝꢥꢥ ꢣꢝ ꢛ ꢝ ꢜꢢ ꢞꢢꢛ ꢟ ꢝ ꢛ ꢢ ꢞꢢ ꢟꢞꢢ ꢦ  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
ꢟꢗ  
ꢡ ꢘꢥ ꢢꢟꢟ ꢚ ꢞꢨꢢ ꢛ ꢪꢗ ꢟꢢ ꢘ ꢚꢞꢢ ꢦꢧ ꢒ ꢘ ꢝꢥ ꢥ ꢚ ꢞꢨꢢ ꢛ ꢣꢛ ꢚ ꢦꢡꢠ ꢞꢟ ꢇ ꢣꢛ ꢚ ꢦꢡꢠ ꢞꢗꢚ ꢘ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢃꢆ ꢃꢆ ꢇ ꢀ ꢁꢈ ꢃ ꢄꢅꢃ ꢆ ꢃ ꢆ  
ꢉꢊ ꢋꢌꢍ ꢎ ꢏ ꢀꢐꢁ ꢅ ꢄꢑ ꢒꢁ ꢒꢓꢀ ꢌꢍ ꢁ ꢏꢑꢐ ꢅꢒ ꢓꢁꢎ ꢔꢑ ꢀ  
SCLS160D − DECEMBER 1982 − REVISED SEPTEMBER 2003  
FUNCTION TABLE  
(each buffer)  
INPUTS  
FUNCTION  
CLK  
CLR  
L
X
No change  
Advance to next stage  
All outputs L  
L
H
logic diagram (positive logic)  
11  
CLR  
R
R
T
R
R
R
10  
CLK  
T
T
T
T
9
7
6
5
3
Q
Q
Q
Q
Q
E
A
B
C
D
R
T
R
R
R
R
R
R
T
T
T
T
T
T
2
4
13  
12  
14  
15  
1
Q
Q
Q
Q
Q
Q
Q
L
F
G
H
I
J
K
Pin numbers shown are for the D, DB, J, N, NS, PW, and W packages.  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
CC  
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
IK  
I
CC  
Output clamp current, I  
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA  
Continuous current through V  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W  
JA  
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W  
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W  
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁꢂ ꢃ ꢄꢅ ꢃ ꢆꢃ ꢆ ꢇ ꢀꢁꢈ ꢃꢄ ꢅꢃ ꢆꢃ ꢆ  
ꢉ ꢊ ꢋꢌꢍ ꢎ ꢏꢀ ꢐꢁꢅꢄꢑ ꢒꢁ ꢒꢓ ꢀ ꢌꢍ ꢁꢏꢑꢐ ꢅꢒ ꢓ ꢁꢎ ꢔꢑ ꢀ  
SCLS160D − DECEMBER 1982 − REVISED SEPTEMBER 2003  
recommended operating conditions (see Note 3)  
SN54HC4040  
MIN NOM MAX  
SN74HC4040  
MIN NOM MAX  
UNIT  
V
V
Supply voltage  
2
5
6
2
1.5  
5
6
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
1.5  
= 4.5 V  
= 6 V  
3.15  
4.2  
3.15  
4.2  
High-level input voltage  
V
V
IH  
= 2 V  
0.5  
1.35  
1.8  
0.5  
1.35  
1.8  
= 4.5 V  
= 6 V  
V
IL  
Low-level input voltage  
V
V
Input voltage  
0
0
V
0
0
V
V
V
I
CC  
CC  
Output voltage  
V
CC  
V
CC  
O
V
CC  
V
CC  
V
CC  
= 2 V  
1000  
500  
400  
125  
1000  
500  
400  
85  
= 4.5 V  
= 6 V  
t/v  
Input transition rise/fall time  
ns  
T
A
Operating free-air temperature  
−55  
−40  
°C  
If this device is used in the threshold region (from V max = 0.5 V to V min = 1.5 V), there is a potential to go into the wrong state from induced  
IL  
IH  
grounding, causing double clocking. Operating with the inputs at t = 1000 ns and V  
= 2 V does not damage the device; however, functionally,  
t
CC  
the CLK inputs are not ensured while in the shift, count, or toggle operating modes.  
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
= 25°C  
SN54HC4040 SN74HC4040  
A
PARAMETER  
TEST CONDITIONS  
V
UNIT  
CC  
MIN  
TYP  
MAX  
MIN  
1.9  
4.4  
5.9  
3.7  
5.2  
MAX  
MIN  
1.9  
MAX  
2 V  
4.5 V  
6 V  
1.9 1.998  
4.4 4.499  
5.9 5.999  
4.4  
I
= −20 µA  
OH  
5.9  
V
V
V = V or V  
IH  
V
OH  
OL  
I
IL  
I
I
= −4 mA  
4.5 V  
6 V  
3.98  
5.48  
4.3  
5.8  
3.84  
5.34  
OH  
= −5.2 mA  
OH  
2 V  
0.002  
0.001  
0.001  
0.17  
0.15  
0.1  
0.1  
0.1  
0.1  
0.26  
0.26  
100  
8
0.1  
0.1  
0.1  
0.1  
4.5 V  
6 V  
I
= 20 µA  
OL  
0.1  
0.1  
V = V or V  
V
I
IH  
IL  
I
I
= 4 mA  
4.5 V  
6 V  
0.4  
0.33  
0.33  
1000  
80  
OL  
= 5.2 mA  
0.4  
OL  
I
I
V = V  
I
or 0  
6 V  
1000  
160  
10  
nA  
µA  
pF  
I
CC  
V = V  
I
or 0,  
I
O
= 0  
6 V  
CC  
CC  
C
2 V to 6 V  
3
10  
10  
i
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢃꢆ ꢃꢆ ꢇ ꢀ ꢁꢈ ꢃ ꢄꢅꢃ ꢆ ꢃ ꢆ  
ꢉꢊ ꢋꢌꢍ ꢎ ꢏ ꢀꢐꢁ ꢅ ꢄꢑ ꢒꢁ ꢒꢓꢀ ꢌꢍ ꢁ ꢏꢑꢐ ꢅꢒ ꢓꢁꢎ ꢔꢑ ꢀ  
SCLS160D − DECEMBER 1982 − REVISED SEPTEMBER 2003  
timing requirements over recommended operating free-air temperature range (unless otherwise  
noted)  
T
= 25°C  
SN54HC4040 SN74HC4040  
A
V
UNIT  
CC  
MIN  
MAX  
5.5  
28  
MIN  
MAX  
3.7  
19  
MIN  
MAX  
4.3  
22  
2 V  
4.5 V  
6 V  
f
t
t
Clock frequency  
MHz  
clock  
33  
22  
25  
2 V  
90  
18  
15  
70  
14  
12  
60  
12  
10  
135  
27  
115  
23  
20  
90  
18  
15  
75  
15  
13  
4.5 V  
6 V  
CLK high or low  
CLR high  
23  
Pulse duration  
ns  
ns  
w
2 V  
105  
21  
4.5 V  
6 V  
18  
2 V  
90  
Setup time, CLR inactive before CLK↓  
4.5 V  
6 V  
18  
su  
15  
switching characteristics over recommended operating free-air temperature range, C = 50 pF  
L
(unless otherwise noted) (see Figure 1)  
T
A
= 25°C  
TYP  
10  
SN54HC4040 SN74HC4040  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
V
UNIT  
CC  
MIN  
5.5  
28  
MAX  
MIN  
3.7  
19  
MAX  
MIN  
4.3  
22  
MAX  
2 V  
4.5 V  
6 V  
45  
f
t
t
t
MHz  
max  
33  
53  
22  
25  
2 V  
62  
150  
30  
225  
45  
190  
38  
4.5 V  
6 V  
16  
CLK  
CLR  
Q
ns  
ns  
ns  
pd  
A
12  
26  
38  
32  
2 V  
63  
140  
28  
210  
42  
175  
35  
4.5 V  
6 V  
17  
Any  
Any  
PHL  
t
13  
24  
36  
30  
2 V  
28  
75  
110  
22  
95  
4.5 V  
6 V  
8
15  
19  
6
13  
19  
16  
operating characteristics, T = 25°C  
A
PARAMETER  
TEST CONDITIONS  
TYP  
UNIT  
C
Power dissipation capacitance  
No load  
88  
pF  
pd  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁꢂ ꢃ ꢄꢅ ꢃ ꢆꢃ ꢆ ꢇ ꢀꢁꢈ ꢃꢄ ꢅꢃ ꢆꢃ ꢆ  
ꢉ ꢊ ꢋꢌꢍ ꢎ ꢏꢀ ꢐꢁꢅꢄꢑ ꢒꢁ ꢒꢓ ꢀ ꢌꢍ ꢁꢏꢑꢐ ꢅꢒ ꢓ ꢁꢎ ꢔꢑ ꢀ  
SCLS160D − DECEMBER 1982 − REVISED SEPTEMBER 2003  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
High-Level  
50%  
50%  
50%  
Pulse  
From Output  
Under Test  
Test  
Point  
0 V  
t
w
C
= 50 pF  
L
V
CC  
(see Note A)  
Low-Level  
Pulse  
50%  
0 V  
LOAD CIRCUIT  
VOLTAGE WAVEFORMS  
PULSE DURATIONS  
V
CC  
Input  
50%  
50%  
0 V  
V
t
t
PLH  
PHL  
90%  
V
CC  
OH  
In-Phase  
Output  
Reference  
Input  
90%  
t
50%  
50%  
10%  
50%  
10%  
V
OL  
0 V  
V
t
r
f
f
t
t
h
su  
t
t
PLH  
PHL  
90%  
V
CC  
OH  
OL  
Data  
Input  
90%  
90%  
90%  
t
Out-of-Phase  
Output  
50%  
10%  
50%  
10%  
50%  
10%  
50%  
10%  
0 V  
V
t
t
t
r
r
f
VOLTAGE WAVEFORMS  
SETUP AND HOLD AND INPUT RISE AND FALL TIMES  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES  
NOTES: A.  
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following  
characteristics: PRR 1 MHz, Z = 50 , t = 6 ns, t = 6 ns.  
C includes probe and test-fixture capacitance.  
L
O
r
f
C. For clock inputs, f  
is measured when the input duty cycle is 50%.  
max  
D. The outputs are measured one at a time with one input transition per measurement.  
E. and t are the same as t  
t
.
PLH  
PHL pd  
Figure 1. Load Circuit and Voltage Waveforms  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Mar-2005  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
LCCC  
CDIP  
CFP  
Drawing  
85004012A  
8500401EA  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
FK  
J
20  
16  
16  
16  
16  
1
1
TBD  
TBD  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
Level-NC-NC-NC  
Level-NC-NC-NC  
Level-NC-NC-NC  
Level-NC-NC-NC  
8500401FA  
W
J
1
SN54HC4040J  
SN74HC4040D  
CDIP  
SOIC  
1
D
40  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-260C-1 YEAR/  
Level-1-235C-UNLIM  
SN74HC4040DBLE  
SN74HC4040DBR  
OBSOLETE  
ACTIVE  
SSOP  
SSOP  
DB  
DB  
16  
16  
TBD  
Call TI  
Call TI  
2000  
2500  
250  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-260C-1 YEAR/  
Level-1-235C-UNLIM  
SN74HC4040DR  
SN74HC4040DT  
ACTIVE  
ACTIVE  
SOIC  
SOIC  
D
D
16  
16  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-260C-1 YEAR/  
Level-1-235C-UNLIM  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-260C-1 YEAR/  
Level-1-235C-UNLIM  
SN74HC4040DWR  
SN74HC4040N  
OBSOLETE  
ACTIVE  
SOIC  
PDIP  
DW  
N
16  
16  
TBD  
Call TI  
Call TI  
25  
Pb-Free  
(RoHS)  
CU NIPDAU Level-NC-NC-NC  
SN74HC4040N3  
OBSOLETE  
ACTIVE  
PDIP  
SO  
N
16  
16  
TBD  
Call TI  
Call TI  
SN74HC4040NSR  
NS  
2000  
90  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-260C-1 YEAR/  
Level-1-235C-UNLIM  
SN74HC4040PW  
ACTIVE  
TSSOP  
PW  
16  
Pb-Free  
(RoHS)  
CU NIPDAU Level-1-250C-UNLIM  
SN74HC4040PWLE  
SN74HC4040PWR  
OBSOLETE TSSOP  
PW  
PW  
16  
16  
TBD  
Call TI  
Call TI  
ACTIVE  
TSSOP  
2000  
250  
Pb-Free  
(RoHS)  
CU NIPDAU Level-1-250C-UNLIM  
SN74HC4040PWT  
ACTIVE  
TSSOP  
PW  
16  
Pb-Free  
(RoHS)  
CU NIPDAU Level-1-250C-UNLIM  
SNJ54HC4040FK  
SNJ54HC4040J  
SNJ54HC4040W  
ACTIVE  
ACTIVE  
ACTIVE  
LCCC  
CDIP  
CFP  
FK  
J
20  
16  
16  
1
1
1
TBD  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Level-NC-NC-NC  
Level-NC-NC-NC  
Level-NC-NC-NC  
W
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan  
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS  
&
no Sb/Br)  
-
please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Mar-2005  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
MECHANICAL DATA  
MLCC006B – OCTOBER 1996  
FK (S-CQCC-N**)  
LEADLESS CERAMIC CHIP CARRIER  
28 TERMINAL SHOWN  
A
B
NO. OF  
TERMINALS  
**  
18 17 16 15 14 13 12  
MIN  
MAX  
MIN  
MAX  
0.342  
(8,69)  
0.358  
(9,09)  
0.307  
(7,80)  
0.358  
(9,09)  
19  
20  
11  
10  
9
20  
28  
44  
52  
68  
84  
0.442  
(11,23)  
0.458  
(11,63)  
0.406  
(10,31)  
0.458  
(11,63)  
21  
B SQ  
22  
0.640  
(16,26)  
0.660  
(16,76)  
0.495  
(12,58)  
0.560  
(14,22)  
8
A SQ  
23  
0.739  
(18,78)  
0.761  
(19,32)  
0.495  
(12,58)  
0.560  
(14,22)  
7
24  
25  
6
0.938  
(23,83)  
0.962  
(24,43)  
0.850  
(21,6)  
0.858  
(21,8)  
5
1.141  
(28,99)  
1.165  
(29,59)  
1.047  
(26,6)  
1.063  
(27,0)  
26 27 28  
1
2
3
4
0.080 (2,03)  
0.064 (1,63)  
0.020 (0,51)  
0.010 (0,25)  
0.020 (0,51)  
0.010 (0,25)  
0.055 (1,40)  
0.045 (1,14)  
0.045 (1,14)  
0.035 (0,89)  
0.045 (1,14)  
0.035 (0,89)  
0.028 (0,71)  
0.022 (0,54)  
0.050 (1,27)  
4040140/D 10/96  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. This package can be hermetically sealed with a metal lid.  
D. The terminals are gold plated.  
E. Falls within JEDEC MS-004  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,  
enhancements, improvements, and other changes to its products and services at any time and to discontinue  
any product or service without notice. Customers should obtain the latest relevant information before placing  
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms  
and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI  
deems necessary to support this warranty. Except where mandated by government requirements, testing of all  
parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for  
their products and applications using TI components. To minimize the risks associated with customer products  
and applications, customers should provide adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,  
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process  
in which TI products or services are used. Information published by TI regarding third-party products or services  
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.  
Use of such information may require a license from a third party under the patents or other intellectual property  
of the third party, or a license from TI under the patents or other intellectual property of TI.  
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without  
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction  
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for  
such altered documentation.  
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that  
product or service voids all express and any implied warranties for the associated TI product or service and  
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.  
Following are URLs where you can obtain information on other Texas Instruments products and application  
solutions:  
Products  
Applications  
Audio  
Amplifiers  
amplifier.ti.com  
www.ti.com/audio  
Data Converters  
dataconverter.ti.com  
Automotive  
www.ti.com/automotive  
DSP  
dsp.ti.com  
Broadband  
Digital Control  
Military  
www.ti.com/broadband  
www.ti.com/digitalcontrol  
www.ti.com/military  
Interface  
Logic  
interface.ti.com  
logic.ti.com  
Power Mgmt  
Microcontrollers  
power.ti.com  
Optical Networking  
Security  
www.ti.com/opticalnetwork  
www.ti.com/security  
www.ti.com/telephony  
www.ti.com/video  
microcontroller.ti.com  
Telephony  
Video & Imaging  
Wireless  
www.ti.com/wireless  
Mailing Address:  
Texas Instruments  
Post Office Box 655303 Dallas, Texas 75265  
Copyright 2005, Texas Instruments Incorporated  

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