SN74HC623DWG4 [TI]

HC/UH SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, SOIC-20;
SN74HC623DWG4
型号: SN74HC623DWG4
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

HC/UH SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, SOIC-20

光电二极管 输出元件 逻辑集成电路
文件: 总12页 (文件大小:502K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢋ ꢅꢌꢍꢎ ꢏꢐꢀ ꢌ ꢑꢍꢁꢀꢅ ꢒ ꢓꢔ ꢒ ꢑ  
SCLS149C – DECEMBER 1982 – REVISED DECEMBER 2002  
SN54HC623 . . . J OR W PACKAGE  
SN74HC623 . . . DW, N, OR NS PACKAGE  
(TOP VIEW)  
D
D
Wide Operating Voltage Range of 2 V to 6 V  
High-Current 3-State Outputs Can Drive Up  
To 15 LSTTL Loads  
D
D
D
D
D
D
Low Power Consumption, 80-µA Max I  
OEAB  
A1  
V
CC  
OEBA  
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
Typical t = 8 ns  
pd  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
GND  
B1  
B2  
B3  
B4  
±6-mA Output Drive at 5 V  
Low Input Current of 1 µA Max  
Lock Bus-Latch Capability  
True Logic  
B5  
13 B6  
12 B7  
description/ordering information  
11  
B8  
These octal bus transceivers are designed for  
asynchronous two-way communication between  
data buses. The control-function implementation  
allows for maximum flexibility in timing.  
SN54HC623 . . . FK PACKAGE  
(TOP VIEW)  
The ’HC623 devices allow data transmission from  
the A bus to the B bus or from the B bus to the A  
bus, depending upon the logic levels at the  
output-enable (OEAB and OEBA) inputs.  
3
2
1
20 19  
18  
B1  
B2  
B3  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
17  
16  
OEAB and OEBA disable the device so that the  
buses are effectively isolated. The dual-enable  
configuration gives the transceivers the capability  
to store data by simultaneously enabling OEAB  
and OEBA. Each output reinforces its input in this  
transceiver configuration. When both OEAB and  
OEBA are enabled and all other data sources to  
the two sets of bus lines are in the high-impedance  
state, both sets of bus lines (16 total) remain at  
their last states. The 8-bit codes appearing on the  
two sets of buses are identical.  
15 B4  
14  
B5  
9 10 11 12 13  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP – N  
Tube  
SN74HC623N  
SN74HC623N  
Tube  
SN74HC623DW  
SN74HC623DWR  
SN74HC623NSR  
SNJ54HC623J  
SNJ54HC623W  
SNJ54HC623FK  
–40°C to 85°C  
SOIC – DW  
HC623  
Tape and reel  
Tape and reel  
Tube  
SOP – NS  
CDIP – J  
HC623  
SNJ54HC623J  
SNJ54HC623W  
SNJ54HC623FK  
–55°C to 125°C  
CFP – W  
LCCC – FK  
Tube  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2002, Texas Instruments Incorporated  
ꢐ ꢁ ꢎꢒꢀꢀ ꢋ ꢌꢄ ꢒꢑꢕ ꢓꢀ ꢒ ꢁ ꢋꢌꢒꢘ ꢙꢚ ꢛꢜ ꢝꢞꢟ ꢠꢡꢢ ꢣꢙ ꢟꢞ ꢣꢙꢤ ꢛꢣꢜ ꢗꢑ ꢋ ꢘ ꢐ ꢅꢌ ꢓꢋ ꢁ  
ꢭꢪ  
ꢧꢤ ꢦ ꢤ ꢡ ꢢ ꢙ ꢢ ꢦ ꢜ ꢪ  
ꢢꢜ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢇ ꢈꢉ ꢀꢁ ꢊ ꢃ ꢄꢅꢆ ꢇ ꢈ  
ꢋꢅ ꢌꢍ ꢎ ꢏ ꢐ ꢀ ꢌ ꢑꢍ ꢁꢀ ꢅꢒ ꢓ ꢔꢒ ꢑꢀ  
ꢕꢓ ꢌ ꢄ ꢈ ꢖꢀꢌꢍꢌ ꢒ ꢋꢐꢌ ꢗꢐ ꢌꢀ  
SCLS149C DECEMBER 1982 REVISED DECEMBER 2002  
FUNCTION TABLE  
INPUTS  
OPERATION  
OEBA  
OEAB  
L
H
H
L
H
L
B data to A bus  
A data to B bus  
Isolation  
B data to A bus,  
A data to B bus  
L
H
logic diagram (positive logic)  
19  
1
OEBA  
OEAB  
2
18  
A1  
B1  
To Seven Other Transceivers  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
CC  
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA  
IK  
I
CC  
Output clamp current, I  
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA  
Continuous current through V  
Package thermal impedance, θ (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA  
JA  
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W  
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
stg  
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢋ ꢅꢌꢍꢎ ꢏꢐꢀ ꢌ ꢑꢍꢁꢀꢅ ꢒ ꢓꢔ ꢒ ꢑ  
SCLS149C DECEMBER 1982 REVISED DECEMBER 2002  
recommended operating conditions (see Note 3)  
SN54HC623  
MIN NOM  
SN74HC623  
MIN NOM  
UNIT  
MAX  
MAX  
V
V
Supply voltage  
2
1.5  
5
6
2
1.5  
5
6
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
= 4.5 V  
= 6 V  
3.15  
4.2  
3.15  
4.2  
High-level input voltage  
V
V
IH  
= 2 V  
0.5  
1.35  
1.8  
0.5  
1.35  
1.8  
= 4.5 V  
= 6 V  
V
IL  
Low-level input voltage  
V
V
Input voltage  
0
0
V
V
0
0
V
V
V
V
I
CC  
CC  
Output voltage  
O
CC  
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
1000  
500  
400  
125  
1000  
500  
400  
85  
= 4.5 V  
= 6 V  
t/v  
Input transition rise/fall time  
ns  
T
A
Operating free-air temperature  
55  
40  
°C  
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
= 25°C  
SN54HC623  
SN74HC623  
A
PARAMETER  
TEST CONDITIONS  
V
UNIT  
CC  
MIN  
TYP  
MAX  
MIN  
1.9  
4.4  
5.9  
3.7  
5.2  
MAX  
MIN  
1.9  
MAX  
2 V  
4.5 V  
6 V  
1.9 1.998  
4.4 4.499  
5.9 5.999  
4.4  
I
= 20 µA  
OH  
5.9  
V
V
V = V or V  
IH  
V
OH  
I
IL  
IL  
I
I
= 6 mA  
4.5 V  
6 V  
3.98  
5.48  
4.3  
5.8  
3.84  
5.34  
OH  
= 7.8 mA  
OH  
2 V  
0.002  
0.001  
0.001  
0.17  
0.1  
0.1  
0.1  
0.1  
0.1  
0.4  
0.4  
0.1  
0.1  
4.5 V  
6 V  
I
= 20 µA  
OL  
0.1  
0.1  
V = V or V  
V
OL  
I
IH  
I
I
= 6 mA  
4.5 V  
6 V  
0.26  
0.26  
0.33  
0.33  
OL  
= 7.8 mA  
0.15  
OL  
OEAB or  
OEBA  
I
I
V = V  
or 0  
6 V  
±0.1  
±100  
±1000  
±1000  
nA  
I
CC  
I
I
A or B  
V
= V  
or 0  
6 V  
6 V  
±0.01  
±0.5  
±10  
±5  
µA  
µA  
OZ  
O
CC  
V = V  
I
or 0,  
I
O
= 0  
8
160  
80  
CC  
CC  
OEAB or  
OEBA  
C
2 V to 6 V  
3
10  
10  
10  
pF  
i
ꢝꢢ ꢜ ꢛ ꢮꢣ ꢧꢚ ꢤ ꢜ ꢢ ꢞꢥ ꢝꢢ ꢯ ꢢ ꢩꢞ ꢧꢡꢢ ꢣꢙꢪ ꢅ ꢚꢤ ꢦꢤ ꢟꢙ ꢢꢦ ꢛꢜ ꢙꢛ ꢟ ꢝꢤ ꢙꢤ ꢤꢣ ꢝ ꢞꢙ ꢚꢢꢦ  
ꢟ ꢚꢤ ꢣ ꢮꢢ ꢞꢦ ꢝꢛ ꢜ ꢟ ꢞꢣ ꢙꢛ ꢣꢠꢢ ꢙ ꢚꢢ ꢜ ꢢ ꢧꢦ ꢞꢝ ꢠꢟꢙ ꢜ ꢬ ꢛꢙꢚ ꢞꢠꢙ ꢣꢞꢙ ꢛꢟꢢ ꢪ  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢇ ꢈꢉ ꢀꢁ ꢊ ꢃ ꢄꢅꢆ ꢇ ꢈ  
ꢋꢅ ꢌꢍ ꢎ ꢏ ꢐ ꢀ ꢌ ꢑꢍ ꢁꢀ ꢅꢒ ꢓ ꢔꢒ ꢑꢀ  
ꢕꢓ ꢌ ꢄ ꢈ ꢖꢀꢌꢍꢌ ꢒ ꢋꢐꢌ ꢗꢐ ꢌꢀ  
SCLS149C DECEMBER 1982 REVISED DECEMBER 2002  
switching characteristics over recommended operating free-air temperature range, C = 50 pF  
L
(unless otherwise noted) (see Figure 1)  
T
A
= 25°C  
TYP  
29  
10  
8
SN54HC623  
SN74HC623  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
V
UNIT  
CC  
MIN  
MAX  
105  
21  
MIN  
MAX  
160  
32  
MIN  
MAX  
130  
26  
2 V  
4.5 V  
6 V  
t
t
t
t
t
t
A or B  
OEBA  
OEBA  
OEAB  
OEAB  
B or A  
ns  
pd  
en  
dis  
en  
dis  
t
18  
27  
22  
2 V  
112  
27  
20  
40  
18  
16  
112  
27  
20  
40  
18  
16  
20  
8
210  
42  
315  
63  
265  
53  
4.5 V  
6 V  
A
A
ns  
ns  
ns  
ns  
ns  
36  
54  
45  
2 V  
150  
30  
225  
45  
190  
38  
4.5 V  
6 V  
26  
38  
32  
2 V  
210  
42  
315  
63  
265  
53  
4.5 V  
6 V  
B
36  
54  
45  
2 V  
150  
30  
225  
45  
190  
38  
4.5 V  
6 V  
B
26  
38  
32  
2 V  
60  
90  
75  
A or B  
4.5 V  
6 V  
12  
18  
15  
6
10  
15  
13  
switching characteristics over recommended operating free-air temperature range, C = 150 pF  
L
(unless otherwise noted) (see Figure 1)  
T
A
= 25°C  
TYP  
44  
SN54HC623  
SN74HC623  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
V
UNIT  
CC  
MIN  
MAX  
135  
27  
MIN  
MAX  
200  
40  
MIN  
MAX  
170  
34  
2 V  
4.5 V  
6 V  
14  
t
pd  
t
en  
t
t
A or B  
OEBA  
OEAB  
B or A  
ns  
11  
23  
34  
29  
2 V  
130  
31  
270  
54  
405  
81  
335  
67  
4.5 V  
6 V  
A
ns  
ns  
ns  
23  
46  
69  
56  
2 V  
130  
31  
270  
54  
405  
81  
335  
67  
4.5 V  
6 V  
B
23  
46  
69  
56  
2 V  
45  
210  
42  
315  
63  
265  
53  
A or B  
4.5 V  
6 V  
17  
13  
36  
53  
45  
operating characteristics, T = 25°C  
A
PARAMETER  
Power dissipation capacitance per transceiver  
TEST CONDITIONS  
TYP  
UNIT  
C
No load  
40  
pF  
pd  
ꢝ ꢢ ꢜ ꢛ ꢮ ꢣ ꢧꢚ ꢤ ꢜ ꢢ ꢞꢥ ꢝꢢ ꢯ ꢢ ꢩ ꢞꢧ ꢡꢢ ꢣ ꢙꢪ ꢅ ꢚꢤ ꢦꢤ ꢟꢙ ꢢꢦ ꢛꢜ ꢙꢛ ꢟ ꢝꢤ ꢙꢤ ꢤꢣ ꢝ ꢞꢙ ꢚꢢꢦ  
ꢟ ꢚ ꢤ ꢣ ꢮꢢ ꢞꢦ ꢝꢛ ꢜ ꢟ ꢞꢣ ꢙꢛ ꢣꢠ ꢢ ꢙ ꢚꢢ ꢜ ꢢ ꢧꢦ ꢞ ꢝꢠꢟ ꢙꢜ ꢬ ꢛꢙꢚ ꢞꢠꢙ ꢣꢞꢙ ꢛꢟꢢ ꢪ  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢋ ꢅꢌꢍꢎ ꢏꢐꢀ ꢌ ꢑꢍꢁꢀꢅ ꢒ ꢓꢔ ꢒ ꢑ  
ꢕ ꢓꢌ ꢄ ꢈ ꢖꢀꢌꢍꢌ ꢒ ꢋ ꢐꢌ ꢗ ꢐꢌ  
SCLS149C DECEMBER 1982 REVISED DECEMBER 2002  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
PARAMETER  
R
C
L
S1  
S2  
L
50 pF  
or  
150 pF  
t
Open  
Closed  
Closed  
Open  
S1  
S2  
PZH  
Test  
Point  
t
t
1 kΩ  
1 kΩ  
en  
R
t
t
t
L
PZL  
PHZ  
PLZ  
From Output  
Under Test  
Open  
Closed  
Open  
50 pF  
C
dis  
L
Closed  
(see Note A)  
50 pF  
or  
150 pF  
t
or t  
––  
Open  
Open  
pd  
t
LOAD CIRCUIT  
V
CC  
Input  
90%  
t
90%  
50%  
10%  
50%  
10%  
0 V  
t
r
f
VOLTAGE WAVEFORM  
INPUT RISE AND FALL TIMES  
Output  
Control  
(Low-Level  
Enabling)  
V
CC  
V
CC  
Input  
50%  
50%  
50%  
50%  
0 V  
0 V  
t
t
PLH  
PHL  
90%  
t
t
PLZ  
PZL  
V
V
OH  
V  
50%  
V  
CC  
Output  
Waveform 1  
(See Note B)  
In-Phase  
Output  
CC  
90%  
50%  
10%  
50%  
10%  
10%  
t
OL  
V
OL  
OH  
t
t
r
f
f
t
PZH  
PHZ  
t
t
PLH  
PHL  
90%  
V
V
OH  
V
Output  
Waveform 2  
(See Note B)  
90%  
t
90%  
Out-of-  
Phase  
Output  
50%  
10%  
50%  
10%  
50%  
0 V  
OL  
t
r
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES  
NOTES: A.  
C includes probe and test-fixture capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following  
characteristics: PRR 1 MHz, Z = 50 , t = 6 ns, t = 6 ns.  
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.  
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
are the same as t  
.
dis  
PLZ  
PZL  
PLH  
PHZ  
PZH  
PHL  
are the same as t  
.
en  
are the same as t .  
pd  
Figure 1. Load Circuit and Voltage Waveforms  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
18-Sep-2008  
PACKAGING INFORMATION  
Orderable Device  
SN74HC623DW  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
SOIC  
DW  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74HC623DWG4  
SN74HC623DWR  
SN74HC623DWRE4  
SN74HC623DWRG4  
SN74HC623N  
SOIC  
SOIC  
SOIC  
SOIC  
PDIP  
PDIP  
SO  
DW  
DW  
DW  
DW  
N
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
20  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
SN74HC623NE4  
SN74HC623NSR  
SN74HC623NSRE4  
SN74HC623NSRG4  
N
20  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
NS  
NS  
NS  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SO  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SO  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Aug-2008  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) W1 (mm)  
(mm) (mm) Quadrant  
SN74HC623DWR  
SN74HC623NSR  
SOIC  
SO  
DW  
NS  
20  
20  
2000  
2000  
330.0  
330.0  
24.4  
24.4  
10.8  
8.2  
13.0  
13.0  
2.7  
2.5  
12.0  
12.0  
24.0  
24.0  
Q1  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Aug-2008  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SN74HC623DWR  
SN74HC623NSR  
SOIC  
SO  
DW  
NS  
20  
20  
2000  
2000  
346.0  
346.0  
346.0  
346.0  
41.0  
41.0  
Pack Materials-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,  
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should  
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard  
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and  
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Copyright © 2008, Texas Instruments Incorporated  

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