SN74LS273NE4 [TI]
OCTAL D-TYPE FLIP-FLOP WITH CLEAR;
| 型号： | SN74LS273NE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL D-TYPE FLIP-FLOP WITH CLEAR 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总8页 (文件大小：426K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54273, SN54LS273, SN74273, SN74LS273
OCTAL D-TYPE FLIP-FLOP WITH CLEAR
SDLS090 – OCTOBER 1976 – REVISED MARCH 1988
SN54273, SN74LS273 . . . J OR W PACKAGE
SN74273 . . . N PACKAGE
• Contains Eight Flip-Flops With Single-Rail
Outputs
SN74LS273 . . . DW OR N PACKAGE
(TOP VIEW)
• Buffered Clock and Direct Clear Inputs
• Individual Data Input to Each Flip-Flop
• Applications Include:
Buffer/Storage Registers
Shift Registers
CLR
1Q
1D
2D
2Q
3Q
3D
4D
4Q
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
8Q
8D
7D
Pattern Generators
16 7Q
15 6Q
description
14
13
12
11
6D
5D
5Q
CLK
These monolithic, positive-edge-triggered flip-
flops utilize TTL circuitry to implement D-type
flip-flop logic with a direct clear input.
GND
Information at the D inputs meeting the setup time
requirements is transferred to the Q outputs on the
positive-going edge of the clock pulse. Clock
triggering occurs at a particular voltage level and
is not directly related to the transition time of the
positive-going pulse. When the clock input is at
either the high or low level, the D input signal has
no effect ar the output.
SN54LS273 . . . FK PACKAGE
(TOP VIEW)
3
2
1
20 19
18
8D
7D
7Q
6Q
6D
2D
2Q
3Q
3D
4D
4
5
6
7
8
These flip-flops are guaranteed to respond to
clock frequencies ranging form 0 to 30 megahertz
while maximum clock frequency is typically 40
megahertz. Typical power dissipation is 39
milliwatts per flip-flop for the ′273 and 10 milliwatts
for the ′LS273.
17
16
15
14
9 10 11 12 13
†
FUNCTION TABLE
(each flip-flop)
logic symbol
INPUTS
1
CLR
OUTPUT
Q
EN
C1
CLEAR CLOCK
D
X
H
L
11
CLK
L
H
H
H
X
↑
L
H
L
3
1D
4
2
5
6
1D
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
↑
2D
7
L
X
Q
0
3D
8
9
4D
13
5D
14
6D
17
7D
18
8D
12
15
16
19
†
This symbol is in accordance with ANSI/IEEE Std.
91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, J, N, and W packages.
Copyright 1988, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54273, SN54LS273, SN74273, SN74LS273
OCTAL D-TYPE FLIP-FLOP WITH CLEAR
SDLS090 – OCTOBER 1976 – REVISED MARCH 1988
schematics of inputs and outputs
′273
EQUIVALENT OF EACH INPUT
TYPICAL OF ALL OUTPUTS
V
CC
V
CC
100 Ω
NOM
R
eq
INPUT
OUTPUT
Clear: R = 3 kΩ NOM
eq
Clock: R = 6 kΩ NOM
eq
All other inputs: R = 8 kΩ NOM
eq
′LS273
EQUIVALENT OF EACH INPUT
TYPICAL OF ALL OUTPUTS
V
CC
120 Ω NOM
V
CC
20 kΩ
NOM
INPUT
OUTPUT
logic diagram (positive logic)
1D
2D
3D
4D
8
5D
13
6D
7D
17
8D
18
11
3
4
7
14
CLOCK
1D
C1
1D
C1
1D
C1
1D
C1
1D
C1
1D
C1
1D
C1
1D
C1
R
R
R
R
R
R
R
R
1
CLEAR
2
5
6
9
12
5Q
15
16
7Q
19
8Q
1Q
2Q
3Q
4Q
6Q
Pin numbers shown are for the DW, J, N, and W packages.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54273, SN54LS273, SN74273, SN74LS273
OCTAL D-TYPE FLIP-FLOP WITH CLEAR
SDLS090 – OCTOBER 1976 – REVISED MARCH 1988
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, T : SN54273 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
SN74273 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
NOTE 1: Voltage values are with respect to network ground terminal.
recommended operating conditions
SN54273
SN74273
UNIT
MIN NOM
MAX
5.5
MIN NOM
MAX
5.25
–800
16
Supply voltage, V
4.5
5
4.75
5
V
µA
CC
High-level output current, I
–800
16
OH
OL
Low-level output current, I
Clock frequency, f
mA
MHz
ns
0
16.5
20↑
25↑
5↑
30
0
16.5
20↑
25↑
5↑
30
clock
Width of clock or clear pulse, t
w
Data input
Setup time, t
ns
su
Clear inactive state
Data hold time, t
ns
h
Operating free-air temperature, T
–55
125
0
70
°C
A
↑ The arrow indicates that the rising edge of the clock pulse is used for reference.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
‡
PARAMETER
High-level input voltage
TEST CONDITIONS
MIN TYP
MAX
UNIT
V
V
V
2
V
V
V
IH
Low-level input voltage
Input clamp voltage
0.8
IL
V
= MIN,
= MIN,
I = –12 mA
–1.5
IK
CC
I
V
V
V
I
= 2 V,
= –800 µA
CC
IL
IH
V
OH
V
OL
High-level output voltage
2.4
3.4
V
= 0.8 V,
OH
V
V
= MIN,
= 0.8 V,
V
= 2 V,
= 16 mA
CC
IL
IH
Low-level output voltage
0.4
V
I
OH
I
Input current at maximum input voltage
V
= MAX,
V = 5.5 V
1
80
mA
I
CC
I
Clear
I
High-level input current
Low-level input current
V
= MAX,
V = 2.4 V
I
µA
IH
IL
CC
CC
Clock or D
Clear
40
–3.2
–1.6
–57
94
I
V
= MAX,
V = 0.4 V
I
mA
Clock or D
§
I
I
Short-circuit output current
Supply current
V
V
= MAX
= MAX,
–18
mA
mA
OS
CC
See Note 2
62
CC
CC
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡
§
All typical values are at V
= 5 V, T = 25°C.
A
CC
Not more than one output should be shorted at a time.
NOTE 2: With all outputs open and 4.5 V applied to all data and clear inputs, I
to clock.
is measured after a momentary ground, then 4.5 V, is applied
CC
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54273, SN54LS273, SN74273, SN74LS273
OCTAL D-TYPE FLIP-FLOP WITH CLEAR
SDLS090 – OCTOBER 1976 – REVISED MARCH 1988
switching characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
Maximum clock frequency
TEST CONDITIONS
MIN
TYP
40
MAX
UNIT
MHz
ns
f
t
t
t
30
max
PHL
PLH
PHL
C
R
= 15 pF,
= 400 Ω,
L
L
Propagation delay time, high-to-low-level output from clear
Propagation delay time, low-to-high-level output from clock
Propagation delay time, high-to-low-level output from clock
18
27
27
27
17
ns
See Note 3
18
ns
NOTE 3: Load circuits and voltage waveforms are shown in Section 1.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, T : SN54LS273 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
SN74LS273 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
NOTE 1: Voltage values are with respect to network ground terminal.
recommended operating conditions
SN54LS273
MIN NOM
SN74LS273
MIN NOM
UNIT
MAX
5.5
MAX
5.25
–400
8
Supply voltage, V
4.5
5
4.75
5
V
µA
CC
High-level output current, I
–400
4
OH
OL
Low-level output current, I
Clock frequency, f
mA
MHz
ns
0
20
30
0
20
30
clock
Width of clock or clear pulse, t
w
Data input
20↑
25↑
5↑
20↑
25↑
5↑
Setup time, t
ns
su
Clear inactive state
Data hold time, t
ns
h
Operating free-air temperature, T
–55
125
0
70
°C
A
↑ The arrow indicates that the rising edge of the clock pulse is used for reference.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54273, SN54LS273, SN74273, SN74LS273
OCTAL D-TYPE FLIP-FLOP WITH CLEAR
SDLS090 – OCTOBER 1976 – REVISED MARCH 1988
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LS273
SN74LS273
†
PARAMETER
TEST CONDITIONS
UNIT
‡
‡
MIN TYP
MAX
MIN TYP
MAX
V
V
V
High-level input voltage
Low-level input voltage
Input clamp voltage
2
2
V
V
V
IH
0.7
0.8
IL
V
= MIN,
= MIN,
= V max,
IL
I = –18 mA
–1.5
–1.5
IK
CC
I
V
V
V
= 2 V,
= –400 µA
CC
IL
IH
V
High-level output voltage
Low-level output voltage
2.5
3.4
2.7
3.4
V
V
OH
OL
I
OH
I
I
= 4 mA
= 8 mA
0.25
0.4
0.1
0.25
0.35
0.4
0.5
V
V
= MIN,
= V max,
IL
V
IH
= 2 V,
OL
CC
IL
V
OL
Input current at
maximum input voltage
I
I
V
CC
= MAX,
V = 7 V
I
0.1
mA
I
I
High-level input current
Low-level input current
Short-circuit output
V
V
= MAX,
= MAX,
V = 2.7 V
20
20
µA
IH
CC
I
V = 0.4 V
I
–0.4
–0.4
mA
IL
CC
I
V
= MAX
–20
–100
–20
–100
27
mA
mA
OS
CC
CC
CC
§
current
I
Supply current
V
= MAX,
See Note 2
17
27
17
†
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡
§
All typical values are at V
= 5 V, T = 25°C.
A
CC
Not more than one output should be shorted at a time and duration of short circuit should not exceed one second.
NOTE 2: With all outputs open and 4.5 V applied to all data and clear inputs, I
to clock.
is measured after a momentary ground, then 4.5 V, is applied
CC
switching characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
Maximum clock frequency
TEST CONDITIONS
MIN
TYP
40
MAX
UNIT
MHz
ns
f
t
t
t
30
max
PHL
PLH
PHL
C
R
= 15 pF,
= 2 kΩ,
L
L
Propagation delay time, high-to-low-level output from clear
Propagation delay time, low-to-high-level output from clock
Propagation delay time, high-to-low-level output from clock
18
27
27
27
17
ns
See Note 3
18
ns
NOTE 3: Load circuits and voltage waveforms are shown in Section 1.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74LS273DWR
SN74LS273NSR
SOIC
SO
DW
NS
20
20
2000
2000
330.0
330.0
24.4
24.4
10.8
8.2
13.0
13.0
2.7
2.5
12.0
12.0
24.0
24.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74LS273DWR
SN74LS273NSR
SOIC
SO
DW
NS
20
20
2000
2000
367.0
367.0
367.0
367.0
45.0
45.0
Pack Materials-Page 2
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