SN74LV00 [TI]
QUADRUPLE 2-INPUT POSITIVE-NAND GATES; 四路2输入正与非门型号: | SN74LV00 |
厂家: | TEXAS INSTRUMENTS |
描述: | QUADRUPLE 2-INPUT POSITIVE-NAND GATES |
文件: | 总7页 (文件大小:132K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN54LV00, SN74LV00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCLS182C – FEBRUARY 1993 – REVISED APRIL 1996
SN54LV00 . . . J OR W PACKAGE
SN74LV00 . . . D, DB, OR PW PACKAGE
(TOP VIEW)
EPIC (Enhanced-Performance Implanted
CMOS) 2-µ Process
Typical V
< 0.8 V at V , T = 25°C
(Output Ground Bounce)
OLP
CC
A
1A
1B
V
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
Typical V
> 2 V at V , T = 25°C
(Output V
Undershoot)
OHV
CC
OH
4B
4A
4Y
3B
3A
3Y
A
1Y
2A
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model
(C = 200 pF, R = 0)
2B
2Y
GND
8
Latch-Up Performance Exceeds 250 mA
Per JEDEC Standard JESD-17
SN54LV00 . . . FK PACKAGE
(TOP VIEW)
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW),
Ceramic Flat (W) Packages, Chip Carriers
(FK), and (J) 300-mil DIPs
3
2
1
20 19
18
4A
NC
4Y
NC
3B
1Y
NC
2A
4
5
6
7
8
description
17
16
15
14
These quadruple 2-input positive-NAND gates
are designed for 2.7-V to 5.5-V V operation.
NC
2B
CC
9 10 11 12 13
The ’LV00 perform the Boolean function
Y = A • B or Y = A + B in positive logic.
The SN74LV00 is available in TI’s shrink
small-outline package (DB), which provides the
same I/O pin count and functionality of standard
small-outline packages in less than half the
printed-circuit-board area.
NC – No internal connection
The SN54LV00 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74LV00 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
B
H
X
L
H
L
L
H
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1996, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LV00, SN74LV00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCLS182C – FEBRUARY 1993 – REVISED APRIL 1996
†
logic symbol
logic diagram, each gate (positive logic)
1
A
B
1A
1B
2A
2B
3A
3B
4A
4B
&
Y
3
6
2
1Y
2Y
3Y
4Y
4
5
9
8
10
12
13
11
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for D, DB, J, PW, and W packages.
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through V
Maximum power dissipation at T = 55°C (in still air) (see Note 3): D package . . . . . . . . . . . . . . . . . . . 1.25 W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
A
DB or PW package . . . . . . . . . . . . . 0.5 W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 7 V maximum.
3. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LV00, SN74LV00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCLS182C – FEBRUARY 1993 – REVISED APRIL 1996
recommended operating conditions (see Note 4)
SN54LV00
SN74LV00
UNIT
V
MIN
2.7
2
MAX
MIN
2.7
2
MAX
V
V
Supply voltage
5.5
5.5
CC
V
CC
V
CC
V
CC
V
CC
= 2.7 V to 3.6 V
= 4.5 V to 5.5 V
= 2.7 V to 3.6 V
= 4.5 V to 5.5 V
High-level input voltage
V
IH
3.15
3.15
0.8
0.8
V
IL
Low-level input voltage
V
1.65
1.65
V
V
Input voltage
0
0
V
0
0
V
V
V
I
CC
CC
Output voltage
V
CC
–6
V
CC
–6
O
V
CC
V
CC
V
CC
V
CC
= 2.7 V to 3.6 V
= 4.5 V to 5.5 V
= 2.7 V to 3.6 V
= 4.5 V to 5.5 V
I
High-level output current
Low-level output current
mA
mA
OH
OL
–12
6
–12
6
I
12
12
100
85
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
0
100
125
0
ns/V
T
A
–55
–40
°C
NOTE 4: Unused inputs must be held high or low to prevent them from floating.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LV00
TYP
SN74LV00
TYP
†
PARAMETER
TEST CONDITIONS
V
CC
UNIT
MIN
MAX
MIN
MAX
I
I
I
I
I
I
= –100 µA
MIN to MAX
3 V
V
– 0.2
V
– 0.2
OH
OH
OH
OL
OL
OL
CC
2.4
3.6
CC
2.4
3.6
V
V
= –6 mA
= –12 mA
= 100 µA
= 6 mA
V
OH
4.5 V
MIN to MAX
3 V
0.2
0.4
0.55
±1
0.2
0.4
0.55
±1
V
OL
= 12 mA
4.5 V
3.6 V
I
I
V = V
or GND
or GND
µA
I
I
CC
CC
5.5 V
±1
±1
3.6 V
20
20
V = V
I = 0
O
µA
µA
pF
CC
I
5.5 V
20
20
One input at
– 0.6 V
Other inputs at
V or GND
CC
I
3 V to 3.6 V
500
500
CC
V
CC
3.3 V
5 V
2.5
1.5
2.5
1.5
C
V = V
or GND
CC
i
I
†
For conditions shown as MIN or MAX, use the appropriate values under recommended operating conditions.
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
SN54LV00
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
CC
MIN
= 5 V ± 0.5 V
V
CC
MIN
= 3.3 V ± 0.3 V
V
CC
MIN
= 2.7 V
MAX
18
UNIT
TYP
MAX
11
TYP
MAX
15
t
pd
A
Y
6
9
ns
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LV00, SN74LV00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCLS182C – FEBRUARY 1993 – REVISED APRIL 1996
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
SN74LV00
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
CC
MIN
= 5 V ± 0.5 V
V
CC
MIN
= 3.3 V ± 0.3 V
V
CC
MIN
= 2.7 V
MAX
18
UNIT
TYP
MAX
11
TYP
MAX
15
t
pd
A
Y
6
9
ns
operating characteristics, T = 25°C
A
PARAMETER
TEST CONDITIONS
= 50 pF, f = 10 MHz
L
V
TYP
23
UNIT
CC
3.3 V
C
Power dissipation capacitance per gate
C
pF
pd
5 V
23
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LV00, SN74LV00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCLS182C – FEBRUARY 1993 – REVISED APRIL 1996
PARAMETER MEASUREMENT INFORMATION
V
z
TEST
S1
S1
Open
1 kΩ
From Output
Under Test
t
t
/t
Open
PLH PHL
/t
t
V
z
GND
GND
PLZ PZL
/t
PHZ PZH
C
= 50 pF
L
1 kΩ
(see Note A)
WAVEFORM
CONDITION
V
= 4.5 V
V
= 2.7 V
CC
to 5.5 V
CC
to 3.6 V
1.5 V
2.7 V
6 V
V
m
0.5 × V
CC
V
i
V
z
V
CC
LOAD CIRCUIT
2 × V
CC
V
i
V
m
Timing Input
0 V
t
w
t
t
su
h
V
i
V
i
V
m
V
m
Input
V
m
V
m
Data Input
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
V
i
i
Output
Control
V
V
m
m
Input
V
m
V
m
0 V
0 V
V
t
PZL
t
t
t
PHL
PLH
t
PLZ
Output
Waveform 1
0.5 × V
z
OH
V
V
V
m
V
m
m
Output
Output
V
+ 0.3 V
– 0.3 V
S1 at V
(see Note B)
OL
z
V
OL
V
OL
t
PHZ
t
PLH
t
PZH
PHL
Output
Waveform 2
S1 at GND
V
V
V
OH
OH
V
OH
V
V
m
m
m
0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
are the same as t
are the same as t
.
dis
en
.
pd
PLZ
PZL
PLH
PHZ
PZH
PHL
.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jun-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
SOIC
SSOP
SOIC
Drawing
SN74LV00D
SN74LV00DBLE
SN74LV00DR
OBSOLETE
OBSOLETE
OBSOLETE
D
DB
D
14
14
14
14
TBD
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
SN74LV00PWLE
OBSOLETE TSSOP
PW
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Audio
Amplifiers
amplifier.ti.com
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
Digital Control
Military
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
Logic
interface.ti.com
logic.ti.com
Power Mgmt
Microcontrollers
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
Telephony
Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2005, Texas Instruments Incorporated
相关型号:
©2020 ICPDF网 联系我们和版权申明