SN74LV125AQRGYRQ1 [TI]
QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS;
| 型号： | SN74LV125AQRGYRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS 驱动 输出元件 逻辑集成电路 |
| 文件： | 总13页 (文件大小：638K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74LV125A-Q1
www.ti.com
SCES814 –SEPTEMBER 2010
QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
Check for Samples: SN74LV125A-Q1
1
FEATURES
•
•
•
Qualified for Automotive Applications
RGY PACKAGE
(TOP VIEW)
2-V to 5.5-V VCC Operation
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
•
•
•
Typical VOHV (Output VOH Undershoot)
>2.3 V at VCC = 3.3 V, TA = 25°C
1
14
1A
1Y
13 4OE
12 4A
2
3
4
5
6
Support Mixed-Mode Voltage Operation on All
Ports
11
10
9
2OE
2A
4Y
Ioff Supports Partial-Power-Down Mode
Operation
3OE
3A
2Y
7
8
DESCRIPTION
The SN74LV125A-Q1 quadruple bus buffer gate is designed for 2-V to 5.5-V VCC operation.
This device features independent line drivers with 3-state outputs. Each output is disabled when the associated
output-enable (OE) input is high.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
LV125Q
–40°C to 125°C
QFN – RGY
Reel of 3000
SN74LV125AQRGYRQ1
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74LV125A-Q1
SCES814 –SEPTEMBER 2010
www.ti.com
FUNCTION TABLE
(EACH BUFFER)
INPUTS
OUTPUT
Y
OE
L
A
H
L
H
L
L
H
X
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
10
1
3OE
1OE
9
8
2
3
6
3A
3Y
4Y
1A
1Y
2Y
13
12
4
4OE
4A
2OE
11
5
2A
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
–0.5
MAX
UNIT
V
VCC
VI
Supply voltage range
Input voltage range(2)
Voltage range applied to any output in the high-impedance or power-off state(2)
Output voltage range(2) (3)
7
7
7
V
VO
VO
IIK
V
VCC + 0.5
–20
V
Input clamp current
VI < 0
mA
mA
mA
mA
°C/W
°C
IOK
IO
Output clamp current
VO < 0
–50
Continuous output current
Continuous current through VCC or GND
Package thermal impedance(4)
Storage temperature range
VO = 0 to VCC
±35
±70
qJA
RGY package
47
Tstg
–65
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) This value is limited to 5.5 V maximum.
(4) The package thermal impedance is calculated in accordance with JESD 51-5.
2
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): SN74LV125A-Q1
SN74LV125A-Q1
www.ti.com
SCES814 –SEPTEMBER 2010
RECOMMENDED OPERATING CONDITIONS(1)
MIN
4.5
MAX
UNIT
VCC
Supply voltage
5.5
V
VCC = 2 V
1.5
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 2 V
VCC x 0.7
VCC x 0.7
VCC x 0.7
VIH
High-level input voltage
V
V
0.5
VCC x 0.3
VCC x 0.3
VCC x 0.3
5.5
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VIL
Low-level input voltage
VI
Input voltage
0
0
0
V
V
High or low state
3-state
VCC
5.5
VO
Output voltage
VCC = 2 V
–50
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 2 V
–2
IOH
High-level output current
Low-level output current
mA
mA
–8
–16
50
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
2
IOL
8
16
200
Δt/Δv
Input transition rise or fall rate
Operating free-air temperature
100
ns/V
°C
20
TA
–40
125
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
2 V to 5.5 V
2.3 V
MIN
VCC–0.1
2
TYP
MAX
UNIT
IOH = –50 mA
IOH = –2 mA
IOH = –8 mA
IOH = –16 mA
IOL = 50 mA
IOH = 2 mA
IOH = 8 mA
IOL = 16 mA
VOH
V
3 V
2.48
4.5 V
3.8
2 V to 5.5 V
2.3 V
0.1
0.4
0.44
0.55
±1
VOL
V
3 V
4.5 V
II
VI = 5.5 V or GND
0 to 5.5 V
5.5 V
mA
mA
mA
mA
IOZ
ICC
Ioff
VO = VCC or GND
±5
VI = VCC or GND, IO = 0
VI or VO = 0 to 5.5 V
5.5 V
20
0
5
3.3 V
1.6
1.6
Ci
VI = VCC or GND
pF
5 V
Copyright © 2010, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Link(s): SN74LV125A-Q1
SN74LV125A-Q1
SCES814 –SEPTEMBER 2010
www.ti.com
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
TA=
TA =25°C
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
-40°C to 125°C
PARAMETER
UNIT
MIN TYP MAX
8.7 16.5
8.8 16.5
7.3 18.2
2
MIN
1
MAX
tpd
ten
A
Y
Y
Y
18.5
18.5
20.5
ns
ns
ns
ns
OE
OE
1
CL = 50 pF
tdis
1
tsk(o)
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
TA=
TA = 25°C
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
-40°C to 125°C
PARAMETER
UNIT
MIN TYP MAX
6.1 11.5
6.2 11.5
5.5 13.2
1.5
MIN
1
MAX
tpd
ten
A
Y
Y
Y
13
13
15
ns
ns
ns
ns
OE
OE
1
CL = 50 pF
tdis
1
tsk(o)
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
TA=
TA =25°C
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
-40°C to 125°C
PARAMETER
UNIT
MIN TYP MAX
MIN MAX
tpd
ten
A
Y
Y
Y
4.3
4.4
4
7.5
7.1
8.8
1
10
10
11
ns
ns
ns
ns
OE
OE
CL = 50 pF
tdis
tsk(o)
4
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): SN74LV125A-Q1
SN74LV125A-Q1
www.ti.com
SCES814 –SEPTEMBER 2010
NOISE CHARACTERISTICS(1)
VCC = 3.3 V, CL = 50 pF, TA = 25°C
MIN
TYP
0.4
–0.3
3
MAX
0.8
UNIT
VOL(P)
VOL(V)
VOH(V)
VIH(D)
VIL(D)
Quiet output, maximum dynamic VOL
Quiet output, minimum dynamic VOL
Quiet output, minimum dynamic VOH
High-level dynamic input voltage
Low-level dynamic input voltage
V
V
V
V
V
–0.8
2.31
0.99
(1) Characteristics are for surface-mount packages only.
OPERATING CHARACTERISTICS
TA = 25°C
PARAMETER
TEST CONDITIONS
VCC
3.3 V
5 V
TYP UNIT
15.5
pF
CL = 50
pF,
f = 10
MHz
Cpd
Power dissipation capacitance
Outputs enabled
17.6
Copyright © 2010, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Link(s): SN74LV125A-Q1
SN74LV125A-Q1
SCES814 –SEPTEMBER 2010
www.ti.com
PARAMETER MEASUREMENT INFORMATION
V
CC
S1
Open
GND
R
= 1 kΩ
L
From Output
Under Test
Test
Point
From Output
Under Test
TEST
S1
t
t
/t
PLH PHL
Open
C
L
(see Note A)
C
(see Note A)
L
t
/t
PLZ PZL
V
CC
GND
/t
PHZ PZH
Open Drain
V
CC
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
V
CC
50% V
Timing Input
CC
0 V
t
w
t
h
t
V
CC
su
V
CC
50% V
50% V
CC
Input
CC
50% V
50% V
CC
Data Input
CC
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
CC
V
CC
Output
Control
50% V
50% V
50% V
50% V
Input
CC
CC
t
CC
CC
0 V
0 V
t
t
t
t
PZL
PLZ
PLH
PHL
Output
Waveform 1
V
≈V
OH
CC
In-Phase
Output
50% V
50% V
CC
50% V
CC
CC
CC
V
V
OL
+ 0.3 V
S1 at V
CC
(see Note B)
V
OL
OL
t
PHL
PLH
t
t
PHZ
PZH
Output
Waveform 2
S1 at GND
V
OH
V
OH
Out-of-Phase
Output
V
OH
0.3 V
50% V
50% V
50% V
CC
CC
V
≈0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristicsP: RR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
D. The outputs are measured one at a time, with one input transition per measurement.
E.
F.
t
and t
and t
are the same as t
.
dis
PLZ
PZL
PHL
PHZ
PZH
t
are the same as t .
en
are the same as t .
G.
t
and t
PLH
pd
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuits and Voltage Waveforms
6
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): SN74LV125A-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
20-Nov-2010
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
SN74LV125AQRGYRQ1
ACTIVE
VQFN
RGY
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-3-260C-168 HR
Request Free Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LV125A-Q1 :
Catalog: SN74LV125A
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74LV125AQRGYRQ1 VQFN
RGY
14
2000
330.0
12.4
3.75
3.75
1.15
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
VQFN RGY 14
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 35.0
SN74LV125AQRGYRQ1
2000
Pack Materials-Page 2
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